(I did not see this addressed in the FAQs...)
How much physical memory can the 2.4.26 kernel address in kernel context on
x86?
What about DMA memory?
Local rumor says ~1GB. But this makes little sense given a 32-bit address.
Where in the source can I learn more about this?
Thanks,
-PWM
On Thu, 2005-03-17 at 11:06 -0700, Peter W. Morreale wrote:
> (I did not see this addressed in the FAQs...)
>
> How much physical memory can the 2.4.26 kernel address in kernel context on
> x86?
896 MB
There are patches to move this around, though.
> What about DMA memory?
What kind of DMA?
> Local rumor says ~1GB. But this makes little sense given a 32-bit address.
>
> Where in the source can I learn more about this?
arch/i386
include/asm-i386
:)
Check out MAXMEM in include/asm-i386/page.h (at least 2.6)
-- Dave
On Thu, 17 Mar 2005, Peter W. Morreale wrote:
> (I did not see this addressed in the FAQs...)
>
> How much physical memory can the 2.4.26 kernel address in kernel context on
> x86?
>
All of it.
> What about DMA memory?
>
All of it, too. The old DMA controller(s) could only address 16 MB
because that's all the page-registers allowed. Bus-mastering DMA
off the PCI/Bus has no such limitation. Most have DMA controllers
that use scatter-lists so RAM doesn't even have to be contiguous,
only properly allocated (in pages) and nailed down with no caching.
> Local rumor says ~1GB. But this makes little sense given a 32-bit address.
>
If you are looking for a dynamic buffer in DMA-able RAM, you probably
can only use aout 1GB, but that's not how to do DMA.
> Where in the source can I learn more about this?
>
../linux-`uname -r`/mm
> Thanks,
> -PWM
Cheers,
Dick Johnson
Penguin : Linux version 2.6.11 on an i686 machine (5537.79 BogoMips).
Notice : All mail here is now cached for review by Dictator Bush.
98.36% of all statistics are fiction.
linux-os wrote:
> On Thu, 17 Mar 2005, Peter W. Morreale wrote:
>
>> (I did not see this addressed in the FAQs...)
>>
>> How much physical memory can the 2.4.26 kernel address in kernel
>> context on x86?
>>
>
> All of it.
>
>> What about DMA memory?
>>
>
> All of it, too. The old DMA controller(s) could only address 16 MB
> because that's all the page-registers allowed. Bus-mastering DMA
> off the PCI/Bus has no such limitation. Most have DMA controllers
> that use scatter-lists so RAM doesn't even have to be contiguous,
> only properly allocated (in pages) and nailed down with no caching.
>
Kernel Image itself resides at physical address 1M. Is this kernel image
area a hole to the old DMA range? Thanks.
Coywolf
On Fri, 18 Mar 2005, Coywolf Qi Hunt wrote:
> linux-os wrote:
>> On Thu, 17 Mar 2005, Peter W. Morreale wrote:
>>
>>> (I did not see this addressed in the FAQs...)
>>>
>>> How much physical memory can the 2.4.26 kernel address in kernel context
>>> on x86?
>>>
>>
>> All of it.
>>
>>> What about DMA memory?
>>>
>>
>> All of it, too. The old DMA controller(s) could only address 16 MB
>> because that's all the page-registers allowed. Bus-mastering DMA
>> off the PCI/Bus has no such limitation. Most have DMA controllers
>> that use scatter-lists so RAM doesn't even have to be contiguous,
>> only properly allocated (in pages) and nailed down with no caching.
>>
>
> Kernel Image itself resides at physical address 1M. Is this kernel image
> area a hole to the old DMA range? Thanks.
>
No. DMA doesn't "know" about holes and it also doesn't "know"
about the CPU. The DMA controller(s) require the bus address of
RAM. Knowing that address, i.e., the physical to virtual mapping,
the DMA controllers can overwrite a kernel and anything else just
fine. For instance, one of the common PCI/Bus interface controllers
is the PLX PCI-9656BA. It can read or write to/from anywhere as
long as it is aligned properly. There is no protection possible
from a DMA controller. If it's been programmed to overwrite
your kernel, it will!
Some old motherboards may not map the RAM controller to all the bits
on the PCI/Bus, but that problem was fixed when people started using
AGP screen boards (the screen BIOS must be in low memory and it is
read out of the board).
Since DMA always bypasses any cache, if the CPU is expected to
access anything in the RAM just written by DMA, either that
address area must be set to non-cached or the cache(s) must be
flushed.
If you use a busmaster with scatter/gather, you can DMA to/from
RAM that is not contiguous. You just set up the scatter-list
properly and away you go. This is sometimes useful for buffers
that are contiguous when addressed in virtual mode, but are
obtained from paged-RAM scattered all over the place. The pages
need to be "reserved" so they are not stolen by the pager and
then they need to be set to no-cache so the DMA activity can
actually be "seen" by the CPU.
>
> Coywolf
>
Cheers,
Dick Johnson
Penguin : Linux version 2.6.11 on an i686 machine (5537.79 BogoMips).
Notice : All mail here is now cached for review by Dictator Bush.
98.36% of all statistics are fiction.