2005-12-04 01:19:58

by Jeff Garzik

[permalink] [raw]
Subject: [PATCH] sata_sil: combined irq + LBT DMA patch for testing


To make it easy for others to test, since there are merge conflicts,
I've combined the two previous sata_sil patches into a single patch.

Verified here on my 3112 (Adaptec 1210SA).

I'm especially interested to hear from anyone willing to test on a
SI 3114 (4-port).


The 'sii' branch of
rsync://rsync.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev.git

contains the following updates:

drivers/scsi/sata_sil.c | 233 +++++++++++++++++++++++++++++++++++++++++++++---
1 files changed, 219 insertions(+), 14 deletions(-)

Jeff Garzik:
[libata sata_sil] improved interrupt handling
[libata sata_sil] Greatly improve DMA handling

diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
index 3609186..9e4630f 100644
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -80,11 +80,20 @@ enum {
SIL_QUIRK_UDMA5MAX = (1 << 1),
};

+enum {
+ SIL_DMA_BOUNDARY = 0xffffffffU,
+};
+
static int sil_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
static void sil_dev_config(struct ata_port *ap, struct ata_device *dev);
static u32 sil_scr_read (struct ata_port *ap, unsigned int sc_reg);
static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
static void sil_post_set_mode (struct ata_port *ap);
+static void sil_qc_prep(struct ata_queued_cmd *qc);
+static void sil_bmdma_setup (struct ata_queued_cmd *qc);
+static void sil_bmdma_start (struct ata_queued_cmd *qc);
+static void sil_bmdma_stop(struct ata_queued_cmd *qc);
+static irqreturn_t sil_irq (int irq, void *dev_instance, struct pt_regs *regs);


static const struct pci_device_id sil_pci_tbl[] = {
@@ -138,13 +147,13 @@ static struct scsi_host_template sil_sht
.eh_strategy_handler = ata_scsi_error,
.can_queue = ATA_DEF_QUEUE,
.this_id = ATA_SHT_THIS_ID,
- .sg_tablesize = LIBATA_MAX_PRD,
+ .sg_tablesize = ATA_MAX_PRD,
.max_sectors = ATA_MAX_SECTORS,
.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
.emulated = ATA_SHT_EMULATED,
.use_clustering = ATA_SHT_USE_CLUSTERING,
.proc_name = DRV_NAME,
- .dma_boundary = ATA_DMA_BOUNDARY,
+ .dma_boundary = SIL_DMA_BOUNDARY,
.slave_configure = ata_scsi_slave_config,
.bios_param = ata_std_bios_param,
.ordered_flush = 1,
@@ -160,14 +169,14 @@ static const struct ata_port_operations
.dev_select = ata_std_dev_select,
.phy_reset = sata_phy_reset,
.post_set_mode = sil_post_set_mode,
- .bmdma_setup = ata_bmdma_setup,
- .bmdma_start = ata_bmdma_start,
- .bmdma_stop = ata_bmdma_stop,
+ .bmdma_setup = sil_bmdma_setup,
+ .bmdma_start = sil_bmdma_start,
+ .bmdma_stop = sil_bmdma_stop,
.bmdma_status = ata_bmdma_status,
- .qc_prep = ata_qc_prep,
+ .qc_prep = sil_qc_prep,
.qc_issue = ata_qc_issue_prot,
.eng_timeout = ata_eng_timeout,
- .irq_handler = ata_interrupt,
+ .irq_handler = sil_irq,
.irq_clear = ata_bmdma_irq_clear,
.scr_read = sil_scr_read,
.scr_write = sil_scr_write,
@@ -214,16 +223,18 @@ static const struct {
unsigned long tf; /* ATA taskfile register block */
unsigned long ctl; /* ATA control/altstatus register block */
unsigned long bmdma; /* DMA register block */
+ unsigned long bmdma_lbt;/* Large block DMA register block */
unsigned long scr; /* SATA control register block */
unsigned long sien; /* SATA Interrupt Enable register */
unsigned long xfer_mode;/* data transfer mode register */
} sil_port[] = {
- /* port 0 ... */
- { 0x80, 0x8A, 0x00, 0x100, 0x148, 0xb4 },
- { 0xC0, 0xCA, 0x08, 0x180, 0x1c8, 0xf4 },
- { 0x280, 0x28A, 0x200, 0x300, 0x348, 0x2b4 },
- { 0x2C0, 0x2CA, 0x208, 0x380, 0x3c8, 0x2f4 },
- /* ... port 3 */
+
+ /* tf ctl bmdma lbt scr sien mode */
+ { 0x80, 0x8A, 0x0, 0x10, 0x100, 0x148, 0xb4 }, /* port 0 */
+ { 0xC0, 0xCA, 0x8, 0x18, 0x180, 0x1c8, 0xf4 }, /* port 1 */
+ { 0x280, 0x28A, 0x200, 0x210, 0x300, 0x348, 0x2b4 }, /* port 2 */
+ { 0x2C0, 0x2CA, 0x208, 0x218, 0x380, 0x3c8, 0x2f4 }, /* port 3 */
+
};

MODULE_AUTHOR("Jeff Garzik");
@@ -233,6 +244,200 @@ MODULE_DEVICE_TABLE(pci, sil_pci_tbl);
MODULE_VERSION(DRV_VERSION);


+static void sil_bmdma_stop(struct ata_queued_cmd *qc)
+{
+ struct ata_port *ap = qc->ap;
+ void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
+ u32 val;
+
+ /* clear start/stop bit */
+ if (ap->port_no == 2)
+ val = SIL_INTR_STEERING;
+ else
+ val = 0;
+ writeb(val, mmio + ATA_DMA_CMD);
+
+ /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
+ ata_altstatus(ap); /* dummy read */
+}
+
+static void sil_bmdma_setup (struct ata_queued_cmd *qc)
+{
+ struct ata_port *ap = qc->ap;
+ void __iomem *mmio;
+
+ mmio = ap->host_set->mmio_base + sil_port[ap->port_no].bmdma;
+
+ /* load PRD table addr. */
+ mb(); /* make sure PRD table writes are visible to controller */
+ writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
+
+ /* issue r/w command */
+ ata_exec_command(ap, &qc->tf);
+}
+
+static void sil_bmdma_start (struct ata_queued_cmd *qc)
+{
+ unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
+ struct ata_port *ap = qc->ap;
+ void __iomem *mmio;
+ u8 dmactl;
+
+ mmio = ap->host_set->mmio_base + sil_port[ap->port_no].bmdma_lbt;
+
+ /* set transfer direction, start host DMA transaction */
+ dmactl = readb(mmio + ATA_DMA_CMD);
+ dmactl &= ~ATA_DMA_WR;
+ if (!rw)
+ dmactl |= ATA_DMA_WR;
+ writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
+}
+
+/* The way God intended PCI IDE scatter/gather lists to look and behave... */
+static inline void sil_fill_sg(struct ata_queued_cmd *qc)
+{
+ struct scatterlist *sg;
+ struct ata_port *ap = qc->ap;
+ struct ata_prd *prd;
+
+ prd = &ap->prd[0];
+ ata_for_each_sg(sg, qc) {
+ u32 addr = sg_dma_address(sg);
+ u32 sg_len = sg_dma_len(sg);
+
+ prd->addr = cpu_to_le32(addr);
+ prd->flags_len = cpu_to_le32(sg_len);
+
+ if (ata_sg_is_last(sg, qc))
+ prd->flags_len |= cpu_to_le32(ATA_PRD_EOT);
+
+ prd++;
+ }
+}
+
+static void sil_qc_prep(struct ata_queued_cmd *qc)
+{
+ if (!(qc->flags & ATA_QCFLAG_DMAMAP))
+ return;
+
+ sil_fill_sg(qc);
+}
+
+static inline void sil_port_irq(struct ata_port *ap, void __iomem *mmio,
+ u8 dma_stat, u8 dma_stat_mask)
+{
+ struct ata_queued_cmd *qc = NULL;
+ unsigned int err_mask = AC_ERR_OTHER;
+ int complete = 1;
+ u8 dev_stat;
+
+ /* Exit now, if port or port's irqs are disabled */
+ if (ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR)) {
+ complete = 0;
+ goto out;
+ }
+
+ /* Get active command */
+ qc = ata_qc_from_tag(ap, ap->active_tag);
+ if ((!qc) || (qc->tf.ctl & ATA_NIEN)) {
+ complete = 0;
+ goto out;
+ }
+
+ /* Stop DMA, if doing DMA */
+ switch (qc->tf.protocol) {
+ case ATA_PROT_DMA:
+ case ATA_PROT_ATAPI_DMA:
+ ata_bmdma_stop(qc);
+ break;
+
+ default:
+ /* do nothing */
+ break;
+ }
+
+ /* Catch PCI bus errors */
+ if (unlikely(dma_stat_mask & ATA_DMA_ERR)) {
+ struct pci_dev *pdev = to_pci_dev(ap->host_set->dev);
+ u16 pci_stat;
+
+ pci_read_config_word(pdev, PCI_STATUS, &pci_stat);
+ pci_write_config_word(pdev, PCI_STATUS, pci_stat);
+
+ err_mask = AC_ERR_HOST_BUS;
+
+ printk(KERN_ERR "ata%u: PCI error, pci %x, dma %x\n",
+ ap->id, pci_stat, dma_stat);
+ goto out;
+ }
+
+ /* Read device Status, clear device interrupt */
+ dev_stat = ata_check_status(ap);
+
+ /* Let timeout handler handle stuck BSY */
+ if (unlikely(dev_stat & ATA_BUSY)) {
+ complete = 0;
+ goto out;
+ }
+
+ /* Did S/G table specify a size smaller than the transfer size? */
+ if (unlikely(dma_stat_mask == 0)) {
+ printk(KERN_ERR "ata%u: BUG: SG size underflow\n", ap->id);
+ err_mask = AC_ERR_OTHER; /* only occurs due to coder error? */
+ goto out;
+ }
+
+ /* Clear 311x DMA completion indicator */
+ writeb(ATA_DMA_INTR, mmio + ATA_DMA_STATUS);
+
+ /* Finally, complete the ATA command transaction */
+ ata_qc_complete(qc, ac_err_mask(dev_stat));
+ return;
+
+out:
+ ata_chk_status(ap);
+ writeb(dma_stat_mask, mmio + ATA_DMA_STATUS);
+ if (complete)
+ ata_qc_complete(qc, err_mask);
+}
+
+static irqreturn_t sil_irq (int irq, void *dev_instance, struct pt_regs *regs)
+{
+ struct ata_host_set *host_set = dev_instance;
+ unsigned int i, handled = 0;
+
+ spin_lock(&host_set->lock);
+
+ for (i = 0; i < host_set->n_ports; i++) {
+ struct ata_port *ap;
+ void __iomem *mmio;
+ u8 status, mask;
+ u32 serr;
+
+ ap = host_set->ports[i];
+ if (!ap)
+ continue;
+
+ mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
+ status = readb(mmio + ATA_DMA_STATUS);
+ mask = status & (ATA_DMA_INTR | ATA_DMA_ERR | ATA_DMA_ACTIVE);
+ if (mask == ATA_DMA_ACTIVE)
+ continue;
+
+ handled = 1;
+
+ sil_port_irq(ap, mmio, status, mask);
+
+ serr = sil_scr_read(ap, SCR_ERROR);
+ if (serr)
+ sil_scr_write(ap, SCR_ERROR, serr);
+ }
+
+ spin_unlock(&host_set->lock);
+
+ return IRQ_RETVAL(handled);
+}
+
static unsigned char sil_get_device_cache_line(struct pci_dev *pdev)
{
u8 cache_line = 0;
@@ -442,7 +647,7 @@ static int sil_init_one (struct pci_dev
probe_ent->port[i].cmd_addr = base + sil_port[i].tf;
probe_ent->port[i].altstatus_addr =
probe_ent->port[i].ctl_addr = base + sil_port[i].ctl;
- probe_ent->port[i].bmdma_addr = base + sil_port[i].bmdma;
+ probe_ent->port[i].bmdma_addr = base + sil_port[i].bmdma_lbt;
probe_ent->port[i].scr_addr = base + sil_port[i].scr;
ata_std_ports(&probe_ent->port[i]);
}


2005-12-06 19:47:45

by Richard Bollinger

[permalink] [raw]
Subject: Re: [PATCH] sata_sil: combined irq + LBT DMA patch for testing

On 12/3/05, Jeff Garzik <[email protected]> wrote:
>
> To make it easy for others to test, since there are merge conflicts,
> I've combined the two previous sata_sil patches into a single patch.
>
> Verified here on my 3112 (Adaptec 1210SA).
>
> I'm especially interested to hear from anyone willing to test on a
> SI 3114 (4-port).
>
>
> The 'sii' branch of
> rsync://rsync.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev.git
>
> contains the following updates:
>
> drivers/scsi/sata_sil.c | 233 +++++++++++++++++++++++++++++++++++++++++++++---
> 1 files changed, 219 insertions(+), 14 deletions(-)
>
> Jeff Garzik:
> [libata sata_sil] improved interrupt handling
> [libata sata_sil] Greatly improve DMA handling
>
> diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
> index 3609186..9e4630f 100644
> --- a/drivers/scsi/sata_sil.c
> +++ b/drivers/scsi/sata_sil.c
>...

Not so well on my Gigabyte GA-K8N Ultra 9. lspci -v says:
01:09.0 RAID bus controller: CMD Technology Inc: Unknown device 3114 (rev 02)
Subsystem: Giga-byte Technology: Unknown device b004
Flags: bus master, 66Mhz, medium devsel, latency 32, IRQ 5
I/O ports at 8800 [size=8]
I/O ports at 8c00 [size=4]
I/O ports at 9000 [size=8]
I/O ports at 9400 [size=4]
I/O ports at 9800 [size=16]
Memory at f5841000 (32-bit, non-prefetchable) [size=1K]
Expansion ROM at 88000000 [disabled] [size=512K]
Capabilities: [60] Power Management version 2

Applied the patch to 2.6.15-rc5, with some manual fixups. Here're the
dmesg differences of note:
1c1
< Linux version 2.6.15-rc5 (root@LS09) (gcc version 2.95.3 20010315
(release)) #5 Tue Dec 6 09:40:42 EST 2005
---
> Linux version 2.6.15-rc5 (root@LS09) (gcc version 2.95.3 20010315 (release)) #6 Tue Dec 6 13:20:17 EST 2005
125,128c125,128
< ata1: SATA max UDMA/100 cmd 0xF8800080 ctl 0xF880008A bmdma 0xF8800000 irq 5
< ata2: SATA max UDMA/100 cmd 0xF88000C0 ctl 0xF88000CA bmdma 0xF8800008 irq 5
< ata3: SATA max UDMA/100 cmd 0xF8800280 ctl 0xF880028A bmdma 0xF8800200 irq 5
< ata4: SATA max UDMA/100 cmd 0xF88002C0 ctl 0xF88002CA bmdma 0xF8800208 irq 5
---
> ata1: SATA max UDMA/100 cmd 0xF8800080 ctl 0xF880008A bmdma 0xF8800010 irq 5
> ata2: SATA max UDMA/100 cmd 0xF88000C0 ctl 0xF88000CA bmdma 0xF8800018 irq 5
> ata3: SATA max UDMA/100 cmd 0xF8800280 ctl 0xF880028A bmdma 0xF8800210 irq 5
> ata4: SATA max UDMA/100 cmd 0xF88002C0 ctl 0xF88002CA bmdma 0xF8800218 irq 5
488a489,494
> ata4: BUG: SG size underflow
> ata4: status=0x50 { DriveReady SeekComplete }
> sdd: Current: sense key: No Sense
> Additional sense: No additional sense information
> ata3: BUG: SG size underflow
> ata3: status=0x50 { DriveReady SeekComplete }
500a507,508
> ata2: BUG: SG size underflow
> ata2: status=0x50 { DriveReady SeekComplete }
578a586,592
> ata4: BUG: SG size underflow
> ata4: status=0x50 { DriveReady SeekComplete }
> sdd: Current: sense key: No Sense
> Additional sense: No additional sense information
> ata1: BUG: SG size underflow
> ata1: status=0x50 { DriveReady SeekComplete }
> blk: request botched

2005-12-07 12:34:32

by Prakash Punnoor

[permalink] [raw]
Subject: Re: [PATCH] sata_sil: combined irq + LBT DMA patch for testing

Am Sonntag Dezember 4 2005 02:19 schrieb Jeff Garzik:
> To make it easy for others to test, since there are merge conflicts,
> I've combined the two previous sata_sil patches into a single patch.
>
> Verified here on my 3112 (Adaptec 1210SA).

Seems to work fine here with my 3112 on nforce2 board, as well.

Cheers,

Prakash


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2005-12-08 18:23:43

by Thomas Backlund

[permalink] [raw]
Subject: Re: [PATCH] sata_sil: combined irq + LBT DMA patch for testing

Richard Bollinger wrote:
> On 12/3/05, Jeff Garzik <[email protected]> wrote:
>> To make it easy for others to test, since there are merge conflicts,
>> I've combined the two previous sata_sil patches into a single patch.
>>
>> Verified here on my 3112 (Adaptec 1210SA).
>>
>> I'm especially interested to hear from anyone willing to test on a
>> SI 3114 (4-port).
>>
>>
>> The 'sii' branch of
>> rsync://rsync.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev.git
>>
>> contains the following updates:
>>
>> drivers/scsi/sata_sil.c | 233 +++++++++++++++++++++++++++++++++++++++++++++---
>> 1 files changed, 219 insertions(+), 14 deletions(-)
>>
>> Jeff Garzik:
>> [libata sata_sil] improved interrupt handling
>> [libata sata_sil] Greatly improve DMA handling
>>
>> diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
>> index 3609186..9e4630f 100644
>> --- a/drivers/scsi/sata_sil.c
>> +++ b/drivers/scsi/sata_sil.c
>> ...
>
> Not so well on my Gigabyte GA-K8N Ultra 9. lspci -v says:

Same for me...
After some more tests i managed to see some error output before the
freeze, and this is what I also saw:

>> ata1: BUG: SG size underflow
>> ata1: status=0x50 { DriveReady SeekComplete }

and onde by one the raid devices got deactivated until the full freeze...

2005-12-08 20:38:21

by Jeff Garzik

[permalink] [raw]
Subject: Re: [PATCH] sata_sil: combined irq + LBT DMA patch for testing

Thomas Backlund wrote:
> Richard Bollinger wrote:
>>> ata1: BUG: SG size underflow
>>> ata1: status=0x50 { DriveReady SeekComplete }
>
>
> and onde by one the raid devices got deactivated until the full freeze...


I think I know what's going on with the 'SG size underflow' thingy, give
me a few days to come up with a fix.

Jeff


2005-12-27 16:25:53

by Thomas Backlund

[permalink] [raw]
Subject: Re: [PATCH] sata_sil: combined irq + LBT DMA patch for testing

Jeff Garzik wrote:
> Thomas Backlund wrote:
>> Richard Bollinger wrote:
>>>> ata1: BUG: SG size underflow
>>>> ata1: status=0x50 { DriveReady SeekComplete }
>>
>>
>> and onde by one the raid devices got deactivated until the full
>> freeze...
>
>
> I think I know what's going on with the 'SG size underflow' thingy,
> give me a few days to come up with a fix.
>
> Jeff
>
>
>
Any news on this?
or is it already fixed ?

--
Regards

Thomas

2006-01-18 00:40:07

by Jeff Garzik

[permalink] [raw]
Subject: Re: [PATCH] sata_sil: combined irq + LBT DMA patch for testing

Thomas Backlund wrote:
> Jeff Garzik wrote:
>
>> Thomas Backlund wrote:
>>
>>> Richard Bollinger wrote:
>>>
>>>>> ata1: BUG: SG size underflow
>>>>> ata1: status=0x50 { DriveReady SeekComplete }
>>>
>>>
>>>
>>> and onde by one the raid devices got deactivated until the full
>>> freeze...
>>
>>
>>
>> I think I know what's going on with the 'SG size underflow' thingy,
>> give me a few days to come up with a fix.
>>
>> Jeff
>>
>>
>>
> Any news on this?
> or is it already fixed ?

Back-burner for the moment :(

Jeff



Subject: Re: [PATCH] sata_sil: combined irq + LBT DMA patch for testing

Hi,

On 1/18/06, Jeff Garzik <[email protected]> wrote:
> Thomas Backlund wrote:
> > Jeff Garzik wrote:
> >
> >> Thomas Backlund wrote:
> >>
> >>> Richard Bollinger wrote:
> >>>
> >>>>> ata1: BUG: SG size underflow
> >>>>> ata1: status=0x50 { DriveReady SeekComplete }
> >>>
> >>>
> >>>
> >>> and onde by one the raid devices got deactivated until the full
> >>> freeze...
> >>
> >>
> >>
> >> I think I know what's going on with the 'SG size underflow' thingy,
> >> give me a few days to come up with a fix.
> >>
> >> Jeff
> >>
> >>
> >>
> > Any news on this?
> > or is it already fixed ?
>
> Back-burner for the moment :(

I think I have finally found the bug
after auditing the patch for x times...

+ /* Stop DMA, if doing DMA */
+ switch (qc->tf.protocol) {
+ case ATA_PROT_DMA:
+ case ATA_PROT_ATAPI_DMA:
+ ata_bmdma_stop(qc);

It should be sil_bmdma_stop()...

By accident ata_bmdma_stop() is OK for sil3112 so that would
explain why only people with sil3114 reported problems.

My theory is that using ata_bmdma_stop() for sil3114 results
in IRQs for port 2 and 3 not being delivered (because
SIL_INTR_STEERING bit is cleared) and we end up with
dma_stat_mask == 0.

Rest of the patch looks perfectly fine for me. Could somebody
reporting problems with this patch retest with the above change?

+ break;
+ default:
+ /* do nothing */
+ break;
+ }

Bartlomiej

2006-01-26 14:50:48

by Heikki Orsila

[permalink] [raw]
Subject: Re: [PATCH] sata_sil: combined irq + LBT DMA patch for testing

> I think I know what's going on with the 'SG size underflow' thingy,
> give me a few days to come up with a fix.

As a said issue, I'm running 2.6.15-rc7 and SiL 3114 with 3 drives
attached on AMD64. I might like to test your patches, but I have small
issues even without the patch (happens every now and then, but not every
day):

ata2: no sense translation for status: 0x51
ata2: translated ATA stat/err 0x51/00 to SCSI SK/ASC/ASCQ 0x3/11/04
ata2: status=0x51 { DriveReady SeekComplete Error }

How do I find out which sd disk in the system does that ata2 refer to? I
have: hda, hdc and sd[abc]. All sd disks are on SiL 3114.

--
Heikki Orsila Barbie's law:
[email protected] "Math is hard, let's go shopping!"
http://www.iki.fi/shd

2006-01-27 16:29:40

by Richard Bollinger

[permalink] [raw]
Subject: Re: [PATCH] sata_sil: combined irq + LBT DMA patch for testing

On 1/25/06, Bartlomiej Zolnierkiewicz <[email protected]> wrote:
> Hi,
> ...
> I think I have finally found the bug
> after auditing the patch for x times...
>
> + /* Stop DMA, if doing DMA */
> + switch (qc->tf.protocol) {
> + case ATA_PROT_DMA:
> + case ATA_PROT_ATAPI_DMA:
> + ata_bmdma_stop(qc);
>
> It should be sil_bmdma_stop()...
>
> By accident ata_bmdma_stop() is OK for sil3112 so that would
> explain why only people with sil3114 reported problems.
>
> My theory is that using ata_bmdma_stop() for sil3114 results
> in IRQs for port 2 and 3 not being delivered (because
> SIL_INTR_STEERING bit is cleared) and we end up with
> dma_stat_mask == 0.
>
> Rest of the patch looks perfectly fine for me. Could somebody
> reporting problems with this patch retest with the above change?
> ...
> Bartlomiej
>
Still no joy... after a normal looking set of startup messages,
Jan 27 10:46:03 LS09 kernel: ata1: SATA max UDMA/100 cmd 0xF8800080
ctl 0xF880008A bmdma 0xF8800010 irq 5
Jan 27 10:46:03 LS09 kernel: ata2: SATA max UDMA/100 cmd 0xF88000C0
ctl 0xF88000CA bmdma 0xF8800018 irq 5
Jan 27 10:46:03 LS09 kernel: ata3: SATA max UDMA/100 cmd 0xF8800280
ctl 0xF880028A bmdma 0xF8800210 irq 5
Jan 27 10:46:03 LS09 kernel: ata4: SATA max UDMA/100 cmd 0xF88002C0
ctl 0xF88002CA bmdma 0xF8800218 irq 5
Jan 27 10:46:03 LS09 kernel: ata1: dev 0 ATA-6, max UDMA/100,
625142448 sectors: LBA48
Jan 27 10:46:03 LS09 kernel: ata1: dev 0 configured for UDMA/100
Jan 27 10:46:03 LS09 kernel: scsi0 : sata_sil
Jan 27 10:46:03 LS09 kernel: ata2: dev 0 ATA-6, max UDMA/100,
625142448 sectors: LBA48
Jan 27 10:46:03 LS09 kernel: ata2: dev 0 configured for UDMA/100
Jan 27 10:46:03 LS09 kernel: scsi1 : sata_sil
Jan 27 10:46:03 LS09 kernel: ata3: dev 0 ATA-6, max UDMA/100,
625142448 sectors: LBA48
Jan 27 10:46:03 LS09 kernel: ata3: dev 0 configured for UDMA/100
Jan 27 10:46:03 LS09 kernel: scsi2 : sata_sil
Jan 27 10:46:03 LS09 kernel: ata4: dev 0 ATA-6, max UDMA/100,
625142448 sectors: LBA48
Jan 27 10:46:03 LS09 kernel: ata4: dev 0 configured for UDMA/100
Jan 27 10:46:03 LS09 kernel: scsi3 : sata_sil
Jan 27 10:46:03 LS09 kernel: Vendor: ATA Model: WDC
WD3200JD-00K Rev: 08.0
Jan 27 10:46:03 LS09 kernel: Type: Direct-Access
ANSI SCSI revision: 05
Jan 27 10:46:03 LS09 kernel: Vendor: ATA Model: WDC
WD3200JD-00K Rev: 08.0
Jan 27 10:46:03 LS09 kernel: Type: Direct-Access
ANSI SCSI revision: 05
Jan 27 10:46:03 LS09 kernel: Vendor: ATA Model: WDC
WD3200JD-00K Rev: 08.0
Jan 27 10:46:03 LS09 kernel: Type: Direct-Access
ANSI SCSI revision: 05
Jan 27 10:46:03 LS09 kernel: Vendor: ATA Model: WDC
WD3200JD-00K Rev: 08.0
Jan 27 10:46:03 LS09 kernel: Type: Direct-Access
ANSI SCSI revision: 05

Once I actually start doing output to with a drive I get these messages:
Jan 27 10:47:05 LS09 kernel: sdc: Current: sense key: No Sense
Jan 27 10:47:05 LS09 kernel: Additional sense: No additional sense
information
Jan 27 10:47:06 LS09 kernel: sdb: Current: sense key: No Sense
Jan 27 10:47:06 LS09 kernel: Additional sense: No additional sense
information
Jan 27 10:47:07 LS09 in.rshd[1607]: connect from [email protected]
Jan 27 10:47:07 LS09 rshd[1608]: root@JE-LS1 as root: cmd='/sbin/ifconfig'
Jan 27 10:47:08 LS09 kernel: sdc: Current: sense key: No Sense
Jan 27 10:47:08 LS09 kernel: Additional sense: No additional sense
information
Jan 27 10:47:10 LS09 kernel: sdd: Current: sense key: No Sense
Jan 27 10:47:10 LS09 kernel: Additional sense: No additional sense
information
Jan 27 10:47:10 LS09 kernel: sdb: Current: sense key: No Sense
Jan 27 10:47:10 LS09 kernel: Additional sense: No additional sense
information
Jan 27 10:47:40 LS09 kernel: sd 1:0:0:0: SCSI error: return code = 0x8000002
Jan 27 10:47:40 LS09 kernel: sdb: Current: sense key: Aborted Command
Jan 27 10:47:40 LS09 kernel: Additional sense: Scsi parity error
Jan 27 10:47:40 LS09 kernel: sdc: Current: sense key: No Sense
Jan 27 10:47:40 LS09 kernel: Additional sense: No additional sense
information
Jan 27 10:48:10 LS09 kernel: sd 1:0:0:0: SCSI error: return code = 0x8000002
Jan 27 10:48:10 LS09 kernel: sdb: Current: sense key: Aborted Command
Jan 27 10:48:10 LS09 kernel: Additional sense: Scsi parity error