2023-05-22 16:32:13

by Mark Brown

[permalink] [raw]

Subject: [PATCH 0/5] b4/sysreg: More conversions to automatic generation

---

Continue working through the register defintions, converting them to
automatic generation.

Signed-off-by: Mark Brown <[email protected]>
---
Mark Brown (5):
arm64/sysreg: Remove some unused sysreg definitions
arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
arm64/sysreg: Convert OSLAR_EL1 to automatic generation

arch/arm64/include/asm/kvm_host.h | 2 +-
arch/arm64/include/asm/sysreg.h | 16 ++++------------
arch/arm64/kvm/sys_regs.c | 10 +++++-----
arch/arm64/tools/sysreg | 40 +++++++++++++++++++++++++++++++++++++++
4 files changed, 50 insertions(+), 18 deletions(-)
---
base-commit: e8d018dd0257f744ca50a729e3d042cf2ec9da65
change-id: 20230419-arm64-syreg-gen-b2aa896b8af6

Best regards,
--
Mark Brown <[email protected]>

2023-05-22 16:32:25

by Mark Brown

[permalink] [raw]

Subject: [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions

---

Since there are no references to OSDTRRX_EL1 or OSECCR_EL1 in the code
just remove the definitions rather than converting to automatic
generation.

Signed-off-by: Mark Brown <[email protected]>
---
arch/arm64/include/asm/sysreg.h | 3 ---
1 file changed, 3 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 9e3ecba3c4e6..6505665624d4 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,11 +134,8 @@
#define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
#define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)

-#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
#define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
#define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
-#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
-#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
#define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
#define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
#define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)

--
2.30.2

2023-05-22 17:04:37

by Mark Brown

[permalink] [raw]

Subject: [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation

---

Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
functional change.

Signed-off-by: Mark Brown <[email protected]>
---
arch/arm64/include/asm/sysreg.h | 3 ---
arch/arm64/tools/sysreg | 5 +++++
2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 09de958e79ed..3b51e532caa9 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -140,9 +140,6 @@
#define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
#define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)

-#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
-#define OSLAR_EL1_OSLK BIT(0)
-
#define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
#define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
#define OSLSR_EL1_OSLM_NI 0
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a5ae0e19fc9f..84df0b7feb45 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -83,6 +83,11 @@ Res0 5:1
Field 0 SS
EndSysreg

+Sysreg OSLAR_EL1 2 0 1 0 4
+Res0 63:1
+Field 0 OSLK
+EndSysreg
+
Sysreg ID_PFR0_EL1 3 0 0 1 0
Res0 63:32
UnsignedEnum 31:28 RAS

--
2.30.2

2023-05-22 17:04:40

by Mark Brown

[permalink] [raw]

Subject: [PATCH 3/5] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation

---

Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03.
No functional change.

Signed-off-by: Mark Brown <[email protected]>
---
arch/arm64/include/asm/sysreg.h | 1 -
arch/arm64/tools/sysreg | 28 ++++++++++++++++++++++++++++
2 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 4e48bb4dca6a..4ecae92b56b5 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
#define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
#define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)

-#define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
#define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
#define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
#define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 1699e87bc0b4..a5ae0e19fc9f 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -55,6 +55,34 @@ Field 29 TX
Res0 28:0
EndSysreg

+Sysreg MDSCR_EL1 2 0 0 2 2
+Res0 63:36
+Field 35 EHBWE
+Field 34 EnSPM
+Field 33 TTA
+Field 32 EMBWE
+Field 31 TFO
+Field 30 RXfull
+Field 29 TXfull
+Res0 28
+Field 27 RXO
+Field 26 TXU
+Res0 25:24
+Field 23:22 INTdis
+Field 21 TDA
+Res0 20
+Field 19 SC2
+Res0 18:16
+Field 15 MDE
+Field 14 HDE
+Field 13 KDE
+Field 12 TDCC
+Res0 11:7
+Field 6 ERR
+Res0 5:1
+Field 0 SS
+EndSysreg
+
Sysreg ID_PFR0_EL1 3 0 0 1 0
Res0 63:32
UnsignedEnum 31:28 RAS

--
2.30.2

2023-05-23 08:26:15

by Oliver Upton

[permalink] [raw]

Subject: Re: [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation

---

On Mon, May 22, 2023 at 05:22:44PM +0100, Mark Brown wrote:
> Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
> functional change.
>
> Signed-off-by: Mark Brown <[email protected]>
> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> arch/arm64/tools/sysreg | 5 +++++
> 2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 09de958e79ed..3b51e532caa9 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -140,9 +140,6 @@
> #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
> #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
>
> -#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
> -#define OSLAR_EL1_OSLK BIT(0)
> -
> #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
> #define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
> #define OSLSR_EL1_OSLM_NI 0

Should the OSLSR_EL1 definitions be rolled over to the generated scheme
as well?

> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index a5ae0e19fc9f..84df0b7feb45 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -83,6 +83,11 @@ Res0 5:1
> Field 0 SS
> EndSysreg
>
> +Sysreg OSLAR_EL1 2 0 1 0 4
> +Res0 63:1
> +Field 0 OSLK
> +EndSysreg
> +
> Sysreg ID_PFR0_EL1 3 0 0 1 0
> Res0 63:32
> UnsignedEnum 31:28 RAS
>
> --
> 2.30.2
>

--
Thanks,
Oliver

2023-05-23 08:30:34

by Anshuman Khandual

[permalink] [raw]

Subject: Re: [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions

---

On 5/22/23 21:52, Mark Brown wrote:
> Since there are no references to OSDTRRX_EL1 or OSECCR_EL1 in the code
> just remove the definitions rather than converting to automatic
> generation.
>
> Signed-off-by: Mark Brown <[email protected]>

Reviewed-by: Anshuman Khandual <[email protected]>

> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 9e3ecba3c4e6..6505665624d4 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,11 +134,8 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
> #define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
> #define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> -#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
> -#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
>

2023-05-23 08:42:50

by Anshuman Khandual

[permalink] [raw]

Subject: Re: [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation

---

On 5/23/23 13:43, Oliver Upton wrote:
> On Mon, May 22, 2023 at 05:22:44PM +0100, Mark Brown wrote:
>> Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
>> functional change.
>>
>> Signed-off-by: Mark Brown <[email protected]>
>> ---
>> arch/arm64/include/asm/sysreg.h | 3 ---
>> arch/arm64/tools/sysreg | 5 +++++
>> 2 files changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
>> index 09de958e79ed..3b51e532caa9 100644
>> --- a/arch/arm64/include/asm/sysreg.h
>> +++ b/arch/arm64/include/asm/sysreg.h
>> @@ -140,9 +140,6 @@
>> #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
>> #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
>>
>> -#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
>> -#define OSLAR_EL1_OSLK BIT(0)
>> -
>> #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
>> #define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
>> #define OSLSR_EL1_OSLM_NI 0
>
> Should the OSLSR_EL1 definitions be rolled over to the generated scheme
> as well?

Agreed, was about to ask the same question :) Any reason it got skipped ?

>
>> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
>> index a5ae0e19fc9f..84df0b7feb45 100644
>> --- a/arch/arm64/tools/sysreg
>> +++ b/arch/arm64/tools/sysreg
>> @@ -83,6 +83,11 @@ Res0 5:1
>> Field 0 SS
>> EndSysreg
>>
>> +Sysreg OSLAR_EL1 2 0 1 0 4
>> +Res0 63:1
>> +Field 0 OSLK
>> +EndSysreg
>> +
>> Sysreg ID_PFR0_EL1 3 0 0 1 0
>> Res0 63:32
>> UnsignedEnum 31:28 RAS
>>
>> --
>> 2.30.2
>>
>

2023-05-23 09:05:50

by Mark Brown

[permalink] [raw]

Subject: Re: [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation

---

On Tue, May 23, 2023 at 08:13:01AM +0000, Oliver Upton wrote:
> On Mon, May 22, 2023 at 05:22:44PM +0100, Mark Brown wrote:

> > -#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
> > -#define OSLAR_EL1_OSLK BIT(0)
> > -
> > #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
> > #define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
> > #define OSLSR_EL1_OSLM_NI 0

> Should the OSLSR_EL1 definitions be rolled over to the generated scheme
> as well?

It should at some point but it has a field with non-contiguous bits
which the tool doesn't understand yet so it can wait.

---

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2023-05-23 11:50:45

by Shaoqin Huang

[permalink] [raw]

Subject: Re: [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions

---

On 5/23/23 00:22, Mark Brown wrote:
> Since there are no references to OSDTRRX_EL1 or OSECCR_EL1 in the code
> just remove the definitions rather than converting to automatic
> generation.
>
> Signed-off-by: Mark Brown <[email protected]>
Reviewed-by: Shaoqin Huang <[email protected]>
> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 9e3ecba3c4e6..6505665624d4 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,11 +134,8 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
> #define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
> #define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> -#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
> -#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
>

--
Shaoqin

2023-05-23 11:55:16

by Shaoqin Huang

[permalink] [raw]

Subject: Re: [PATCH 3/5] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation

---

On 5/23/23 00:22, Mark Brown wrote:
> Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03.
> No functional change.
>
Reviewed-by: Shaoqin Huang <[email protected]>
> Signed-off-by: Mark Brown <[email protected]>
> ---
> arch/arm64/include/asm/sysreg.h | 1 -
> arch/arm64/tools/sysreg | 28 ++++++++++++++++++++++++++++
> 2 files changed, 28 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 4e48bb4dca6a..4ecae92b56b5 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 1699e87bc0b4..a5ae0e19fc9f 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -55,6 +55,34 @@ Field 29 TX
> Res0 28:0
> EndSysreg
>
> +Sysreg MDSCR_EL1 2 0 0 2 2
> +Res0 63:36
> +Field 35 EHBWE
> +Field 34 EnSPM
> +Field 33 TTA
> +Field 32 EMBWE
> +Field 31 TFO
> +Field 30 RXfull
> +Field 29 TXfull
> +Res0 28
> +Field 27 RXO
> +Field 26 TXU
> +Res0 25:24
> +Field 23:22 INTdis
> +Field 21 TDA
> +Res0 20
> +Field 19 SC2
> +Res0 18:16
> +Field 15 MDE
> +Field 14 HDE
> +Field 13 KDE
> +Field 12 TDCC
> +Res0 11:7
> +Field 6 ERR
> +Res0 5:1
> +Field 0 SS
> +EndSysreg
> +
> Sysreg ID_PFR0_EL1 3 0 0 1 0
> Res0 63:32
> UnsignedEnum 31:28 RAS
>

--
Shaoqin

2023-05-23 12:06:49

by Shaoqin Huang

[permalink] [raw]

Subject: Re: [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation

---

On 5/23/23 00:22, Mark Brown wrote:
> Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
> functional change.
>
> Signed-off-by: Mark Brown <[email protected]>
Reviewed-by: Shaoqin Huang <[email protected]>
> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> arch/arm64/tools/sysreg | 5 +++++
> 2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 09de958e79ed..3b51e532caa9 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -140,9 +140,6 @@
> #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
> #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
>
> -#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
> -#define OSLAR_EL1_OSLK BIT(0)
> -
> #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
> #define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
> #define OSLSR_EL1_OSLM_NI 0
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index a5ae0e19fc9f..84df0b7feb45 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -83,6 +83,11 @@ Res0 5:1
> Field 0 SS
> EndSysreg
>
> +Sysreg OSLAR_EL1 2 0 1 0 4
> +Res0 63:1
> +Field 0 OSLK
> +EndSysreg
> +
> Sysreg ID_PFR0_EL1 3 0 0 1 0
> Res0 63:32
> UnsignedEnum 31:28 RAS
>

--
Shaoqin

2023-05-23 12:18:05

by Marc Zyngier

[permalink] [raw]

Subject: Re: [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions

---

On Mon, 22 May 2023 17:22:40 +0100,
Mark Brown <[email protected]> wrote:
>
> Since there are no references to OSDTRRX_EL1 or OSECCR_EL1 in the code
> just remove the definitions rather than converting to automatic
> generation.
>
> Signed-off-by: Mark Brown <[email protected]>
> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 9e3ecba3c4e6..6505665624d4 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,11 +134,8 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
> #define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
> #define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> -#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
> -#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)

These registers are in active use by the NV patches. Please leave them
where they are or convert them to be generated.

M.

--
Without deviation from the norm, progress is not possible.