2023-10-18 09:32:12

by Varadarajan Narayanan

Subject: [PATCH v3 3/8] clk: qcom: apss-ipq-pll: Fix 'l' value for ipq5332_pll_config

The earlier 'l' value of 0x3e is for 1.5GHz. Not all SKUs support
this frequency. Hence set it to 0x2d to get 1.1GHz which is
supported in all SKUs.

Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Fixes: c7ef7fbb1ccf ("clk: qcom: apss-ipq-pll: add support for IPQ5332")
Signed-off-by: Kathiravan T <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
---
drivers/clk/qcom/apss-ipq-pll.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index 18c4ffe..41279e5 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -74,7 +74,7 @@ static struct clk_alpha_pll ipq_pll_stromer_plus = {
};

static const struct alpha_pll_config ipq5332_pll_config = {
- .l = 0x3e,
+ .l = 0x2d,
.config_ctl_val = 0x4001075b,
.config_ctl_hi_val = 0x304,
.main_output_mask = BIT(0),
--
2.7.4

2023-10-19 00:01:43

by Stephen Boyd

Subject: Re: [PATCH v3 3/8] clk: qcom: apss-ipq-pll: Fix 'l' value for ipq5332_pll_config

Quoting Varadarajan Narayanan (2023-10-18 02:29:16)
> The earlier 'l' value of 0x3e is for 1.5GHz. Not all SKUs support
> this frequency. Hence set it to 0x2d to get 1.1GHz which is
> supported in all SKUs.

Maybe also add the detail to the commit text that the frequency can
still increase above this initial configuration made here when the
cpufreq driver picks a different OPP.

>
> Reviewed-by: Dmitry Baryshkov <[email protected]>
> Reviewed-by: Konrad Dybcio <[email protected]>
> Fixes: c7ef7fbb1ccf ("clk: qcom: apss-ipq-pll: add support for IPQ5332")
> Signed-off-by: Kathiravan T <[email protected]>
> Signed-off-by: Varadarajan Narayanan <[email protected]>