2014-10-08 01:03:35

by Bryan O'Donoghue

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Subject: Re: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

On 29/09/14 15:22, Weike Chen wrote:
> + .num_chipselect = 4,

How is this right ?

There's only one physical chip-select line per SPI master...

It's a 1:1 mapping.

Best,
Bryan


2014-10-08 07:48:38

by Weike Chen

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Subject: RE: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000


>
> On 29/09/14 15:22, Weike Chen wrote:
> > + .num_chipselect = 4,
>
> How is this right ?
>
> There's only one physical chip-select line per SPI master...
>
> It's a 1:1 mapping.
>
Now, we have another board which can support 4 slave spi per master, but not only Galileo. Since that board is not public, after discussing with team, we decide to make the
upstream code to support '1'.

I will change it back to
.num_chipselect = 1,


> Best,
> Bryan

2014-10-08 09:02:18

by Bryan O'Donoghue

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Subject: Re: [PATCH 2/2 v2] SPI: spi-pxa2xx: SPI support for Intel Quark X1000

On 08/10/14 08:48, Chen, Alvin wrote:

> Now, we have another board which can support 4 slave spi per master, but not only Galileo. Since that board is not public, after discussing with team, we decide to make the
> upstream code to support '1'.
>
> I will change it back to
> .num_chipselect = 1,

Hi Alvin.

The important thing in terms of Galileo is to ensure that a GPIO can be
used for chip-select.

The user-space API ported from Arduino to Linux wants to control it's
own chip-select directly - so the internal chip-select of the Quark SPI
master can - and does de-assert while doing SPI transactions on Galileo.
The CS on the master is tied to FIFO occupancy - so at higher bit-rates
we can fail to keep the FIFO occupied :(

That doesn't matter though, because the pinned out SPI:CS on the Arduino
header is a GPIO.

From the perspective of the Arduino code in user-space and the slave
hardware @ the other end of the SPI bus - we see a nice and consistent
chip-select for the entire duration of the SPI transaction - even though
the actual SPI:CS coming from the SoC can *waggle* - when FIFOs go empty.

IMO - so long as you've tested on Galileo and seen working SPI - you're
good to go anyway.

Bryan