Hello all,
This series is an extended version of the series started here[0]
and here[1].
We break out what was the first patch into one for DTS change and
one for code changes as suggested by Krzysztof. Those are now patches
1 and 8 of this series (I kept the ACKs, hope that is okay).
While I was adding that, I noticed some other dtbs_check issues,
so while here fixed some of those up too (patches 2-6).
Thanks,
Andrew
[0] https://lore.kernel.org/lkml/[email protected]/
[1] https://lore.kernel.org/linux-arm-kernel/[email protected]/
Changes from v7:
- Rebase on latest with new dts dirs
Changes from v6:
- Old first patch was taken, remove from series
- Add new patch 7/9, should be trivial enough
Changes from v5:
- Rebase on latest master
- Fix DT binding comments from Rob and add ACK
Changes from v4:
- Rebase on latest master
Changes from v3:
- Add Reviewed-by
- Make new binding for patch #1
Changes from v2:
- See cover letter message
Changes from v1:
- Add ACKs
- Rebase on latest
Andrew Davis (9):
ARM: dts: nspire: Use syscon-reboot to handle restart
ARM: dts: nspire: Fix cpu node to conform with DT binding
ARM: dts: nspire: Fix sram node to conform with DT binding
ARM: dts: nspire: Fix vbus_reg node to conform with DT binding
ARM: dts: nspire: Fix uart node to conform with DT binding
ARM: dts: nspire: Use MATRIX_KEY macro for linux,keymap
ARM: dts: nspire: Remove file name from the files themselves
ARM: nspire: Use syscon-reboot to handle restart
ARM: nspire: Remove unused header file mmio.h
arch/arm/boot/dts/nspire/nspire-classic.dtsi | 2 -
arch/arm/boot/dts/nspire/nspire-clp.dts | 93 ++++++++++++++-----
arch/arm/boot/dts/nspire/nspire-cx.dts | 95 ++++++++++++++------
arch/arm/boot/dts/nspire/nspire-tp.dts | 93 ++++++++++++++-----
arch/arm/boot/dts/nspire/nspire.dtsi | 26 ++++--
arch/arm/mach-nspire/Kconfig | 2 +
arch/arm/mach-nspire/mmio.h | 16 ----
arch/arm/mach-nspire/nspire.c | 24 -----
8 files changed, 231 insertions(+), 120 deletions(-)
delete mode 100644 arch/arm/mach-nspire/mmio.h
--
2.39.2
Writing this bit can be handled by the DT syscon-reboot driver.
Enable that driver and remove the machine_desc version.
Signed-off-by: Andrew Davis <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Tested-by: Fabian Vogt <[email protected]>
Reviewed-by: Fabian Vogt <[email protected]>
---
arch/arm/mach-nspire/Kconfig | 2 ++
arch/arm/mach-nspire/mmio.h | 3 ---
arch/arm/mach-nspire/nspire.c | 10 ----------
3 files changed, 2 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-nspire/Kconfig b/arch/arm/mach-nspire/Kconfig
index b7a3871876d75..0ffdcaca1e6b4 100644
--- a/arch/arm/mach-nspire/Kconfig
+++ b/arch/arm/mach-nspire/Kconfig
@@ -9,5 +9,7 @@ config ARCH_NSPIRE
select ARM_VIC
select ARM_TIMER_SP804
select NSPIRE_TIMER
+ select POWER_RESET
+ select POWER_RESET_SYSCON
help
This enables support for systems using the TI-NSPIRE CPU
diff --git a/arch/arm/mach-nspire/mmio.h b/arch/arm/mach-nspire/mmio.h
index 48e32f13f3119..2ce0656139ece 100644
--- a/arch/arm/mach-nspire/mmio.h
+++ b/arch/arm/mach-nspire/mmio.h
@@ -5,9 +5,6 @@
* Copyright (C) 2013 Daniel Tang <[email protected]>
*/
-#define NSPIRE_MISC_PHYS_BASE 0x900A0000
-#define NSPIRE_MISC_HWRESET 0x08
-
#define NSPIRE_PWR_PHYS_BASE 0x900B0000
#define NSPIRE_PWR_VIRT_BASE 0xFEEB0000
#define NSPIRE_PWR_BUS_DISABLE1 0x18
diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c
index 2d4abb0288b9d..1e13337972dd5 100644
--- a/arch/arm/mach-nspire/nspire.c
+++ b/arch/arm/mach-nspire/nspire.c
@@ -27,16 +27,6 @@ static const char *const nspire_dt_match[] __initconst = {
NULL,
};
-static void nspire_restart(enum reboot_mode mode, const char *cmd)
-{
- void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K);
- if (!base)
- return;
-
- writel(2, base + NSPIRE_MISC_HWRESET);
-}
-
DT_MACHINE_START(NSPIRE, "TI-NSPIRE")
.dt_compat = nspire_dt_match,
- .restart = nspire_restart,
MACHINE_END
--
2.39.2
This node does not follow the DT binding schema, correct this.
Should result in no functional change.
Signed-off-by: Andrew Davis <[email protected]>
---
arch/arm/boot/dts/nspire/nspire.dtsi | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/nspire/nspire.dtsi b/arch/arm/boot/dts/nspire/nspire.dtsi
index cb72370515126..f979b28e2576e 100644
--- a/arch/arm/boot/dts/nspire/nspire.dtsi
+++ b/arch/arm/boot/dts/nspire/nspire.dtsi
@@ -26,8 +26,15 @@ bootrom: bootrom@0 {
};
sram: sram@a4000000 {
- device = "memory";
- reg = <0xa4000000 0x20000>;
+ compatible = "mmio-sram";
+ reg = <0xa4000000 0x20000>; /* 128k */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xa4000000 0x20000>;
+
+ sram@0 {
+ reg = <0x0 0x20000>;
+ };
};
timer_clk: timer_clk {
--
2.39.2
Hi,
Am Mittwoch, 2. August 2023, 17:33:24 CEST schrieb Andrew Davis:
> Hello all,
>
> This series is an extended version of the series started here[0]
> and here[1].
>
> We break out what was the first patch into one for DTS change and
> one for code changes as suggested by Krzysztof. Those are now patches
> 1 and 8 of this series (I kept the ACKs, hope that is okay).
>
> While I was adding that, I noticed some other dtbs_check issues,
> so while here fixed some of those up too (patches 2-6).
Whole series applied on top of cacc6e22932f and confirmed to work:
Tested-by: Fabian Vogt <[email protected]>
Thanks,
Fabian
> Thanks,
> Andrew
>
> [0] https://lore.kernel.org/lkml/[email protected]/
> [1] https://lore.kernel.org/linux-arm-kernel/[email protected]/
>
> Changes from v7:
> - Rebase on latest with new dts dirs
>
> Changes from v6:
> - Old first patch was taken, remove from series
> - Add new patch 7/9, should be trivial enough
>
> Changes from v5:
> - Rebase on latest master
> - Fix DT binding comments from Rob and add ACK
>
> Changes from v4:
> - Rebase on latest master
>
> Changes from v3:
> - Add Reviewed-by
> - Make new binding for patch #1
>
> Changes from v2:
> - See cover letter message
>
> Changes from v1:
> - Add ACKs
> - Rebase on latest
>
> Andrew Davis (9):
> ARM: dts: nspire: Use syscon-reboot to handle restart
> ARM: dts: nspire: Fix cpu node to conform with DT binding
> ARM: dts: nspire: Fix sram node to conform with DT binding
> ARM: dts: nspire: Fix vbus_reg node to conform with DT binding
> ARM: dts: nspire: Fix uart node to conform with DT binding
> ARM: dts: nspire: Use MATRIX_KEY macro for linux,keymap
> ARM: dts: nspire: Remove file name from the files themselves
> ARM: nspire: Use syscon-reboot to handle restart
> ARM: nspire: Remove unused header file mmio.h
>
> arch/arm/boot/dts/nspire/nspire-classic.dtsi | 2 -
> arch/arm/boot/dts/nspire/nspire-clp.dts | 93 ++++++++++++++-----
> arch/arm/boot/dts/nspire/nspire-cx.dts | 95 ++++++++++++++------
> arch/arm/boot/dts/nspire/nspire-tp.dts | 93 ++++++++++++++-----
> arch/arm/boot/dts/nspire/nspire.dtsi | 26 ++++--
> arch/arm/mach-nspire/Kconfig | 2 +
> arch/arm/mach-nspire/mmio.h | 16 ----
> arch/arm/mach-nspire/nspire.c | 24 -----
> 8 files changed, 231 insertions(+), 120 deletions(-)
> delete mode 100644 arch/arm/mach-nspire/mmio.h
On Fri, Aug 11, 2023, at 17:13, Fabian Vogt wrote:
> Hi,
>
> Am Mittwoch, 2. August 2023, 17:33:24 CEST schrieb Andrew Davis:
>> Hello all,
>>
>> This series is an extended version of the series started here[0]
>> and here[1].
>>
>> We break out what was the first patch into one for DTS change and
>> one for code changes as suggested by Krzysztof. Those are now patches
>> 1 and 8 of this series (I kept the ACKs, hope that is okay).
>>
>> While I was adding that, I noticed some other dtbs_check issues,
>> so while here fixed some of those up too (patches 2-6).
>
> Whole series applied on top of cacc6e22932f and confirmed to work:
>
> Tested-by: Fabian Vogt <[email protected]>
I've added all 9 patches to the soc tree now, the first seven
in the soc/dt branch, the other two in the soc/arm branch.
This does mean that the soc/arm branch has a minor regression
when tested by itself, as it won't be able to restart the
system, which is a regression we'd still get with old dtb
files, but I think this is acceptable here since it does not
impact normal operation, and there is a very small user base
that is affected by this.
Thanks,
Arnd