On 2/26/24 16:03, WangYuli wrote:
> Both crc32 and crc32c hw accelerated funcs will calculate the
> remaining len. Those codes are derived from
> arch/mips/crypto/crc32-mips.c and "len -= sizeof(u32)" is not
> necessary for 64-bit CPUs.
>
> Removing it can make context code style more unified and improve
> code readability.
>
> Suggested-by: Guan Wentao <[email protected]>
> Signed-off-by: WangYuli <[email protected]>
> ---
> arch/loongarch/crypto/crc32-loongarch.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/loongarch/crypto/crc32-loongarch.c b/arch/loongarch/crypto/crc32-loongarch.c
> index a49e507af38c..3eebea3a7b47 100644
> --- a/arch/loongarch/crypto/crc32-loongarch.c
> +++ b/arch/loongarch/crypto/crc32-loongarch.c
> @@ -44,7 +44,6 @@ static u32 crc32_loongarch_hw(u32 crc_, const u8 *p, unsigned int len)
>
> CRC32(crc, value, w);
> p += sizeof(u32);
> - len -= sizeof(u32);
> }
>
> if (len & sizeof(u16)) {
> @@ -80,7 +79,6 @@ static u32 crc32c_loongarch_hw(u32 crc_, const u8 *p, unsigned int len)
>
> CRC32C(crc, value, w);
> p += sizeof(u32);
> - len -= sizeof(u32);
> }
>
> if (len & sizeof(u16)) {
Sure, but IIRC Loongson still has hopes in having 32-bit-only models
support upstream? The possibility cannot be ruled out because from
public information (e.g. the 2023-11-28 news event), Loongson is known
to be actively licensing their reduced 32-bit-only IP cores to third
parties.
Ultimately whether we want to imply 64-bit operation with the crc32
module is up to Loongson to decide, and I think Huacai may have
something to add, but IMO at least we could gate the statement with
#ifdef's so we don't outright lose 32-bit compatibility with this code.
--
WANG "xen0n" Xuerui
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