LinuxLists.cc - [PATCH 0/2 v2] pci: change PCI nomenclature according to PCI-SIG

2009-12-03 11:49:42

Subject: [PATCH 0/2 v2] pci: change PCI nomenclature according to PCI-SIG

Hi,

the following patch queue changes variants of PCI-X and PCIe to the terms
listed in the "Trademark and Logo Usage Guidelines".
http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf

Due to comments from Jeff Garzik and others changes are limited to drivers/pci/
for now and split up into comment changes and non-comment changes for easier
reviewing.
Patches are based on 2.6.32.

If this works out I'd like to follow up with patches for the individual
device drivers with the concerning maintainers in Cc.

Stefan
--
Stefan Assmann | Red Hat GmbH
Software Engineer | Otto-Hahn-Strasse 20, 85609 Dornach
| HR: Amtsgericht Muenchen HRB 153243
| GF: Brendan Lane, Charlie Peters,
sassmann at redhat.com | Michael Cunningham, Charles Cachera

2009-12-03 11:49:52

by Stefan Assmann

[permalink] [raw]

Subject: [PATCH 1/2 v2] pci: change PCI nomenclature in drivers/pci/ (comment changes)

From: Stefan Assmann <[email protected]>

Changing occurrences of variants of PCI-X and PCIe to the PCI-SIG
terms listed in the "Trademark and Logo Usage Guidelines".
http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf

Patch is limited to drivers/pci/ and changes concern comments only.

Signed-off-by: Stefan Assmann <[email protected]>
---
drivers/pci/hotplug/shpchp.h | 2 +-
drivers/pci/intel-iommu.c | 6 +++---
drivers/pci/intr_remapping.c | 2 +-
drivers/pci/pci.c | 6 +++---
drivers/pci/pcie/aer/aer_inject.c | 4 ++--
drivers/pci/pcie/aer/aerdrv.c | 2 +-
drivers/pci/pcie/aer/aerdrv_acpi.c | 2 +-
drivers/pci/pcie/aer/aerdrv_core.c | 6 +++---
drivers/pci/pcie/aspm.c | 4 ++--
drivers/pci/search.c | 6 +++---
10 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h
index bd588eb..8e210cd 100644
--- a/drivers/pci/hotplug/shpchp.h
+++ b/drivers/pci/hotplug/shpchp.h
@@ -121,7 +121,7 @@ struct controller {
#define PCI_DEVICE_ID_AMD_GOLAM_7450 0x7450
#define PCI_DEVICE_ID_AMD_POGO_7458 0x7458

-/* AMD PCIX bridge registers */
+/* AMD PCI-X bridge registers */
#define PCIX_MEM_BASE_LIMIT_OFFSET 0x1C
#define PCIX_MISCII_OFFSET 0x48
#define PCIX_MISC_BRIDGE_ERRORS_OFFSET 0x80
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 1840a05..306a2eb 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -304,7 +304,7 @@ struct device_domain_info {
int segment; /* PCI domain */
u8 bus; /* PCI bus number */
u8 devfn; /* PCI devfn number */
- struct pci_dev *dev; /* it's NULL for PCIE-to-PCI bridge */
+ struct pci_dev *dev; /* it's NULL for PCIe-to-PCI bridge */
struct intel_iommu *iommu; /* IOMMU used by this device */
struct dmar_domain *domain; /* pointer to domain */
};
@@ -1611,7 +1611,7 @@ domain_context_mapping(struct dmar_domain *domain, struct pci_dev *pdev,
return ret;
parent = parent->bus->self;
}
- if (tmp->is_pcie) /* this is a PCIE-to-PCI bridge */
+ if (tmp->is_pcie) /* this is a PCIe-to-PCI bridge */
return domain_context_mapping_one(domain,
pci_domain_nr(tmp->subordinate),
tmp->subordinate->number, 0,
@@ -3317,7 +3317,7 @@ static void iommu_detach_dependent_devices(struct intel_iommu *iommu,
parent->devfn);
parent = parent->bus->self;
}
- if (tmp->is_pcie) /* this is a PCIE-to-PCI bridge */
+ if (tmp->is_pcie) /* this is a PCIe-to-PCI bridge */
iommu_detach_dev(iommu,
tmp->subordinate->number, 0);
else /* this is a legacy PCI bridge */
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index 0ed78a7..cd9712d 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -486,7 +486,7 @@ int set_msi_sid(struct irte *irte, struct pci_dev *dev)

bridge = pci_find_upstream_pcie_bridge(dev);
if (bridge) {
- if (bridge->is_pcie) /* this is a PCIE-to-PCI/PCIX bridge */
+ if (bridge->is_pcie) /* this is a PCIe-to-PCI/PCI-X bridge */
set_irte_sid(irte, SVT_VERIFY_BUS, SQ_ALL_16,
(bridge->bus->number << 8) | dev->bus->number);
else /* this is a legacy PCI bridge */
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 4e4c295..4d2c096 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1140,11 +1140,11 @@ pci_disable_device(struct pci_dev *dev)

/**
* pcibios_set_pcie_reset_state - set reset state for device dev
- * @dev: the PCI-E device reset
+ * @dev: the PCIe device reset
* @state: Reset state to enter into
*
*
- * Sets the PCI-E reset state for the device. This is the default
+ * Sets the PCIe reset state for the device. This is the default
* implementation. Architecture implementations can override this.
*/
int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev,
@@ -1155,7 +1155,7 @@ int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev,

/**
* pci_set_pcie_reset_state - set reset state for device dev
- * @dev: the PCI-E device reset
+ * @dev: the PCIe device reset
* @state: Reset state to enter into
*
*
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 62d15f6..a21dee3 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -1,7 +1,7 @@
/*
- * PCIE AER software error injection support.
+ * PCIe AER software error injection support.
*
- * Debuging PCIE AER code is quite difficult because it is hard to
+ * Debuging PCIe AER code is quite difficult because it is hard to
* trigger various real hardware errors. Software based error
* injection can fake almost all kinds of errors with the help of a
* user space helper tool aer-inject, which can be gotten from:
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 40c3cc5..499aacd 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -155,7 +155,7 @@ static struct aer_rpc *aer_alloc_rpc(struct pcie_device *dev)
mutex_init(&rpc->rpc_mutex);
init_waitqueue_head(&rpc->wait_release);

- /* Use PCIE bus function to store rpc into PCIE device */
+ /* Use PCIe bus function to store rpc into PCIe device */
set_service_data(dev, rpc);

return rpc;
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 8edb2f3..0481408 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -24,7 +24,7 @@
*
* @return: Zero on success. Nonzero otherwise.
*
- * Invoked when PCIE bus loads AER service driver. To avoid conflict with
+ * Invoked when PCIe bus loads AER service driver. To avoid conflict with
* BIOS AER support requires BIOS to yield AER control to OS native driver.
**/
int aer_osc_setup(struct pcie_device *pciedev)
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index 9f5ccbe..9ab97a8 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -603,7 +603,7 @@ static void handle_error_source(struct pcie_device *aerdev,
* aer_enable_rootport - enable Root Port's interrupts when receiving messages
* @rpc: pointer to a Root Port data structure
*
- * Invoked when PCIE bus loads AER service driver.
+ * Invoked when PCIe bus loads AER service driver.
*/
void aer_enable_rootport(struct aer_rpc *rpc)
{
@@ -613,7 +613,7 @@ void aer_enable_rootport(struct aer_rpc *rpc)
u32 reg32;

pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
- /* Clear PCIE Capability's Device Status */
+ /* Clear PCIe Capability's Device Status */
pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);

@@ -647,7 +647,7 @@ void aer_enable_rootport(struct aer_rpc *rpc)
* disable_root_aer - disable Root Port's interrupts when receiving messages
* @rpc: pointer to a Root Port data structure
*
- * Invoked when PCIE bus unloads AER service driver.
+ * Invoked when PCIe bus unloads AER service driver.
*/
static void disable_root_aer(struct aer_rpc *rpc)
{
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 5b7056c..1dd123e 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -1,6 +1,6 @@
/*
* File: drivers/pci/pcie/aspm.c
- * Enabling PCIE link L0s/L1 state and Clock Power Management
+ * Enabling PCIe link L0s/L1 state and Clock Power Management
*
* Copyright (C) 2007 Intel
* Copyright (C) Zhang Yanmin ([email protected])
@@ -499,7 +499,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
int pos;
u32 reg32;
/*
- * Some functions in a slot might not all be PCIE functions,
+ * Some functions in a slot might not all be PCIe functions,
* very strange. Disable ASPM for the whole slot
*/
list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
diff --git a/drivers/pci/search.c b/drivers/pci/search.c
index ec41535..1873188 100644
--- a/drivers/pci/search.c
+++ b/drivers/pci/search.c
@@ -15,9 +15,9 @@

DECLARE_RWSEM(pci_bus_sem);
/*
- * find the upstream PCIE-to-PCI bridge of a PCI device
+ * find the upstream PCIe-to-PCI bridge of a PCI device
* if the device is PCIE, return NULL
- * if the device isn't connected to a PCIE bridge (that is its parent is a
+ * if the device isn't connected to a PCIe bridge (that is its parent is a
* legacy PCI bridge and the bridge is directly connected to bus 0), return its
* parent
*/
@@ -37,7 +37,7 @@ pci_find_upstream_pcie_bridge(struct pci_dev *pdev)
tmp = pdev;
continue;
}
- /* PCI device should connect to a PCIE bridge */
+ /* PCI device should connect to a PCIe bridge */
if (pdev->pcie_type != PCI_EXP_TYPE_PCI_BRIDGE) {
/* Busted hardware? */
WARN_ON_ONCE(1);
--
1.6.5.2

2009-12-03 11:49:56

by Stefan Assmann

[permalink] [raw]

Subject: [PATCH 2/2 v2] pci: change PCI nomenclature in drivers/pci/ (non-comment changes)

2009-12-03 16:27:24

by Andrew Patterson

[permalink] [raw]

Subject: Re: [PATCH 2/2 v2] pci: change PCI nomenclature in drivers/pci/ (non-comment changes)

On Thu, 2009-12-03 at 06:49 -0500, Stefan Assmann wrote:
> From: Stefan Assmann <[email protected]>
>
> Changing occurrences of variants of PCI-X and PCIe to the PCI-SIG
> terms listed in the "Trademark and Logo Usage Guidelines".
> http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf
>
> Patch is limited to drivers/pci/ and changes concern non-comment parts or
> anything that might be visible to the user.
>
> Signed-off-by: Stefan Assmann <[email protected]>
> ---
> drivers/pci/hotplug/pci_hotplug_core.c | 22 +++++++++++-----------
> drivers/pci/pcie/aer/Kconfig.debug | 4 ++--
> drivers/pci/pcie/aer/aer_inject.c | 2 +-
> drivers/pci/pcie/aer/aerdrv_errprint.c | 4 ++--
> drivers/pci/pcie/portdrv_pci.c | 2 +-
> 5 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/pci/hotplug/pci_hotplug_core.c b/drivers/pci/hotplug/pci_hotplug_core.c
> index 0325d98..38183a5 100644
> --- a/drivers/pci/hotplug/pci_hotplug_core.c
> +++ b/drivers/pci/hotplug/pci_hotplug_core.c
> @@ -68,26 +68,26 @@ static DEFINE_MUTEX(pci_hp_mutex);
> static char *pci_bus_speed_strings[] = {
> "33 MHz PCI", /* 0x00 */
> "66 MHz PCI", /* 0x01 */
> - "66 MHz PCIX", /* 0x02 */
> - "100 MHz PCIX", /* 0x03 */
> - "133 MHz PCIX", /* 0x04 */
> + "66 MHz PCI-X", /* 0x02 */
> + "100 MHz PCI-X", /* 0x03 */
> + "133 MHz PCI-X", /* 0x04 */
> NULL, /* 0x05 */
> NULL, /* 0x06 */
> NULL, /* 0x07 */
> NULL, /* 0x08 */
> - "66 MHz PCIX 266", /* 0x09 */
> - "100 MHz PCIX 266", /* 0x0a */
> - "133 MHz PCIX 266", /* 0x0b */
> + "66 MHz PCI-X 266", /* 0x09 */
> + "100 MHz PCI-X 266", /* 0x0a */
> + "133 MHz PCI-X 266", /* 0x0b */
> NULL, /* 0x0c */
> NULL, /* 0x0d */
> NULL, /* 0x0e */
> NULL, /* 0x0f */
> NULL, /* 0x10 */
> - "66 MHz PCIX 533", /* 0x11 */
> - "100 MHz PCIX 533", /* 0x12 */
> - "133 MHz PCIX 533", /* 0x13 */
> - "2.5 GT/s PCI-E", /* 0x14 */
> - "5.0 GT/s PCI-E", /* 0x15 */
> + "66 MHz PCI-X 533", /* 0x11 */
> + "100 MHz PCI-X 533", /* 0x12 */
> + "133 MHz PCI-X 533", /* 0x13 */
> + "2.5 GT/s PCIe", /* 0x14 */
> + "5.0 GT/s PCIe", /* 0x15 */
> };
>
> #ifdef CONFIG_HOTPLUG_PCI_CPCI
> diff --git a/drivers/pci/pcie/aer/Kconfig.debug b/drivers/pci/pcie/aer/Kconfig.debug
> index b8c925c..edfe756 100644
> --- a/drivers/pci/pcie/aer/Kconfig.debug
> +++ b/drivers/pci/pcie/aer/Kconfig.debug
> @@ -3,14 +3,14 @@
> #
>
> config PCIEAER_INJECT
> - tristate "PCIE AER error injector support"
> + tristate "PCIe AER error injector support"
> depends on PCIEAER
> default n
> help
> This enables PCI Express Root Port Advanced Error Reporting
> (AER) software error injector.
>
> - Debuging PCIE AER code is quite difficult because it is hard
> + Debuging PCIe AER code is quite difficult because it is hard

Why not fix the typo while changing this line. "Debuging" shoud be
"Debugging".

> to trigger various real hardware errors. Software based
> error injection can fake almost all kinds of errors with the
> help of a user space helper tool aer-inject, which can be
> diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
> index a21dee3..8e056f2 100644
> --- a/drivers/pci/pcie/aer/aer_inject.c
> +++ b/drivers/pci/pcie/aer/aer_inject.c
> @@ -462,5 +462,5 @@ static void __exit aer_inject_exit(void)
> module_init(aer_inject_init);
> module_exit(aer_inject_exit);
>
> -MODULE_DESCRIPTION("PCIE AER software error injector");
> +MODULE_DESCRIPTION("PCIe AER software error injector");
> MODULE_LICENSE("GPL");
> diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c
> index 44acde7..9d3e4c8 100644
> --- a/drivers/pci/pcie/aer/aerdrv_errprint.c
> +++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
> @@ -184,7 +184,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
>
> if (info->status == 0) {
> AER_PR(info, dev,
> - "PCIE Bus Error: severity=%s, type=Unaccessible, "
> + "PCIe Bus Error: severity=%s, type=Unaccessible, "
> "id=%04x(Unregistered Agent ID)\n",
> aer_error_severity_string[info->severity], id);
> } else {
> @@ -194,7 +194,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
> agent = AER_GET_AGENT(info->severity, info->status);
>
> AER_PR(info, dev,
> - "PCIE Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
> + "PCIe Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
> aer_error_severity_string[info->severity],
> aer_error_layer[layer], id, aer_agent_string[agent]);
>
> diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
> index f635e47..6788d0f 100644
> --- a/drivers/pci/pcie/portdrv_pci.c
> +++ b/drivers/pci/pcie/portdrv_pci.c
> @@ -24,7 +24,7 @@
> */
> #define DRIVER_VERSION "v1.0"
> #define DRIVER_AUTHOR "[email protected]"
> -#define DRIVER_DESC "PCIE Port Bus Driver"
> +#define DRIVER_DESC "PCIe Port Bus Driver"
> MODULE_AUTHOR(DRIVER_AUTHOR);
> MODULE_DESCRIPTION(DRIVER_DESC);
> MODULE_LICENSE("GPL");

--
Andrew Patterson
Hewlett-Packard

2009-12-03 17:02:30

by Stefan Assmann

[permalink] [raw]

Subject: Re: [PATCH 2/2 v2] pci: change PCI nomenclature in drivers/pci/ (non-comment changes)

On 03.12.2009 17:27, Andrew Patterson wrote:
> On Thu, 2009-12-03 at 06:49 -0500, Stefan Assmann wrote:
>> From: Stefan Assmann <[email protected]>
>>
>> Changing occurrences of variants of PCI-X and PCIe to the PCI-SIG
>> terms listed in the "Trademark and Logo Usage Guidelines".
>> http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf
>>
>> Patch is limited to drivers/pci/ and changes concern non-comment parts or
>> anything that might be visible to the user.
>>
>> Signed-off-by: Stefan Assmann <[email protected]>
>> ---

[...]

>> diff --git a/drivers/pci/pcie/aer/Kconfig.debug b/drivers/pci/pcie/aer/Kconfig.debug
>> index b8c925c..edfe756 100644
>> --- a/drivers/pci/pcie/aer/Kconfig.debug
>> +++ b/drivers/pci/pcie/aer/Kconfig.debug
>> @@ -3,14 +3,14 @@
>> #
>>
>> config PCIEAER_INJECT
>> - tristate "PCIE AER error injector support"
>> + tristate "PCIe AER error injector support"
>> depends on PCIEAER
>> default n
>> help
>> This enables PCI Express Root Port Advanced Error Reporting
>> (AER) software error injector.
>>
>> - Debuging PCIE AER code is quite difficult because it is hard
>> + Debuging PCIe AER code is quite difficult because it is hard
>
> Why not fix the typo while changing this line. "Debuging" shoud be
> "Debugging".
>

Thanks Andrew, I just didn't see it. Here's the new patch. Patch #1
has the same typo, so I'll repost that one as well.

Stefan

From: Stefan Assmann <[email protected]>

Changing occurrences of variants of PCI-X and PCIe to the PCI-SIG
terms listed in the "Trademark and Logo Usage Guidelines".
http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf

Patch is limited to drivers/pci/ and changes concern non-comment parts or
anything that might be visible to the user.

Signed-off-by: Stefan Assmann <[email protected]>
---
drivers/pci/hotplug/pci_hotplug_core.c | 22 +++++++++++-----------
drivers/pci/pcie/aer/Kconfig.debug | 4 ++--
drivers/pci/pcie/aer/aer_inject.c | 2 +-
drivers/pci/pcie/aer/aerdrv_errprint.c | 4 ++--
drivers/pci/pcie/portdrv_pci.c | 2 +-
5 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/pci/hotplug/pci_hotplug_core.c b/drivers/pci/hotplug/pci_hotplug_core.c
index 0325d98..38183a5 100644
--- a/drivers/pci/hotplug/pci_hotplug_core.c
+++ b/drivers/pci/hotplug/pci_hotplug_core.c
@@ -68,26 +68,26 @@ static DEFINE_MUTEX(pci_hp_mutex);
static char *pci_bus_speed_strings[] = {
"33 MHz PCI", /* 0x00 */
"66 MHz PCI", /* 0x01 */
- "66 MHz PCIX", /* 0x02 */
- "100 MHz PCIX", /* 0x03 */
- "133 MHz PCIX", /* 0x04 */
+ "66 MHz PCI-X", /* 0x02 */
+ "100 MHz PCI-X", /* 0x03 */
+ "133 MHz PCI-X", /* 0x04 */
NULL, /* 0x05 */
NULL, /* 0x06 */
NULL, /* 0x07 */
NULL, /* 0x08 */
- "66 MHz PCIX 266", /* 0x09 */
- "100 MHz PCIX 266", /* 0x0a */
- "133 MHz PCIX 266", /* 0x0b */
+ "66 MHz PCI-X 266", /* 0x09 */
+ "100 MHz PCI-X 266", /* 0x0a */
+ "133 MHz PCI-X 266", /* 0x0b */
NULL, /* 0x0c */
NULL, /* 0x0d */
NULL, /* 0x0e */
NULL, /* 0x0f */
NULL, /* 0x10 */
- "66 MHz PCIX 533", /* 0x11 */
- "100 MHz PCIX 533", /* 0x12 */
- "133 MHz PCIX 533", /* 0x13 */
- "2.5 GT/s PCI-E", /* 0x14 */
- "5.0 GT/s PCI-E", /* 0x15 */
+ "66 MHz PCI-X 533", /* 0x11 */
+ "100 MHz PCI-X 533", /* 0x12 */
+ "133 MHz PCI-X 533", /* 0x13 */
+ "2.5 GT/s PCIe", /* 0x14 */
+ "5.0 GT/s PCIe", /* 0x15 */
};

#ifdef CONFIG_HOTPLUG_PCI_CPCI
diff --git a/drivers/pci/pcie/aer/Kconfig.debug b/drivers/pci/pcie/aer/Kconfig.debug
index b8c925c..edfe756 100644
--- a/drivers/pci/pcie/aer/Kconfig.debug
+++ b/drivers/pci/pcie/aer/Kconfig.debug
@@ -3,14 +3,14 @@
#

config PCIEAER_INJECT
- tristate "PCIE AER error injector support"
+ tristate "PCIe AER error injector support"
depends on PCIEAER
default n
help
This enables PCI Express Root Port Advanced Error Reporting
(AER) software error injector.

- Debuging PCIE AER code is quite difficult because it is hard
+ Debugging PCIe AER code is quite difficult because it is hard
to trigger various real hardware errors. Software based
error injection can fake almost all kinds of errors with the
help of a user space helper tool aer-inject, which can be
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index a21dee3..8e056f2 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -462,5 +462,5 @@ static void __exit aer_inject_exit(void)
module_init(aer_inject_init);
module_exit(aer_inject_exit);

-MODULE_DESCRIPTION("PCIE AER software error injector");
+MODULE_DESCRIPTION("PCIe AER software error injector");
MODULE_LICENSE("GPL");
diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c
index 44acde7..9d3e4c8 100644
--- a/drivers/pci/pcie/aer/aerdrv_errprint.c
+++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
@@ -184,7 +184,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)

if (info->status == 0) {
AER_PR(info, dev,
- "PCIE Bus Error: severity=%s, type=Unaccessible, "
+ "PCIe Bus Error: severity=%s, type=Unaccessible, "
"id=%04x(Unregistered Agent ID)\n",
aer_error_severity_string[info->severity], id);
} else {
@@ -194,7 +194,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
agent = AER_GET_AGENT(info->severity, info->status);

AER_PR(info, dev,
- "PCIE Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
+ "PCIe Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
aer_error_severity_string[info->severity],
aer_error_layer[layer], id, aer_agent_string[agent]);

diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index f635e47..6788d0f 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -24,7 +24,7 @@
*/
#define DRIVER_VERSION "v1.0"
#define DRIVER_AUTHOR "[email protected]"
-#define DRIVER_DESC "PCIE Port Bus Driver"
+#define DRIVER_DESC "PCIe Port Bus Driver"
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
--
1.6.5.2

2009-12-03 17:06:45

by Stefan Assmann

[permalink] [raw]

Subject: Re: [PATCH 1/2 v2] pci: change PCI nomenclature in drivers/pci/ (comment changes)

repost with typo "Debuging" fixed as in patch #2.

From: Stefan Assmann <[email protected]>

Changing occurrences of variants of PCI-X and PCIe to the PCI-SIG
terms listed in the "Trademark and Logo Usage Guidelines".
http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf

Patch is limited to drivers/pci/ and changes concern comments only.

Signed-off-by: Stefan Assmann <[email protected]>
---
drivers/pci/hotplug/shpchp.h | 2 +-
drivers/pci/intel-iommu.c | 6 +++---
drivers/pci/intr_remapping.c | 2 +-
drivers/pci/pci.c | 6 +++---
drivers/pci/pcie/aer/aer_inject.c | 4 ++--
drivers/pci/pcie/aer/aerdrv.c | 2 +-
drivers/pci/pcie/aer/aerdrv_acpi.c | 2 +-
drivers/pci/pcie/aer/aerdrv_core.c | 6 +++---
drivers/pci/pcie/aspm.c | 4 ++--
drivers/pci/search.c | 6 +++---
10 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h
index bd588eb..8e210cd 100644
--- a/drivers/pci/hotplug/shpchp.h
+++ b/drivers/pci/hotplug/shpchp.h
@@ -121,7 +121,7 @@ struct controller {
#define PCI_DEVICE_ID_AMD_GOLAM_7450 0x7450
#define PCI_DEVICE_ID_AMD_POGO_7458 0x7458

-/* AMD PCIX bridge registers */
+/* AMD PCI-X bridge registers */
#define PCIX_MEM_BASE_LIMIT_OFFSET 0x1C
#define PCIX_MISCII_OFFSET 0x48
#define PCIX_MISC_BRIDGE_ERRORS_OFFSET 0x80
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 1840a05..306a2eb 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -304,7 +304,7 @@ struct device_domain_info {
int segment; /* PCI domain */
u8 bus; /* PCI bus number */
u8 devfn; /* PCI devfn number */
- struct pci_dev *dev; /* it's NULL for PCIE-to-PCI bridge */
+ struct pci_dev *dev; /* it's NULL for PCIe-to-PCI bridge */
struct intel_iommu *iommu; /* IOMMU used by this device */
struct dmar_domain *domain; /* pointer to domain */
};
@@ -1611,7 +1611,7 @@ domain_context_mapping(struct dmar_domain *domain, struct pci_dev *pdev,
return ret;
parent = parent->bus->self;
}
- if (tmp->is_pcie) /* this is a PCIE-to-PCI bridge */
+ if (tmp->is_pcie) /* this is a PCIe-to-PCI bridge */
return domain_context_mapping_one(domain,
pci_domain_nr(tmp->subordinate),
tmp->subordinate->number, 0,
@@ -3317,7 +3317,7 @@ static void iommu_detach_dependent_devices(struct intel_iommu *iommu,
parent->devfn);
parent = parent->bus->self;
}
- if (tmp->is_pcie) /* this is a PCIE-to-PCI bridge */
+ if (tmp->is_pcie) /* this is a PCIe-to-PCI bridge */
iommu_detach_dev(iommu,
tmp->subordinate->number, 0);
else /* this is a legacy PCI bridge */
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index 0ed78a7..cd9712d 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -486,7 +486,7 @@ int set_msi_sid(struct irte *irte, struct pci_dev *dev)

bridge = pci_find_upstream_pcie_bridge(dev);
if (bridge) {
- if (bridge->is_pcie) /* this is a PCIE-to-PCI/PCIX bridge */
+ if (bridge->is_pcie) /* this is a PCIe-to-PCI/PCI-X bridge */
set_irte_sid(irte, SVT_VERIFY_BUS, SQ_ALL_16,
(bridge->bus->number << 8) | dev->bus->number);
else /* this is a legacy PCI bridge */
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 4e4c295..4d2c096 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1140,11 +1140,11 @@ pci_disable_device(struct pci_dev *dev)

/**
* pcibios_set_pcie_reset_state - set reset state for device dev
- * @dev: the PCI-E device reset
+ * @dev: the PCIe device reset
* @state: Reset state to enter into
*
*
- * Sets the PCI-E reset state for the device. This is the default
+ * Sets the PCIe reset state for the device. This is the default
* implementation. Architecture implementations can override this.
*/
int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev,
@@ -1155,7 +1155,7 @@ int __attribute__ ((weak)) pcibios_set_pcie_reset_state(struct pci_dev *dev,

/**
* pci_set_pcie_reset_state - set reset state for device dev
- * @dev: the PCI-E device reset
+ * @dev: the PCIe device reset
* @state: Reset state to enter into
*
*
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 62d15f6..a21dee3 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -1,7 +1,7 @@
/*
- * PCIE AER software error injection support.
+ * PCIe AER software error injection support.
*
- * Debuging PCIE AER code is quite difficult because it is hard to
+ * Debugging PCIe AER code is quite difficult because it is hard to
* trigger various real hardware errors. Software based error
* injection can fake almost all kinds of errors with the help of a
* user space helper tool aer-inject, which can be gotten from:
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 40c3cc5..499aacd 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -155,7 +155,7 @@ static struct aer_rpc *aer_alloc_rpc(struct pcie_device *dev)
mutex_init(&rpc->rpc_mutex);
init_waitqueue_head(&rpc->wait_release);

- /* Use PCIE bus function to store rpc into PCIE device */
+ /* Use PCIe bus function to store rpc into PCIe device */
set_service_data(dev, rpc);

return rpc;
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 8edb2f3..0481408 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -24,7 +24,7 @@
*
* @return: Zero on success. Nonzero otherwise.
*
- * Invoked when PCIE bus loads AER service driver. To avoid conflict with
+ * Invoked when PCIe bus loads AER service driver. To avoid conflict with
* BIOS AER support requires BIOS to yield AER control to OS native driver.
**/
int aer_osc_setup(struct pcie_device *pciedev)
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index 9f5ccbe..9ab97a8 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -603,7 +603,7 @@ static void handle_error_source(struct pcie_device *aerdev,
* aer_enable_rootport - enable Root Port's interrupts when receiving messages
* @rpc: pointer to a Root Port data structure
*
- * Invoked when PCIE bus loads AER service driver.
+ * Invoked when PCIe bus loads AER service driver.
*/
void aer_enable_rootport(struct aer_rpc *rpc)
{
@@ -613,7 +613,7 @@ void aer_enable_rootport(struct aer_rpc *rpc)
u32 reg32;

pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
- /* Clear PCIE Capability's Device Status */
+ /* Clear PCIe Capability's Device Status */
pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);

@@ -647,7 +647,7 @@ void aer_enable_rootport(struct aer_rpc *rpc)
* disable_root_aer - disable Root Port's interrupts when receiving messages
* @rpc: pointer to a Root Port data structure
*
- * Invoked when PCIE bus unloads AER service driver.
+ * Invoked when PCIe bus unloads AER service driver.
*/
static void disable_root_aer(struct aer_rpc *rpc)
{
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 5b7056c..1dd123e 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -1,6 +1,6 @@
/*
* File: drivers/pci/pcie/aspm.c
- * Enabling PCIE link L0s/L1 state and Clock Power Management
+ * Enabling PCIe link L0s/L1 state and Clock Power Management
*
* Copyright (C) 2007 Intel
* Copyright (C) Zhang Yanmin ([email protected])
@@ -499,7 +499,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev)
int pos;
u32 reg32;
/*
- * Some functions in a slot might not all be PCIE functions,
+ * Some functions in a slot might not all be PCIe functions,
* very strange. Disable ASPM for the whole slot
*/
list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
diff --git a/drivers/pci/search.c b/drivers/pci/search.c
index ec41535..1873188 100644
--- a/drivers/pci/search.c
+++ b/drivers/pci/search.c
@@ -15,9 +15,9 @@

DECLARE_RWSEM(pci_bus_sem);
/*
- * find the upstream PCIE-to-PCI bridge of a PCI device
+ * find the upstream PCIe-to-PCI bridge of a PCI device
* if the device is PCIE, return NULL
- * if the device isn't connected to a PCIE bridge (that is its parent is a
+ * if the device isn't connected to a PCIe bridge (that is its parent is a
* legacy PCI bridge and the bridge is directly connected to bus 0), return its
* parent
*/
@@ -37,7 +37,7 @@ pci_find_upstream_pcie_bridge(struct pci_dev *pdev)
tmp = pdev;
continue;
}
- /* PCI device should connect to a PCIE bridge */
+ /* PCI device should connect to a PCIe bridge */
if (pdev->pcie_type != PCI_EXP_TYPE_PCI_BRIDGE) {
/* Busted hardware? */
WARN_ON_ONCE(1);
--
1.6.5.2

2009-12-03 17:43:49

by Jeff Garzik

[permalink] [raw]

Subject: Re: [PATCH 1/2 v2] pci: change PCI nomenclature in drivers/pci/ (comment changes)

On 12/03/2009 12:04 PM, Stefan Assmann wrote:
> repost with typo "Debuging" fixed as in patch #2.
>
>
> From: Stefan Assmann<[email protected]>
>
> Changing occurrences of variants of PCI-X and PCIe to the PCI-SIG
> terms listed in the "Trademark and Logo Usage Guidelines".
> http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf
>
> Patch is limited to drivers/pci/ and changes concern comments only.
>
> Signed-off-by: Stefan Assmann<[email protected]>
> ---
> drivers/pci/hotplug/shpchp.h | 2 +-
> drivers/pci/intel-iommu.c | 6 +++---
> drivers/pci/intr_remapping.c | 2 +-
> drivers/pci/pci.c | 6 +++---
> drivers/pci/pcie/aer/aer_inject.c | 4 ++--
> drivers/pci/pcie/aer/aerdrv.c | 2 +-
> drivers/pci/pcie/aer/aerdrv_acpi.c | 2 +-
> drivers/pci/pcie/aer/aerdrv_core.c | 6 +++---
> drivers/pci/pcie/aspm.c | 4 ++--
> drivers/pci/search.c | 6 +++---
> 10 files changed, 20 insertions(+), 20 deletions(-)

Thanks for splitting this up. These are definitely much more
"digestable" patches.

I don't have any objections to these patches, except for previous
comments about code churn itself. Up to Jesse...

Jeff

2009-12-16 19:45:44

by Jesse Barnes

[permalink] [raw]

Subject: Re: [PATCH 1/2 v2] pci: change PCI nomenclature in drivers/pci/ (comment changes)

On Thu, 3 Dec 2009 06:49:24 -0500
Stefan Assmann <[email protected]> wrote:

> From: Stefan Assmann <[email protected]>
>
> Changing occurrences of variants of PCI-X and PCIe to the PCI-SIG
> terms listed in the "Trademark and Logo Usage Guidelines".
> http://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf
>
> Patch is limited to drivers/pci/ and changes concern comments only.
>
> Signed-off-by: Stefan Assmann <[email protected]>
> ---

Applied these, thanks. The second one had a conflict since I had
previously applied a hotplug cleanup patch from you, but everything
else looked fine.

--
Jesse Barnes, Intel Open Source Technology Center