2019-06-20 07:59:48

by Tao Ren

[permalink] [raw]
Subject: Re: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor

On 6/20/19 12:29 AM, Ryan Chen wrote:
> Hello Tao,
> Our recommend about clk divider setting is follow the datasheet clock setting table for clock divisor.
>
> Ryan

Thanks Ryan for the response. Could you also share some recommendations/hints on how to solve the intermittent i2c transaction failures on Facebook AST2500 BMC platforms?

BTW, the patch is not aimed at modifying the existing formula of calculating clock settings in i2c-aspeed driver: people still get the recommended settings by default. The goal of the patch is to allow people to customize clock settings in case the default/recommended one doesn't work.


Cheers,

Tao


2019-06-20 08:02:36

by Ryan Chen

[permalink] [raw]
Subject: RE: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor

Hello Tao,
Let me more clear. When you set (3, 15, 14) the device sometimes response nack.
but when you set (4, 7, 7), the device always ack. Am I right?
Ryan

-----Original Message-----
From: Tao Ren [mailto:[email protected]]
Sent: Thursday, June 20, 2019 3:57 PM
To: Ryan Chen <[email protected]>; Brendan Higgins <[email protected]>
Cc: Mark Rutland <[email protected]>; devicetree <[email protected]>; [email protected]; OpenBMC Maillist <[email protected]>; Linux Kernel Mailing List <[email protected]>; Rob Herring <[email protected]>; Linux ARM <[email protected]>; [email protected]
Subject: Re: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor

On 6/20/19 12:29 AM, Ryan Chen wrote:
> Hello Tao,
> Our recommend about clk divider setting is follow the datasheet clock setting table for clock divisor.
>
> Ryan

Thanks Ryan for the response. Could you also share some recommendations/hints on how to solve the intermittent i2c transaction failures on Facebook AST2500 BMC platforms?

BTW, the patch is not aimed at modifying the existing formula of calculating clock settings in i2c-aspeed driver: people still get the recommended settings by default. The goal of the patch is to allow people to customize clock settings in case the default/recommended one doesn't work.


Cheers,

Tao

2019-06-20 08:15:12

by Tao Ren

[permalink] [raw]
Subject: Re: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor

On 6/20/19 1:01 AM, Ryan Chen wrote:
> Hello Tao,
> Let me more clear. When you set (3, 15, 14) the device sometimes response nack.
> but when you set (4, 7, 7), the device always ack. Am I right?
> Ryan

Hello Ryan,

It's correct. We have seen the problem on 2 Facebook BMC platforms so far. Given the other ~10 Facebook BMC platforms are still running kernel 4.1 (with (4, 7, 7) settings), I'd assume more platforms will be impacted after upgrading to the latest kernel.

Thank you for spending time on this!


Cheers,

Tao

2019-06-21 22:22:12

by Tao Ren

[permalink] [raw]
Subject: Re: [Potential Spoof] Re: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor

On 6/20/19 1:13 AM, Tao Ren wrote:
> On 6/20/19 1:01 AM, Ryan Chen wrote:
>> Hello Tao,
>> Let me more clear. When you set (3, 15, 14) the device sometimes response nack.
>> but when you set (4, 7, 7), the device always ack. Am I right?
>> Ryan
>
> Hello Ryan,
>
> It's correct. We have seen the problem on 2 Facebook BMC platforms so far. Given the other ~10 Facebook BMC platforms are still running kernel 4.1 (with (4, 7, 7) settings), I'd assume more platforms will be impacted after upgrading to the latest kernel.
>
> Thank you for spending time on this!

Just heads up Ryan and I are working with ODM vendors to collect scope output; will update back when we have new findings. Thank you all for spending time on this.


Cheers,

Tao