Hi,
Rob reported [1] that many (all?) PL330 device nodes use wrong dma-channels and
dma-requests properties. The proper ones are without leading '#'.
I guess everything started with 42cf20980cde ("ARM: dts: pl330: Add #dma-cells for
generic dma binding support").
Patches are independent and can be picked-up as is. Otherwise please ack and
I'll push it to SoC.
[1] https://lore.kernel.org/linux-devicetree/[email protected]/T/#m6235f451045c337d70a62dc65eab9a716618550b
Best regards,
Krzysztof
Krzysztof Kozlowski (10):
ARM: dts: zynq-7000: use proper 'dma-channels/requests' properties
ARM: dts: socfpga: use proper 'dma-channels/requests' properties
arm64: dts: stratix10/agilex: use proper 'dma-channels/requests'
properties
arm64: dts: juno: use proper 'dma-channels/requests' properties
arm64: dts: broadcom: use proper 'dma-channels/requests' properties
dt-bindings: mfd: samsung,exynos5433-lpass: fix
'dma-channels/requests' properties
ARM: dts: s5pv210: use proper 'dma-channels/requests' properties
ARM: dts: exynos: use proper 'dma-channels/requests' properties
arm64: dts: exynos: use proper 'dma-channels/requests' properties
arm64: dts: fsd: use proper 'dma-channels/requests' properties
.../mfd/samsung,exynos5433-lpass.yaml | 4 ++--
arch/arm/boot/dts/exynos3250.dtsi | 8 ++++----
arch/arm/boot/dts/exynos4.dtsi | 12 +++++------
.../boot/dts/exynos4210-universal_c210.dts | 4 ++--
arch/arm/boot/dts/exynos5250.dtsi | 16 +++++++--------
arch/arm/boot/dts/exynos5410.dtsi | 8 ++++----
arch/arm/boot/dts/exynos5420.dtsi | 20 +++++++++----------
arch/arm/boot/dts/s5pv210.dtsi | 12 +++++------
arch/arm/boot/dts/socfpga.dtsi | 4 ++--
arch/arm/boot/dts/socfpga_arria10.dtsi | 4 ++--
arch/arm/boot/dts/zynq-7000.dtsi | 4 ++--
.../boot/dts/altera/socfpga_stratix10.dtsi | 4 ++--
arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
.../boot/dts/broadcom/northstar2/ns2.dtsi | 4 ++--
.../boot/dts/broadcom/stingray/stingray.dtsi | 4 ++--
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 12 +++++------
arch/arm64/boot/dts/exynos/exynos7.dtsi | 8 ++++----
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 4 ++--
arch/arm64/boot/dts/tesla/fsd.dtsi | 16 +++++++--------
19 files changed, 76 insertions(+), 76 deletions(-)
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 4 ++--
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
index f59fa3979a04..230ccb685be6 100644
--- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
@@ -289,8 +289,8 @@ dma0: dma-controller@61360000 {
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
clocks = <&iprocslow>;
clock-names = "apb_pclk";
};
diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 7f1b8efd0883..2a58c1b43f6f 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -556,8 +556,8 @@ dma0: dma-controller@310000 {
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
clocks = <&hsls_div2_clk>;
clock-names = "apb_pclk";
iommus = <&smmu 0x6000 0x0000>;
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 4 ++--
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 884bda106399..b743e625f482 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -346,8 +346,8 @@ pdma: dma-controller@ffda0000 {
<0 88 4>,
<0 89 4>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
clock-names = "apb_pclk";
resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index c78371703e76..2bf632edc3ad 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -350,8 +350,8 @@ pdma: dma-controller@ffda0000 {
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
reset-names = "dma", "dma-ocp";
clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/socfpga.dtsi | 4 ++--
arch/arm/boot/dts/socfpga_arria10.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index b8c5dd7860cb..a459d3978cfa 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -80,8 +80,8 @@ pdma: pdma@ffe01000 {
<0 110 4>,
<0 111 4>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
clocks = <&l4_main_clk>;
clock-names = "apb_pclk";
resets = <&rst DMA_RESET>;
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index f1e50d2e623a..d7641c9f2875 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -73,8 +73,8 @@ pdma: pdma@ffda1000 {
<0 90 IRQ_TYPE_LEVEL_HIGH>,
<0 91 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
clocks = <&l4_main_clk>;
clock-names = "apb_pclk";
resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/tesla/fsd.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
index 10c217a57a7d..7fba37d860b2 100644
--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
@@ -432,8 +432,8 @@ mdma0: dma-controller@10100000 {
reg = <0x0 0x10100000 0x0 0x1000>;
interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
clocks = <&clock_imem IMEM_DMA0_IPCLKPORT_ACLK>;
clock-names = "apb_pclk";
iommus = <&smmu_imem 0x800 0x0>;
@@ -444,8 +444,8 @@ mdma1: dma-controller@10110000 {
reg = <0x0 0x10110000 0x0 0x1000>;
interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
clocks = <&clock_imem IMEM_DMA1_IPCLKPORT_ACLK>;
clock-names = "apb_pclk";
iommus = <&smmu_imem 0x801 0x0>;
@@ -456,8 +456,8 @@ pdma0: dma-controller@14280000 {
reg = <0x0 0x14280000 0x0 0x1000>;
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
clocks = <&clock_peric PERIC_DMA0_IPCLKPORT_ACLK>;
clock-names = "apb_pclk";
iommus = <&smmu_peric 0x2 0x0>;
@@ -468,8 +468,8 @@ pdma1: dma-controller@14290000 {
reg = <0x0 0x14290000 0x0 0x1000>;
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
clocks = <&clock_peric PERIC_DMA1_IPCLKPORT_ACLK>;
clock-names = "apb_pclk";
iommus = <&smmu_peric 0x1 0x0>;
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Fixes: e18183cefc8b ("mfd: Add DT bindings documentation for Samsung Exynos LPASS")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml
index f7bb67d10eff..b97b06848729 100644
--- a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml
+++ b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml
@@ -79,8 +79,8 @@ examples:
clocks = <&cmu_aud CLK_ACLK_DMAC>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
power-domains = <&pd_aud>;
};
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/zynq-7000.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index 47c2a4b14c06..40c60a2b6d2c 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -343,8 +343,8 @@ dmac_s: dmac@f8003000 {
<0 40 4>, <0 41 4>,
<0 42 4>, <0 43 4>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <4>;
+ dma-channels = <8>;
+ dma-requests = <4>;
clocks = <&clkc 27>;
clock-names = "apb_pclk";
};
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 12 ++++++------
arch/arm64/boot/dts/exynos/exynos7.dtsi | 8 ++++----
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 017ccc2f4650..91e82e4283b2 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -1866,8 +1866,8 @@ pdma0: dma-controller@15610000 {
clocks = <&cmu_fsys CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
pdma1: dma-controller@15600000 {
@@ -1877,8 +1877,8 @@ pdma1: dma-controller@15600000 {
clocks = <&cmu_fsys CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
audio-subsystem@11400000 {
@@ -1898,8 +1898,8 @@ adma: dma-controller@11420000 {
clocks = <&cmu_aud CLK_ACLK_DMAC>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
power-domains = <&pd_aud>;
};
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index e38bb02a2152..c31534771620 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -149,8 +149,8 @@ pdma0: dma-controller@10e10000 {
clocks = <&clock_fsys0 ACLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
pdma1: dma-controller@10eb0000 {
@@ -160,8 +160,8 @@ pdma1: dma-controller@10eb0000 {
clocks = <&clock_fsys0 ACLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
clock_topc: clock-controller@10570000 {
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/exynos3250.dtsi | 8 ++++----
arch/arm/boot/dts/exynos4.dtsi | 12 +++++------
.../boot/dts/exynos4210-universal_c210.dts | 4 ++--
arch/arm/boot/dts/exynos5250.dtsi | 16 +++++++--------
arch/arm/boot/dts/exynos5410.dtsi | 8 ++++----
arch/arm/boot/dts/exynos5420.dtsi | 20 +++++++++----------
6 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 41bb421e67c2..7bdd4f0782c3 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -429,8 +429,8 @@ pdma0: dma-controller@12680000 {
clocks = <&cmu CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
pdma1: dma-controller@12690000 {
@@ -440,8 +440,8 @@ pdma1: dma-controller@12690000 {
clocks = <&cmu CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
adc: adc@126c0000 {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 5fd17bc52321..2a244aaf84b4 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -676,8 +676,8 @@ pdma0: dma-controller@12680000 {
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
pdma1: dma-controller@12690000 {
@@ -687,8 +687,8 @@ pdma1: dma-controller@12690000 {
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
mdma1: dma-controller@12850000 {
@@ -698,8 +698,8 @@ mdma1: dma-controller@12850000 {
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
+ dma-channels = <8>;
+ dma-requests = <1>;
};
fimd: fimd@11c00000 {
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 138d606d58a5..c1b11704b8ee 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -666,8 +666,8 @@ mdma0: dma-controller@12840000 {
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
+ dma-channels = <8>;
+ dma-requests = <1>;
power-domains = <&pd_lcd0>;
};
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index df80ddfada2d..c4c0b4c08094 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -700,8 +700,8 @@ pdma0: dma-controller@121a0000 {
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -711,8 +711,8 @@ pdma1: dma-controller@121b0000 {
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
mdma0: dma-controller@10800000 {
@@ -722,8 +722,8 @@ mdma0: dma-controller@10800000 {
clocks = <&clock CLK_MDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
+ dma-channels = <8>;
+ dma-requests = <1>;
};
mdma1: dma-controller@11c10000 {
@@ -733,8 +733,8 @@ mdma1: dma-controller@11c10000 {
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
+ dma-channels = <8>;
+ dma-requests = <1>;
};
gsc_0: gsc@13e00000 {
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 4d797a9abba4..6dc08cb0622c 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -196,8 +196,8 @@ pdma0: dma-controller@121a0000 {
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -207,8 +207,8 @@ pdma1: dma-controller@121b0000 {
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
audi2s0: i2s@3830000 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 21b608705049..08198d82ce8d 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -437,8 +437,8 @@ adma: dma-controller@3880000 {
clocks = <&clock_audss EXYNOS_ADMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <6>;
- #dma-requests = <16>;
+ dma-channels = <6>;
+ dma-requests = <16>;
power-domains = <&mau_pd>;
};
@@ -449,8 +449,8 @@ pdma0: dma-controller@121a0000 {
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -460,8 +460,8 @@ pdma1: dma-controller@121b0000 {
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
mdma0: dma-controller@10800000 {
@@ -471,8 +471,8 @@ mdma0: dma-controller@10800000 {
clocks = <&clock CLK_MDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
+ dma-channels = <8>;
+ dma-requests = <1>;
};
mdma1: dma-controller@11c10000 {
@@ -482,8 +482,8 @@ mdma1: dma-controller@11c10000 {
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
+ dma-channels = <8>;
+ dma-requests = <1>;
/*
* MDMA1 can support both secure and non-secure
* AXI transactions. When this is enabled in
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm/boot/dts/s5pv210.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi
index ac281f42e8f5..f6988ba3393d 100644
--- a/arch/arm/boot/dts/s5pv210.dtsi
+++ b/arch/arm/boot/dts/s5pv210.dtsi
@@ -125,8 +125,8 @@ pdma0: dma-controller@e0900000 {
clocks = <&clocks CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
pdma1: dma-controller@e0a00000 {
@@ -137,8 +137,8 @@ pdma1: dma-controller@e0a00000 {
clocks = <&clocks CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
};
adc: adc@e1700000 {
@@ -526,8 +526,8 @@ mdma1: dma-controller@fa200000 {
clocks = <&clocks CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <1>;
+ dma-channels = <8>;
+ dma-requests = <1>;
};
rotator: rotator@fa300000 {
--
2.32.0
pl330 DMA controller bindings documented 'dma-channels' and
'dma-requests' properties (without leading hash sign), so fix the DTS to
match the bindings.
Reported-by: Rob Herring <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 4f40a5c8f565..96ef0ddc0b2d 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -829,8 +829,8 @@ dma-controller@7ff00000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0x7ff00000 0 0x1000>;
#dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
+ dma-channels = <8>;
+ dma-requests = <32>;
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
--
2.32.0
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:[email protected]]
>Sent: Wednesday, April 27, 2022 9:29 PM
>To: Lee Jones <[email protected]>; Rob Herring <[email protected]>;
>Krzysztof Kozlowski <[email protected]>; Alim Akhtar
><[email protected]>; Dinh Nguyen <[email protected]>; Michal
>Simek <[email protected]>; Liviu Dudau <[email protected]>;
>Sudeep Holla <[email protected]>; Lorenzo Pieralisi
><[email protected]>; Ray Jui <[email protected]>; Scott Branden
><[email protected]>; Broadcom Kernel Team <bcm-kernel-feedback-
>[email protected]>; Sylwester Nawrocki <[email protected]>;
>[email protected]; [email protected]; linux-
>[email protected]; [email protected]
>Cc: Krzysztof Kozlowski <[email protected]>; Rob Herring
><[email protected]>
>Subject: [PATCH 06/10] dt-bindings: mfd: samsung,exynos5433-lpass: fix
>'dma-channels/requests' properties
>
>pl330 DMA controller bindings documented 'dma-channels' and 'dma-
>requests' properties (without leading hash sign), so fix the DTS to match
the
>bindings.
>
>Reported-by: Rob Herring <[email protected]>
>Fixes: e18183cefc8b ("mfd: Add DT bindings documentation for Samsung
>Exynos LPASS")
>Signed-off-by: Krzysztof Kozlowski <[email protected]>
>---
Looking at Documentation/devicetree/bindings/dma/dma-common.yaml
This change looks good.
Reviewed-by: Alim Akhtar <[email protected]>
> .../devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-
>lpass.yaml b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-
>lpass.yaml
>index f7bb67d10eff..b97b06848729 100644
>--- a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-
>lpass.yaml
>+++ b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-
>lpass.yam
>+++ l
>@@ -79,8 +79,8 @@ examples:
> clocks = <&cmu_aud CLK_ACLK_DMAC>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> power-domains = <&pd_aud>;
> };
>
>--
>2.32.0
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:[email protected]]
>Sent: Wednesday, April 27, 2022 9:29 PM
>To: Lee Jones <[email protected]>; Rob Herring <[email protected]>;
>Krzysztof Kozlowski <[email protected]>; Alim Akhtar
><[email protected]>; Dinh Nguyen <[email protected]>; Michal
>Simek <[email protected]>; Liviu Dudau <[email protected]>;
>Sudeep Holla <[email protected]>; Lorenzo Pieralisi
><[email protected]>; Ray Jui <[email protected]>; Scott Branden
><[email protected]>; Broadcom Kernel Team <bcm-kernel-feedback-
>[email protected]>; Sylwester Nawrocki <[email protected]>;
>[email protected]; [email protected]; linux-
>[email protected]; [email protected]
>Cc: Krzysztof Kozlowski <[email protected]>; Rob Herring
><[email protected]>
>Subject: [PATCH 08/10] ARM: dts: exynos: use proper 'dma-
>channels/requests' properties
>
>pl330 DMA controller bindings documented 'dma-channels' and 'dma-
>requests' properties (without leading hash sign), so fix the DTS to match
the
>bindings.
>
>Reported-by: Rob Herring <[email protected]>
>Signed-off-by: Krzysztof Kozlowski <[email protected]>
>---
Reviewed-by: Alim Akhtar <[email protected]>
> arch/arm/boot/dts/exynos3250.dtsi | 8 ++++----
> arch/arm/boot/dts/exynos4.dtsi | 12 +++++------
> .../boot/dts/exynos4210-universal_c210.dts | 4 ++--
> arch/arm/boot/dts/exynos5250.dtsi | 16 +++++++--------
> arch/arm/boot/dts/exynos5410.dtsi | 8 ++++----
> arch/arm/boot/dts/exynos5420.dtsi | 20 +++++++++----------
> 6 files changed, 34 insertions(+), 34 deletions(-)
>
>diff --git a/arch/arm/boot/dts/exynos3250.dtsi
>b/arch/arm/boot/dts/exynos3250.dtsi
>index 41bb421e67c2..7bdd4f0782c3 100644
>--- a/arch/arm/boot/dts/exynos3250.dtsi
>+++ b/arch/arm/boot/dts/exynos3250.dtsi
>@@ -429,8 +429,8 @@ pdma0: dma-controller@12680000 {
> clocks = <&cmu CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> pdma1: dma-controller@12690000 {
>@@ -440,8 +440,8 @@ pdma1: dma-controller@12690000 {
> clocks = <&cmu CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> adc: adc@126c0000 {
>diff --git a/arch/arm/boot/dts/exynos4.dtsi
>b/arch/arm/boot/dts/exynos4.dtsi index 5fd17bc52321..2a244aaf84b4 100644
>--- a/arch/arm/boot/dts/exynos4.dtsi
>+++ b/arch/arm/boot/dts/exynos4.dtsi
>@@ -676,8 +676,8 @@ pdma0: dma-controller@12680000 {
> clocks = <&clock CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> pdma1: dma-controller@12690000 {
>@@ -687,8 +687,8 @@ pdma1: dma-controller@12690000 {
> clocks = <&clock CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> mdma1: dma-controller@12850000 {
>@@ -698,8 +698,8 @@ mdma1: dma-controller@12850000 {
> clocks = <&clock CLK_MDMA>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <1>;
>+ dma-channels = <8>;
>+ dma-requests = <1>;
> };
>
> fimd: fimd@11c00000 {
>diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
>b/arch/arm/boot/dts/exynos4210-universal_c210.dts
>index 138d606d58a5..c1b11704b8ee 100644
>--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
>+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
>@@ -666,8 +666,8 @@ mdma0: dma-controller@12840000 {
> clocks = <&clock CLK_MDMA>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <1>;
>+ dma-channels = <8>;
>+ dma-requests = <1>;
> power-domains = <&pd_lcd0>;
> };
> };
>diff --git a/arch/arm/boot/dts/exynos5250.dtsi
>b/arch/arm/boot/dts/exynos5250.dtsi
>index df80ddfada2d..c4c0b4c08094 100644
>--- a/arch/arm/boot/dts/exynos5250.dtsi
>+++ b/arch/arm/boot/dts/exynos5250.dtsi
>@@ -700,8 +700,8 @@ pdma0: dma-controller@121a0000 {
> clocks = <&clock CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> pdma1: dma-controller@121b0000 {
>@@ -711,8 +711,8 @@ pdma1: dma-controller@121b0000 {
> clocks = <&clock CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> mdma0: dma-controller@10800000 {
>@@ -722,8 +722,8 @@ mdma0: dma-controller@10800000 {
> clocks = <&clock CLK_MDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <1>;
>+ dma-channels = <8>;
>+ dma-requests = <1>;
> };
>
> mdma1: dma-controller@11c10000 {
>@@ -733,8 +733,8 @@ mdma1: dma-controller@11c10000 {
> clocks = <&clock CLK_MDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <1>;
>+ dma-channels = <8>;
>+ dma-requests = <1>;
> };
>
> gsc_0: gsc@13e00000 {
>diff --git a/arch/arm/boot/dts/exynos5410.dtsi
>b/arch/arm/boot/dts/exynos5410.dtsi
>index 4d797a9abba4..6dc08cb0622c 100644
>--- a/arch/arm/boot/dts/exynos5410.dtsi
>+++ b/arch/arm/boot/dts/exynos5410.dtsi
>@@ -196,8 +196,8 @@ pdma0: dma-controller@121a0000 {
> clocks = <&clock CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> pdma1: dma-controller@121b0000 {
>@@ -207,8 +207,8 @@ pdma1: dma-controller@121b0000 {
> clocks = <&clock CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> audi2s0: i2s@3830000 {
>diff --git a/arch/arm/boot/dts/exynos5420.dtsi
>b/arch/arm/boot/dts/exynos5420.dtsi
>index 21b608705049..08198d82ce8d 100644
>--- a/arch/arm/boot/dts/exynos5420.dtsi
>+++ b/arch/arm/boot/dts/exynos5420.dtsi
>@@ -437,8 +437,8 @@ adma: dma-controller@3880000 {
> clocks = <&clock_audss EXYNOS_ADMA>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <6>;
>- #dma-requests = <16>;
>+ dma-channels = <6>;
>+ dma-requests = <16>;
> power-domains = <&mau_pd>;
> };
>
>@@ -449,8 +449,8 @@ pdma0: dma-controller@121a0000 {
> clocks = <&clock CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> pdma1: dma-controller@121b0000 {
>@@ -460,8 +460,8 @@ pdma1: dma-controller@121b0000 {
> clocks = <&clock CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> mdma0: dma-controller@10800000 {
>@@ -471,8 +471,8 @@ mdma0: dma-controller@10800000 {
> clocks = <&clock CLK_MDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <1>;
>+ dma-channels = <8>;
>+ dma-requests = <1>;
> };
>
> mdma1: dma-controller@11c10000 {
>@@ -482,8 +482,8 @@ mdma1: dma-controller@11c10000 {
> clocks = <&clock CLK_MDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <1>;
>+ dma-channels = <8>;
>+ dma-requests = <1>;
> /*
> * MDMA1 can support both secure and non-secure
> * AXI transactions. When this is enabled in
>--
>2.32.0
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:[email protected]]
>Sent: Wednesday, April 27, 2022 9:29 PM
>To: Lee Jones <[email protected]>; Rob Herring <[email protected]>;
>Krzysztof Kozlowski <[email protected]>; Alim Akhtar
><[email protected]>; Dinh Nguyen <[email protected]>; Michal
>Simek <[email protected]>; Liviu Dudau <[email protected]>;
>Sudeep Holla <[email protected]>; Lorenzo Pieralisi
><[email protected]>; Ray Jui <[email protected]>; Scott Branden
><[email protected]>; Broadcom Kernel Team <bcm-kernel-feedback-
>[email protected]>; Sylwester Nawrocki <[email protected]>;
>[email protected]; [email protected]; linux-
>[email protected]; [email protected]
>Cc: Krzysztof Kozlowski <[email protected]>; Rob Herring
><[email protected]>
>Subject: [PATCH 07/10] ARM: dts: s5pv210: use proper 'dma-
>channels/requests' properties
>
>pl330 DMA controller bindings documented 'dma-channels' and 'dma-
>requests' properties (without leading hash sign), so fix the DTS to match
the
>bindings.
>
>Reported-by: Rob Herring <[email protected]>
>Signed-off-by: Krzysztof Kozlowski <[email protected]>
>---
Reviewed-by: Alim Akhtar <[email protected]>
> arch/arm/boot/dts/s5pv210.dtsi | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
>diff --git a/arch/arm/boot/dts/s5pv210.dtsi
b/arch/arm/boot/dts/s5pv210.dtsi
>index ac281f42e8f5..f6988ba3393d 100644
>--- a/arch/arm/boot/dts/s5pv210.dtsi
>+++ b/arch/arm/boot/dts/s5pv210.dtsi
>@@ -125,8 +125,8 @@ pdma0: dma-controller@e0900000 {
> clocks = <&clocks CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> pdma1: dma-controller@e0a00000 {
>@@ -137,8 +137,8 @@ pdma1: dma-controller@e0a00000 {
> clocks = <&clocks CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> adc: adc@e1700000 {
>@@ -526,8 +526,8 @@ mdma1: dma-controller@fa200000 {
> clocks = <&clocks CLK_MDMA>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <1>;
>+ dma-channels = <8>;
>+ dma-requests = <1>;
> };
>
> rotator: rotator@fa300000 {
>--
>2.32.0
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:[email protected]]
>Sent: Wednesday, April 27, 2022 9:29 PM
>To: Lee Jones <[email protected]>; Rob Herring <[email protected]>;
>Krzysztof Kozlowski <[email protected]>; Alim Akhtar
><[email protected]>; Dinh Nguyen <[email protected]>; Michal
>Simek <[email protected]>; Liviu Dudau <[email protected]>;
>Sudeep Holla <[email protected]>; Lorenzo Pieralisi
><[email protected]>; Ray Jui <[email protected]>; Scott Branden
><[email protected]>; Broadcom Kernel Team <bcm-kernel-feedback-
>[email protected]>; Sylwester Nawrocki <[email protected]>;
>[email protected]; [email protected]; linux-
>[email protected]; [email protected]
>Cc: Krzysztof Kozlowski <[email protected]>; Rob Herring
><[email protected]>
>Subject: [PATCH 09/10] arm64: dts: exynos: use proper 'dma-
>channels/requests' properties
>
>pl330 DMA controller bindings documented 'dma-channels' and 'dma-
>requests' properties (without leading hash sign), so fix the DTS to match
the
>bindings.
>
>Reported-by: Rob Herring <[email protected]>
>Signed-off-by: Krzysztof Kozlowski <[email protected]>
>---
Reviewed-by: Alim Akhtar <[email protected]>
> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 12 ++++++------
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 8 ++++----
> 2 files changed, 10 insertions(+), 10 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>index 017ccc2f4650..91e82e4283b2 100644
>--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
>@@ -1866,8 +1866,8 @@ pdma0: dma-controller@15610000 {
> clocks = <&cmu_fsys CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> pdma1: dma-controller@15600000 {
>@@ -1877,8 +1877,8 @@ pdma1: dma-controller@15600000 {
> clocks = <&cmu_fsys CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> audio-subsystem@11400000 {
>@@ -1898,8 +1898,8 @@ adma: dma-controller@11420000 {
> clocks = <&cmu_aud CLK_ACLK_DMAC>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> power-domains = <&pd_aud>;
> };
>
>diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi
>b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>index e38bb02a2152..c31534771620 100644
>--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
>+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
>@@ -149,8 +149,8 @@ pdma0: dma-controller@10e10000 {
> clocks = <&clock_fsys0 ACLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> pdma1: dma-controller@10eb0000 {
>@@ -160,8 +160,8 @@ pdma1: dma-controller@10eb0000 {
> clocks = <&clock_fsys0 ACLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> };
>
> clock_topc: clock-controller@10570000 {
>--
>2.32.0
>-----Original Message-----
>From: Krzysztof Kozlowski [mailto:[email protected]]
>Sent: Wednesday, April 27, 2022 9:29 PM
>To: Lee Jones <[email protected]>; Rob Herring <[email protected]>;
>Krzysztof Kozlowski <[email protected]>; Alim Akhtar
><[email protected]>; Dinh Nguyen <[email protected]>; Michal
>Simek <[email protected]>; Liviu Dudau <[email protected]>;
>Sudeep Holla <[email protected]>; Lorenzo Pieralisi
><[email protected]>; Ray Jui <[email protected]>; Scott Branden
><[email protected]>; Broadcom Kernel Team <bcm-kernel-feedback-
>[email protected]>; Sylwester Nawrocki <[email protected]>;
>[email protected]; [email protected]; linux-
>[email protected]; [email protected]
>Cc: Krzysztof Kozlowski <[email protected]>; Rob Herring
><[email protected]>
>Subject: [PATCH 10/10] arm64: dts: fsd: use proper 'dma-channels/requests'
>properties
>
>pl330 DMA controller bindings documented 'dma-channels' and 'dma-
>requests' properties (without leading hash sign), so fix the DTS to match
the
>bindings.
>
>Reported-by: Rob Herring <[email protected]>
>Signed-off-by: Krzysztof Kozlowski <[email protected]>
>---
Acked-by: Alim Akhtar <[email protected]>
> arch/arm64/boot/dts/tesla/fsd.dtsi | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi
>b/arch/arm64/boot/dts/tesla/fsd.dtsi
>index 10c217a57a7d..7fba37d860b2 100644
>--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
>+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
>@@ -432,8 +432,8 @@ mdma0: dma-controller@10100000 {
> reg = <0x0 0x10100000 0x0 0x1000>;
> interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> clocks = <&clock_imem
>IMEM_DMA0_IPCLKPORT_ACLK>;
> clock-names = "apb_pclk";
> iommus = <&smmu_imem 0x800 0x0>;
>@@ -444,8 +444,8 @@ mdma1: dma-controller@10110000 {
> reg = <0x0 0x10110000 0x0 0x1000>;
> interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> clocks = <&clock_imem
>IMEM_DMA1_IPCLKPORT_ACLK>;
> clock-names = "apb_pclk";
> iommus = <&smmu_imem 0x801 0x0>;
>@@ -456,8 +456,8 @@ pdma0: dma-controller@14280000 {
> reg = <0x0 0x14280000 0x0 0x1000>;
> interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> clocks = <&clock_peric
>PERIC_DMA0_IPCLKPORT_ACLK>;
> clock-names = "apb_pclk";
> iommus = <&smmu_peric 0x2 0x0>;
>@@ -468,8 +468,8 @@ pdma1: dma-controller@14290000 {
> reg = <0x0 0x14290000 0x0 0x1000>;
> interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
> #dma-cells = <1>;
>- #dma-channels = <8>;
>- #dma-requests = <32>;
>+ dma-channels = <8>;
>+ dma-requests = <32>;
> clocks = <&clock_peric
>PERIC_DMA1_IPCLKPORT_ACLK>;
> clock-names = "apb_pclk";
> iommus = <&smmu_peric 0x1 0x0>;
>--
>2.32.0
On Wed, 27 Apr 2022 17:58:36 +0200, Krzysztof Kozlowski wrote:
> pl330 DMA controller bindings documented 'dma-channels' and
> 'dma-requests' properties (without leading hash sign), so fix the DTS to
> match the bindings.
>
> Reported-by: Rob Herring <[email protected]>
> Fixes: e18183cefc8b ("mfd: Add DT bindings documentation for Samsung Exynos LPASS")
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Acked-by: Rob Herring <[email protected]>
On 4/27/22 17:58, Krzysztof Kozlowski wrote:
> pl330 DMA controller bindings documented 'dma-channels' and
> 'dma-requests' properties (without leading hash sign), so fix the DTS to
> match the bindings.
>
> Reported-by: Rob Herring <[email protected]>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> arch/arm/boot/dts/zynq-7000.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index 47c2a4b14c06..40c60a2b6d2c 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -343,8 +343,8 @@ dmac_s: dmac@f8003000 {
> <0 40 4>, <0 41 4>,
> <0 42 4>, <0 43 4>;
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <4>;
> + dma-channels = <8>;
> + dma-requests = <4>;
> clocks = <&clkc 27>;
> clock-names = "apb_pclk";
> };
Acked-by: Michal Simek <[email protected]>
Thanks,
Michal
On Wed, 27 Apr 2022, Krzysztof Kozlowski wrote:
> pl330 DMA controller bindings documented 'dma-channels' and
> 'dma-requests' properties (without leading hash sign), so fix the DTS to
> match the bindings.
>
> Reported-by: Rob Herring <[email protected]>
> Fixes: e18183cefc8b ("mfd: Add DT bindings documentation for Samsung Exynos LPASS")
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Applied, thanks.
--
Lee Jones [李琼斯]
Principal Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog
Hi Krzysztof,
On 27.04.2022 17:58, Krzysztof Kozlowski wrote:
> pl330 DMA controller bindings documented 'dma-channels' and
> 'dma-requests' properties (without leading hash sign), so fix the DTS to
> match the bindings.
>
> Reported-by: Rob Herring <[email protected]>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
Are those properties really needed for PL330 driver on Exynos SoCs? I've
removed them and I still see the proper values read from registers and
reported in the log (Exynos4210):
dma-pl330 12680000.dma-controller: Loaded driver for PL330 DMAC-141330
dma-pl330 12680000.dma-controller: DBUFF-32x4bytes Num_Chans-8
Num_Peri-32 Num_Events-32
dma-pl330 12690000.dma-controller: Loaded driver for PL330 DMAC-141330
dma-pl330 12690000.dma-controller: DBUFF-32x4bytes Num_Chans-8
Num_Peri-32 Num_Events-32
dma-pl330 12850000.dma-controller: Loaded driver for PL330 DMAC-141330
dma-pl330 12850000.dma-controller: DBUFF-64x8bytes Num_Chans-8
Num_Peri-1 Num_Events-32
I also don't see any code that would read those properties. IMHO they
should be simply removed at all, at least for the PL330 related nodes.
> ---
> arch/arm/boot/dts/exynos3250.dtsi | 8 ++++----
> arch/arm/boot/dts/exynos4.dtsi | 12 +++++------
> .../boot/dts/exynos4210-universal_c210.dts | 4 ++--
> arch/arm/boot/dts/exynos5250.dtsi | 16 +++++++--------
> arch/arm/boot/dts/exynos5410.dtsi | 8 ++++----
> arch/arm/boot/dts/exynos5420.dtsi | 20 +++++++++----------
> 6 files changed, 34 insertions(+), 34 deletions(-)
>
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
> index 41bb421e67c2..7bdd4f0782c3 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -429,8 +429,8 @@ pdma0: dma-controller@12680000 {
> clocks = <&cmu CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> pdma1: dma-controller@12690000 {
> @@ -440,8 +440,8 @@ pdma1: dma-controller@12690000 {
> clocks = <&cmu CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> adc: adc@126c0000 {
> diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
> index 5fd17bc52321..2a244aaf84b4 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -676,8 +676,8 @@ pdma0: dma-controller@12680000 {
> clocks = <&clock CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> pdma1: dma-controller@12690000 {
> @@ -687,8 +687,8 @@ pdma1: dma-controller@12690000 {
> clocks = <&clock CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> mdma1: dma-controller@12850000 {
> @@ -698,8 +698,8 @@ mdma1: dma-controller@12850000 {
> clocks = <&clock CLK_MDMA>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> + dma-channels = <8>;
> + dma-requests = <1>;
> };
>
> fimd: fimd@11c00000 {
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index 138d606d58a5..c1b11704b8ee 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -666,8 +666,8 @@ mdma0: dma-controller@12840000 {
> clocks = <&clock CLK_MDMA>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> + dma-channels = <8>;
> + dma-requests = <1>;
> power-domains = <&pd_lcd0>;
> };
> };
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index df80ddfada2d..c4c0b4c08094 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -700,8 +700,8 @@ pdma0: dma-controller@121a0000 {
> clocks = <&clock CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> pdma1: dma-controller@121b0000 {
> @@ -711,8 +711,8 @@ pdma1: dma-controller@121b0000 {
> clocks = <&clock CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> mdma0: dma-controller@10800000 {
> @@ -722,8 +722,8 @@ mdma0: dma-controller@10800000 {
> clocks = <&clock CLK_MDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> + dma-channels = <8>;
> + dma-requests = <1>;
> };
>
> mdma1: dma-controller@11c10000 {
> @@ -733,8 +733,8 @@ mdma1: dma-controller@11c10000 {
> clocks = <&clock CLK_MDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> + dma-channels = <8>;
> + dma-requests = <1>;
> };
>
> gsc_0: gsc@13e00000 {
> diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
> index 4d797a9abba4..6dc08cb0622c 100644
> --- a/arch/arm/boot/dts/exynos5410.dtsi
> +++ b/arch/arm/boot/dts/exynos5410.dtsi
> @@ -196,8 +196,8 @@ pdma0: dma-controller@121a0000 {
> clocks = <&clock CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> pdma1: dma-controller@121b0000 {
> @@ -207,8 +207,8 @@ pdma1: dma-controller@121b0000 {
> clocks = <&clock CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> audi2s0: i2s@3830000 {
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 21b608705049..08198d82ce8d 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -437,8 +437,8 @@ adma: dma-controller@3880000 {
> clocks = <&clock_audss EXYNOS_ADMA>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <6>;
> - #dma-requests = <16>;
> + dma-channels = <6>;
> + dma-requests = <16>;
> power-domains = <&mau_pd>;
> };
>
> @@ -449,8 +449,8 @@ pdma0: dma-controller@121a0000 {
> clocks = <&clock CLK_PDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> pdma1: dma-controller@121b0000 {
> @@ -460,8 +460,8 @@ pdma1: dma-controller@121b0000 {
> clocks = <&clock CLK_PDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
> };
>
> mdma0: dma-controller@10800000 {
> @@ -471,8 +471,8 @@ mdma0: dma-controller@10800000 {
> clocks = <&clock CLK_MDMA0>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> + dma-channels = <8>;
> + dma-requests = <1>;
> };
>
> mdma1: dma-controller@11c10000 {
> @@ -482,8 +482,8 @@ mdma1: dma-controller@11c10000 {
> clocks = <&clock CLK_MDMA1>;
> clock-names = "apb_pclk";
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <1>;
> + dma-channels = <8>;
> + dma-requests = <1>;
> /*
> * MDMA1 can support both secure and non-secure
> * AXI transactions. When this is enabled in
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
On 28.04.2022 12:00, Krzysztof Kozlowski wrote:
> On 28/04/2022 11:57, Marek Szyprowski wrote:
>> On 28.04.2022 11:54, Krzysztof Kozlowski wrote:
>>> On 28/04/2022 11:50, Marek Szyprowski wrote:
>>>> On 27.04.2022 17:58, Krzysztof Kozlowski wrote:
>>>>> pl330 DMA controller bindings documented 'dma-channels' and
>>>>> 'dma-requests' properties (without leading hash sign), so fix the DTS to
>>>>> match the bindings.
>>>>>
>>>>> Reported-by: Rob Herring <[email protected]>
>>>>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>>>> Are those properties really needed for PL330 driver on Exynos SoCs? I've
>>>> removed them and I still see the proper values read from registers and
>>>> reported in the log (Exynos4210):
>>>>
>>>> dma-pl330 12680000.dma-controller: Loaded driver for PL330 DMAC-141330
>>>> dma-pl330 12680000.dma-controller: DBUFF-32x4bytes Num_Chans-8
>>>> Num_Peri-32 Num_Events-32
>>>> dma-pl330 12690000.dma-controller: Loaded driver for PL330 DMAC-141330
>>>> dma-pl330 12690000.dma-controller: DBUFF-32x4bytes Num_Chans-8
>>>> Num_Peri-32 Num_Events-32
>>>> dma-pl330 12850000.dma-controller: Loaded driver for PL330 DMAC-141330
>>>> dma-pl330 12850000.dma-controller: DBUFF-64x8bytes Num_Chans-8
>>>> Num_Peri-1 Num_Events-32
>>>>
>>>> I also don't see any code that would read those properties. IMHO they
>>>> should be simply removed at all, at least for the PL330 related nodes.
>>> In current Linux implementation they indeed are not used. Nothing parses
>>> them. However:
>>> 1. They describe (hopefully correct) the hardware.
>>> 2. They might be used by other implementations of pl330 driver.
>>>
>>> I would not remove them from existing sources, but indeed maybe there is
>>> no need to add for new files.
>> What's the point in having dt properties duplicating data that might be
>> read from the driver registers?
> Hm, indeed, there is no point in this. Since they are read from
> registers, what was the idea behind in commit 42cf20980cde?
#dma-cells is indeed required, but the rest seems to be the cargo-cult
of some kind.
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
>-----Original Message-----
>From: Marek Szyprowski [mailto:[email protected]]
>Sent: Thursday, April 28, 2022 3:20 PM
>To: Krzysztof Kozlowski <[email protected]>; Lee Jones
><[email protected]>; Rob Herring <[email protected]>; Krzysztof
>Kozlowski <[email protected]>; Alim Akhtar
><[email protected]>; Dinh Nguyen <[email protected]>; Michal
>Simek <[email protected]>; Liviu Dudau <[email protected]>;
>Sudeep Holla <[email protected]>; Lorenzo Pieralisi
><[email protected]>; Ray Jui <[email protected]>; Scott Branden
><[email protected]>; Broadcom Kernel Team <bcm-kernel-feedback-
>[email protected]>; Sylwester Nawrocki <[email protected]>;
>[email protected]; [email protected]; linux-
>[email protected]; [email protected]
>Cc: Rob Herring <[email protected]>
>Subject: Re: [PATCH 08/10] ARM: dts: exynos: use proper 'dma-
>channels/requests' properties
>
>Hi Krzysztof,
>
>On 27.04.2022 17:58, Krzysztof Kozlowski wrote:
>> pl330 DMA controller bindings documented 'dma-channels' and
>> 'dma-requests' properties (without leading hash sign), so fix the DTS
>> to match the bindings.
>>
>> Reported-by: Rob Herring <[email protected]>
>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
>Are those properties really needed for PL330 driver on Exynos SoCs? I've
>removed them and I still see the proper values read from registers and
>reported in the log (Exynos4210):
>
>dma-pl330 12680000.dma-controller: Loaded driver for PL330 DMAC-141330
>dma-pl330 12680000.dma-controller: DBUFF-32x4bytes Num_Chans-8
>Num_Peri-32 Num_Events-32
>dma-pl330 12690000.dma-controller: Loaded driver for PL330 DMAC-141330
>dma-pl330 12690000.dma-controller: DBUFF-32x4bytes Num_Chans-8
>Num_Peri-32 Num_Events-32
>dma-pl330 12850000.dma-controller: Loaded driver for PL330 DMAC-141330
>dma-pl330 12850000.dma-controller: DBUFF-64x8bytes Num_Chans-8
>Num_Peri-1 Num_Events-32
>
>I also don't see any code that would read those properties. IMHO they should
>be simply removed at all, at least for the PL330 related nodes.
>
I thought these series is correcting the DMA binding error, however is DMA binding itself is broken then probably this need a relook.
>> ---
>> arch/arm/boot/dts/exynos3250.dtsi | 8 ++++----
>> arch/arm/boot/dts/exynos4.dtsi | 12 +++++------
>> .../boot/dts/exynos4210-universal_c210.dts | 4 ++--
>> arch/arm/boot/dts/exynos5250.dtsi | 16 +++++++--------
>> arch/arm/boot/dts/exynos5410.dtsi | 8 ++++----
>> arch/arm/boot/dts/exynos5420.dtsi | 20 +++++++++----------
>> 6 files changed, 34 insertions(+), 34 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/exynos3250.dtsi
>> b/arch/arm/boot/dts/exynos3250.dtsi
>> index 41bb421e67c2..7bdd4f0782c3 100644
>> --- a/arch/arm/boot/dts/exynos3250.dtsi
>> +++ b/arch/arm/boot/dts/exynos3250.dtsi
>> @@ -429,8 +429,8 @@ pdma0: dma-controller@12680000 {
>> clocks = <&cmu CLK_PDMA0>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> pdma1: dma-controller@12690000 {
>> @@ -440,8 +440,8 @@ pdma1: dma-controller@12690000 {
>> clocks = <&cmu CLK_PDMA1>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> adc: adc@126c0000 {
>> diff --git a/arch/arm/boot/dts/exynos4.dtsi
>> b/arch/arm/boot/dts/exynos4.dtsi index 5fd17bc52321..2a244aaf84b4
>> 100644
>> --- a/arch/arm/boot/dts/exynos4.dtsi
>> +++ b/arch/arm/boot/dts/exynos4.dtsi
>> @@ -676,8 +676,8 @@ pdma0: dma-controller@12680000 {
>> clocks = <&clock CLK_PDMA0>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> pdma1: dma-controller@12690000 {
>> @@ -687,8 +687,8 @@ pdma1: dma-controller@12690000 {
>> clocks = <&clock CLK_PDMA1>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> mdma1: dma-controller@12850000 {
>> @@ -698,8 +698,8 @@ mdma1: dma-controller@12850000 {
>> clocks = <&clock CLK_MDMA>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <1>;
>> + dma-channels = <8>;
>> + dma-requests = <1>;
>> };
>>
>> fimd: fimd@11c00000 {
>> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
>> b/arch/arm/boot/dts/exynos4210-universal_c210.dts
>> index 138d606d58a5..c1b11704b8ee 100644
>> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
>> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
>> @@ -666,8 +666,8 @@ mdma0: dma-controller@12840000 {
>> clocks = <&clock CLK_MDMA>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <1>;
>> + dma-channels = <8>;
>> + dma-requests = <1>;
>> power-domains = <&pd_lcd0>;
>> };
>> };
>> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
>> b/arch/arm/boot/dts/exynos5250.dtsi
>> index df80ddfada2d..c4c0b4c08094 100644
>> --- a/arch/arm/boot/dts/exynos5250.dtsi
>> +++ b/arch/arm/boot/dts/exynos5250.dtsi
>> @@ -700,8 +700,8 @@ pdma0: dma-controller@121a0000 {
>> clocks = <&clock CLK_PDMA0>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> pdma1: dma-controller@121b0000 {
>> @@ -711,8 +711,8 @@ pdma1: dma-controller@121b0000 {
>> clocks = <&clock CLK_PDMA1>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> mdma0: dma-controller@10800000 {
>> @@ -722,8 +722,8 @@ mdma0: dma-controller@10800000 {
>> clocks = <&clock CLK_MDMA0>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <1>;
>> + dma-channels = <8>;
>> + dma-requests = <1>;
>> };
>>
>> mdma1: dma-controller@11c10000 {
>> @@ -733,8 +733,8 @@ mdma1: dma-controller@11c10000 {
>> clocks = <&clock CLK_MDMA1>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <1>;
>> + dma-channels = <8>;
>> + dma-requests = <1>;
>> };
>>
>> gsc_0: gsc@13e00000 {
>> diff --git a/arch/arm/boot/dts/exynos5410.dtsi
>> b/arch/arm/boot/dts/exynos5410.dtsi
>> index 4d797a9abba4..6dc08cb0622c 100644
>> --- a/arch/arm/boot/dts/exynos5410.dtsi
>> +++ b/arch/arm/boot/dts/exynos5410.dtsi
>> @@ -196,8 +196,8 @@ pdma0: dma-controller@121a0000 {
>> clocks = <&clock CLK_PDMA0>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> pdma1: dma-controller@121b0000 {
>> @@ -207,8 +207,8 @@ pdma1: dma-controller@121b0000 {
>> clocks = <&clock CLK_PDMA1>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> audi2s0: i2s@3830000 {
>> diff --git a/arch/arm/boot/dts/exynos5420.dtsi
>> b/arch/arm/boot/dts/exynos5420.dtsi
>> index 21b608705049..08198d82ce8d 100644
>> --- a/arch/arm/boot/dts/exynos5420.dtsi
>> +++ b/arch/arm/boot/dts/exynos5420.dtsi
>> @@ -437,8 +437,8 @@ adma: dma-controller@3880000 {
>> clocks = <&clock_audss EXYNOS_ADMA>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <6>;
>> - #dma-requests = <16>;
>> + dma-channels = <6>;
>> + dma-requests = <16>;
>> power-domains = <&mau_pd>;
>> };
>>
>> @@ -449,8 +449,8 @@ pdma0: dma-controller@121a0000 {
>> clocks = <&clock CLK_PDMA0>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> pdma1: dma-controller@121b0000 {
>> @@ -460,8 +460,8 @@ pdma1: dma-controller@121b0000 {
>> clocks = <&clock CLK_PDMA1>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>> };
>>
>> mdma0: dma-controller@10800000 {
>> @@ -471,8 +471,8 @@ mdma0: dma-controller@10800000 {
>> clocks = <&clock CLK_MDMA0>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <1>;
>> + dma-channels = <8>;
>> + dma-requests = <1>;
>> };
>>
>> mdma1: dma-controller@11c10000 {
>> @@ -482,8 +482,8 @@ mdma1: dma-controller@11c10000 {
>> clocks = <&clock CLK_MDMA1>;
>> clock-names = "apb_pclk";
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <1>;
>> + dma-channels = <8>;
>> + dma-requests = <1>;
>> /*
>> * MDMA1 can support both secure and non-secure
>> * AXI transactions. When this is enabled in
>
>Best regards
>--
>Marek Szyprowski, PhD
>Samsung R&D Institute Poland
On 2022-04-27 16:58, Krzysztof Kozlowski wrote:
> pl330 DMA controller bindings documented 'dma-channels' and
> 'dma-requests' properties (without leading hash sign), so fix the DTS to
> match the bindings.
>
> Reported-by: Rob Herring <[email protected]>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index 4f40a5c8f565..96ef0ddc0b2d 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -829,8 +829,8 @@ dma-controller@7ff00000 {
> compatible = "arm,pl330", "arm,primecell";
> reg = <0x0 0x7ff00000 0 0x1000>;
> #dma-cells = <1>;
> - #dma-channels = <8>;
> - #dma-requests = <32>;
> + dma-channels = <8>;
> + dma-requests = <32>;
BTW, this has always been wrong - Juno is configured with only 8 request
interfaces. But then it's moot anyway since PL330 has an ID register for
this stuff[1], so the DT properties aren't used by Linux, and shouldn't
be needed in general.
Thanks,
Robin.
[1]
https://developer.arm.com/documentation/ddi0424/d/programmers-model/register-descriptions/configuration-register-0?lang=en
> interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
On 28.04.2022 11:54, Krzysztof Kozlowski wrote:
> On 28/04/2022 11:50, Marek Szyprowski wrote:
>> On 27.04.2022 17:58, Krzysztof Kozlowski wrote:
>>> pl330 DMA controller bindings documented 'dma-channels' and
>>> 'dma-requests' properties (without leading hash sign), so fix the DTS to
>>> match the bindings.
>>>
>>> Reported-by: Rob Herring <[email protected]>
>>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>> Are those properties really needed for PL330 driver on Exynos SoCs? I've
>> removed them and I still see the proper values read from registers and
>> reported in the log (Exynos4210):
>>
>> dma-pl330 12680000.dma-controller: Loaded driver for PL330 DMAC-141330
>> dma-pl330 12680000.dma-controller: DBUFF-32x4bytes Num_Chans-8
>> Num_Peri-32 Num_Events-32
>> dma-pl330 12690000.dma-controller: Loaded driver for PL330 DMAC-141330
>> dma-pl330 12690000.dma-controller: DBUFF-32x4bytes Num_Chans-8
>> Num_Peri-32 Num_Events-32
>> dma-pl330 12850000.dma-controller: Loaded driver for PL330 DMAC-141330
>> dma-pl330 12850000.dma-controller: DBUFF-64x8bytes Num_Chans-8
>> Num_Peri-1 Num_Events-32
>>
>> I also don't see any code that would read those properties. IMHO they
>> should be simply removed at all, at least for the PL330 related nodes.
> In current Linux implementation they indeed are not used. Nothing parses
> them. However:
> 1. They describe (hopefully correct) the hardware.
> 2. They might be used by other implementations of pl330 driver.
>
> I would not remove them from existing sources, but indeed maybe there is
> no need to add for new files.
What's the point in having dt properties duplicating data that might be
read from the driver registers?
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
On 28/04/2022 11:50, Marek Szyprowski wrote:
> Hi Krzysztof,
>
> On 27.04.2022 17:58, Krzysztof Kozlowski wrote:
>> pl330 DMA controller bindings documented 'dma-channels' and
>> 'dma-requests' properties (without leading hash sign), so fix the DTS to
>> match the bindings.
>>
>> Reported-by: Rob Herring <[email protected]>
>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> Are those properties really needed for PL330 driver on Exynos SoCs? I've
> removed them and I still see the proper values read from registers and
> reported in the log (Exynos4210):
>
> dma-pl330 12680000.dma-controller: Loaded driver for PL330 DMAC-141330
> dma-pl330 12680000.dma-controller: DBUFF-32x4bytes Num_Chans-8
> Num_Peri-32 Num_Events-32
> dma-pl330 12690000.dma-controller: Loaded driver for PL330 DMAC-141330
> dma-pl330 12690000.dma-controller: DBUFF-32x4bytes Num_Chans-8
> Num_Peri-32 Num_Events-32
> dma-pl330 12850000.dma-controller: Loaded driver for PL330 DMAC-141330
> dma-pl330 12850000.dma-controller: DBUFF-64x8bytes Num_Chans-8
> Num_Peri-1 Num_Events-32
>
> I also don't see any code that would read those properties. IMHO they
> should be simply removed at all, at least for the PL330 related nodes.
In current Linux implementation they indeed are not used. Nothing parses
them. However:
1. They describe (hopefully correct) the hardware.
2. They might be used by other implementations of pl330 driver.
I would not remove them from existing sources, but indeed maybe there is
no need to add for new files.
Best regards,
Krzysztof
On 28/04/2022 12:05, Marek Szyprowski wrote:
>>>>> I also don't see any code that would read those properties. IMHO they
>>>>> should be simply removed at all, at least for the PL330 related nodes.
>>>> In current Linux implementation they indeed are not used. Nothing parses
>>>> them. However:
>>>> 1. They describe (hopefully correct) the hardware.
>>>> 2. They might be used by other implementations of pl330 driver.
>>>>
>>>> I would not remove them from existing sources, but indeed maybe there is
>>>> no need to add for new files.
>>> What's the point in having dt properties duplicating data that might be
>>> read from the driver registers?
>> Hm, indeed, there is no point in this. Since they are read from
>> registers, what was the idea behind in commit 42cf20980cde?
>
> #dma-cells is indeed required, but the rest seems to be the cargo-cult
> of some kind.
Rob,
Any guidance from your side? Is there any benefit in describing the
hadrware (dma-channels/dma-requests) if the same value can be read from
registers?
Best regards,
Krzysztof
On 28/04/2022 11:57, Marek Szyprowski wrote:
> On 28.04.2022 11:54, Krzysztof Kozlowski wrote:
>> On 28/04/2022 11:50, Marek Szyprowski wrote:
>>> On 27.04.2022 17:58, Krzysztof Kozlowski wrote:
>>>> pl330 DMA controller bindings documented 'dma-channels' and
>>>> 'dma-requests' properties (without leading hash sign), so fix the DTS to
>>>> match the bindings.
>>>>
>>>> Reported-by: Rob Herring <[email protected]>
>>>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>>> Are those properties really needed for PL330 driver on Exynos SoCs? I've
>>> removed them and I still see the proper values read from registers and
>>> reported in the log (Exynos4210):
>>>
>>> dma-pl330 12680000.dma-controller: Loaded driver for PL330 DMAC-141330
>>> dma-pl330 12680000.dma-controller: DBUFF-32x4bytes Num_Chans-8
>>> Num_Peri-32 Num_Events-32
>>> dma-pl330 12690000.dma-controller: Loaded driver for PL330 DMAC-141330
>>> dma-pl330 12690000.dma-controller: DBUFF-32x4bytes Num_Chans-8
>>> Num_Peri-32 Num_Events-32
>>> dma-pl330 12850000.dma-controller: Loaded driver for PL330 DMAC-141330
>>> dma-pl330 12850000.dma-controller: DBUFF-64x8bytes Num_Chans-8
>>> Num_Peri-1 Num_Events-32
>>>
>>> I also don't see any code that would read those properties. IMHO they
>>> should be simply removed at all, at least for the PL330 related nodes.
>> In current Linux implementation they indeed are not used. Nothing parses
>> them. However:
>> 1. They describe (hopefully correct) the hardware.
>> 2. They might be used by other implementations of pl330 driver.
>>
>> I would not remove them from existing sources, but indeed maybe there is
>> no need to add for new files.
>
> What's the point in having dt properties duplicating data that might be
> read from the driver registers?
Hm, indeed, there is no point in this. Since they are read from
registers, what was the idea behind in commit 42cf20980cde?
Best regards,
Krzysztof
On Thu, Apr 28, 2022 at 12:09:02PM +0200, Krzysztof Kozlowski wrote:
> On 28/04/2022 12:05, Marek Szyprowski wrote:
> >>>>> I also don't see any code that would read those properties. IMHO they
> >>>>> should be simply removed at all, at least for the PL330 related nodes.
> >>>> In current Linux implementation they indeed are not used. Nothing parses
> >>>> them. However:
> >>>> 1. They describe (hopefully correct) the hardware.
> >>>> 2. They might be used by other implementations of pl330 driver.
> >>>>
> >>>> I would not remove them from existing sources, but indeed maybe there is
> >>>> no need to add for new files.
> >>> What's the point in having dt properties duplicating data that might be
> >>> read from the driver registers?
> >> Hm, indeed, there is no point in this. Since they are read from
> >> registers, what was the idea behind in commit 42cf20980cde?
> >
> > #dma-cells is indeed required, but the rest seems to be the cargo-cult
> > of some kind.
>
> Rob,
>
> Any guidance from your side? Is there any benefit in describing the
> hadrware (dma-channels/dma-requests) if the same value can be read from
> registers?
Drop the properties. They should only be an override if ever needed.
Rob
On 28/04/2022 12:43, Robin Murphy wrote:
> On 2022-04-27 16:58, Krzysztof Kozlowski wrote:
>> pl330 DMA controller bindings documented 'dma-channels' and
>> 'dma-requests' properties (without leading hash sign), so fix the DTS to
>> match the bindings.
>>
>> Reported-by: Rob Herring <[email protected]>
>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>> ---
>> arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
>> index 4f40a5c8f565..96ef0ddc0b2d 100644
>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>> @@ -829,8 +829,8 @@ dma-controller@7ff00000 {
>> compatible = "arm,pl330", "arm,primecell";
>> reg = <0x0 0x7ff00000 0 0x1000>;
>> #dma-cells = <1>;
>> - #dma-channels = <8>;
>> - #dma-requests = <32>;
>> + dma-channels = <8>;
>> + dma-requests = <32>;
>
> BTW, this has always been wrong - Juno is configured with only 8 request
> interfaces. But then it's moot anyway since PL330 has an ID register for
> this stuff[1], so the DT properties aren't used by Linux, and shouldn't
> be needed in general.
Marek also raised the point [1] that these properties are useless for
PL330 because the actual data is read from the device registers.
I understand you are also supporting the idea of removing them from
pl330 device nodes?
[1]
https://lore.kernel.org/linux-devicetree/[email protected]/T/#mf108b8c9f0d513ebc6e381775e3c6887b5c2fe31
Best regards,
Krzysztof