revision history:
v2: (thanks Lucas)
* reorder and clean up defconfig changes
* use "dram" for the interconnect path name and document it
v1:
* link: https://lore.kernel.org/linux-arm-kernel/[email protected]/T/
thanks,
martin
Leonard Crestez (1):
arm64: dts: imx8m: Add NOC nodes
Martin Kepplinger (6):
arm64: dts: imx8mq: Add interconnect provider property
arm64: dts: imx8mq: Add interconnect for lcdif
dt-bindings: mxsfb: Add interconnect bindings for LCDIF path
interconnect: imx8mq: Use icc_sync_state
arm64: defconfig: updates for 5.10
arm64: defconfig: Enable interconnect for imx8mq
.../devicetree/bindings/display/mxsfb.txt | 6 ++
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 22 +++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 22 +++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 26 ++++++
arch/arm64/configs/defconfig | 85 ++++++-------------
drivers/interconnect/imx/imx8mq.c | 2 +
6 files changed, 104 insertions(+), 59 deletions(-)
--
2.20.1
Add #interconnect-cells on main &noc so that it will probe the interconnect
provider.
Signed-off-by: Martin Kepplinger <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d139a46ee8ce..244e28e54b35 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1163,6 +1163,7 @@
reg = <0x32700000 0x100000>;
clocks = <&clk IMX8MQ_CLK_NOC>;
devfreq = <&ddrc>;
+ #interconnect-cells = <1>;
operating-points-v2 = <&noc_opp_table>;
noc_opp_table: opp-table {
--
2.20.1
Add interconnect ports for lcdif to set bus capabilities.
Signed-off-by: Martin Kepplinger <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 244e28e54b35..f21198b19ecc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -11,6 +11,7 @@
#include "dt-bindings/input/input.h"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/interconnect/imx8mq.h>
#include "imx8mq-pinfunc.h"
/ {
@@ -522,6 +523,8 @@
<&clk IMX8MQ_VIDEO_PLL1>,
<&clk IMX8MQ_VIDEO_PLL1_OUT>;
assigned-clock-rates = <0>, <0>, <0>, <594000000>;
+ interconnects = <&noc IMX8MQ_ICM_LCDIF &noc IMX8MQ_ICS_DRAM>;
+ interconnect-names = "dram";
status = "disabled";
port@0 {
--
2.20.1
Add the icc_sync_state callback to notify the framework when consumers
are probed and the bandwidth doesn't have to be kept at maximum anymore.
Signed-off-by: Martin Kepplinger <[email protected]>
Suggested-by: Georgi Djakov <[email protected]>
---
drivers/interconnect/imx/imx8mq.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/interconnect/imx/imx8mq.c b/drivers/interconnect/imx/imx8mq.c
index ba43a15aefec..d7768d3c6d8a 100644
--- a/drivers/interconnect/imx/imx8mq.c
+++ b/drivers/interconnect/imx/imx8mq.c
@@ -7,6 +7,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
+#include <linux/interconnect-provider.h>
#include <dt-bindings/interconnect/imx8mq.h>
#include "imx.h"
@@ -94,6 +95,7 @@ static struct platform_driver imx8mq_icc_driver = {
.remove = imx8mq_icc_remove,
.driver = {
.name = "imx8mq-interconnect",
+ .sync_state = icc_sync_state,
},
};
--
2.20.1
From: Leonard Crestez <[email protected]>
Add initial support for dynamic frequency scaling of main NOC.
Make DDRC the parent of the NOC (using passive governor) so that the
main NOC is automatically scaled together with DDRC by default.
Support for proactive scaling via interconnect will come on top.
Signed-off-by: Leonard Crestez <[email protected]>
Tested-by: Martin Kepplinger <[email protected]> (imx8mq)
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 22 ++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 22 ++++++++++++++++++++++
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++
3 files changed, 66 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index c824f2615fe8..835b19f0ea42 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -921,6 +921,28 @@
};
+ noc: interconnect@32700000 {
+ compatible = "fsl,imx8mm-noc", "fsl,imx8m-noc";
+ reg = <0x32700000 0x100000>;
+ clocks = <&clk IMX8MM_CLK_NOC>;
+ devfreq = <&ddrc>;
+ operating-points-v2 = <&noc_opp_table>;
+
+ noc_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-150M {
+ opp-hz = /bits/ 64 <150000000>;
+ };
+ opp-375M {
+ opp-hz = /bits/ 64 <375000000>;
+ };
+ opp-750M {
+ opp-hz = /bits/ 64 <750000000>;
+ };
+ };
+ };
+
aips4: bus@32c00000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x32c00000 0x400000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index a06d2a6268e6..8e2d413f97d4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -772,6 +772,28 @@
};
+ noc: interconnect@32700000 {
+ compatible = "fsl,imx8mn-noc", "fsl,imx8m-noc";
+ reg = <0x32700000 0x100000>;
+ clocks = <&clk IMX8MN_CLK_NOC>;
+ devfreq = <&ddrc>;
+ operating-points-v2 = <&noc_opp_table>;
+
+ noc_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-100M {
+ opp-hz = /bits/ 64 <100000000>;
+ };
+ opp-600M {
+ opp-hz = /bits/ 64 <600000000>;
+ };
+ opp-800M {
+ opp-hz = /bits/ 64 <800000000>;
+ };
+ };
+ };
+
aips4: bus@32c00000 {
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x32c00000 0x400000>;
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index a841a023e8e0..d139a46ee8ce 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1158,6 +1158,28 @@
};
};
+ noc: interconnect@32700000 {
+ compatible = "fsl,imx8mq-noc", "fsl,imx8m-noc";
+ reg = <0x32700000 0x100000>;
+ clocks = <&clk IMX8MQ_CLK_NOC>;
+ devfreq = <&ddrc>;
+ operating-points-v2 = <&noc_opp_table>;
+
+ noc_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-133M {
+ opp-hz = /bits/ 64 <133333333>;
+ };
+ opp-400M {
+ opp-hz = /bits/ 64 <400000000>;
+ };
+ opp-800M {
+ opp-hz = /bits/ 64 <800000000>;
+ };
+ };
+ };
+
bus@32c00000 { /* AIPS4 */
compatible = "fsl,aips-bus", "simple-bus";
reg = <0x32c00000 0x400000>;
--
2.20.1
Add optional interconnect properties for the dram path requests.
Signed-off-by: Martin Kepplinger <[email protected]>
---
Documentation/devicetree/bindings/display/mxsfb.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mxsfb.txt b/Documentation/devicetree/bindings/display/mxsfb.txt
index c985871c46b3..d494a2674290 100644
--- a/Documentation/devicetree/bindings/display/mxsfb.txt
+++ b/Documentation/devicetree/bindings/display/mxsfb.txt
@@ -15,6 +15,12 @@ Required properties:
- "pix" for the LCDIF block clock
- (MX6SX-only) "axi", "disp_axi" for the bus interface clock
+Optional properties:
+- interconnects : interconnect path specifier for LCDIF according to
+ Documentation/devicetree/bindings/interconnect/interconnect.txt.
+- interconnect-names: the name describing the interconnect path.
+ Should be "dram" for i.MX8MQ.
+
Required sub-nodes:
- port: The connection to an encoder chip.
--
2.20.1
Hi Martin,
Thank you for sending the patches.
On 1.12.20 14:39, Martin Kepplinger wrote:
> From: Leonard Crestez <[email protected]>
>
> Add initial support for dynamic frequency scaling of main NOC.
>
> Make DDRC the parent of the NOC (using passive governor) so that the
> main NOC is automatically scaled together with DDRC by default.
>
> Support for proactive scaling via interconnect will come on top.
>
> Signed-off-by: Leonard Crestez <[email protected]>
> Tested-by: Martin Kepplinger <[email protected]> (imx8mq)
As you are sending this, i believe that it should have your signed-off
line (please check Documentation/process/submitting-patches.rst).
Also please give people some time to look into this (at least 1-2 weeks)
before submitting a new version.
Thanks,
Georgi
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 22 ++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 22 ++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++
> 3 files changed, 66 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index c824f2615fe8..835b19f0ea42 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -921,6 +921,28 @@
>
> };
>
> + noc: interconnect@32700000 {
> + compatible = "fsl,imx8mm-noc", "fsl,imx8m-noc";
> + reg = <0x32700000 0x100000>;
> + clocks = <&clk IMX8MM_CLK_NOC>;
> + devfreq = <&ddrc>;
> + operating-points-v2 = <&noc_opp_table>;
> +
> + noc_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-150M {
> + opp-hz = /bits/ 64 <150000000>;
> + };
> + opp-375M {
> + opp-hz = /bits/ 64 <375000000>;
> + };
> + opp-750M {
> + opp-hz = /bits/ 64 <750000000>;
> + };
> + };
> + };
> +
> aips4: bus@32c00000 {
> compatible = "fsl,aips-bus", "simple-bus";
> reg = <0x32c00000 0x400000>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index a06d2a6268e6..8e2d413f97d4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -772,6 +772,28 @@
>
> };
>
> + noc: interconnect@32700000 {
> + compatible = "fsl,imx8mn-noc", "fsl,imx8m-noc";
> + reg = <0x32700000 0x100000>;
> + clocks = <&clk IMX8MN_CLK_NOC>;
> + devfreq = <&ddrc>;
> + operating-points-v2 = <&noc_opp_table>;
> +
> + noc_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-100M {
> + opp-hz = /bits/ 64 <100000000>;
> + };
> + opp-600M {
> + opp-hz = /bits/ 64 <600000000>;
> + };
> + opp-800M {
> + opp-hz = /bits/ 64 <800000000>;
> + };
> + };
> + };
> +
> aips4: bus@32c00000 {
> compatible = "fsl,aips-bus", "simple-bus";
> reg = <0x32c00000 0x400000>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index a841a023e8e0..d139a46ee8ce 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -1158,6 +1158,28 @@
> };
> };
>
> + noc: interconnect@32700000 {
> + compatible = "fsl,imx8mq-noc", "fsl,imx8m-noc";
> + reg = <0x32700000 0x100000>;
> + clocks = <&clk IMX8MQ_CLK_NOC>;
> + devfreq = <&ddrc>;
> + operating-points-v2 = <&noc_opp_table>;
> +
> + noc_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-133M {
> + opp-hz = /bits/ 64 <133333333>;
> + };
> + opp-400M {
> + opp-hz = /bits/ 64 <400000000>;
> + };
> + opp-800M {
> + opp-hz = /bits/ 64 <800000000>;
> + };
> + };
> + };
> +
> bus@32c00000 { /* AIPS4 */
> compatible = "fsl,aips-bus", "simple-bus";
> reg = <0x32c00000 0x400000>;
>
Hi Martin,
On Tue, Dec 01, 2020 at 01:39:29PM +0100, Martin Kepplinger wrote:
> Add optional interconnect properties for the dram path requests.
>
> Signed-off-by: Martin Kepplinger <[email protected]>
> ---
> Documentation/devicetree/bindings/display/mxsfb.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/mxsfb.txt b/Documentation/devicetree/bindings/display/mxsfb.txt
> index c985871c46b3..d494a2674290 100644
> --- a/Documentation/devicetree/bindings/display/mxsfb.txt
> +++ b/Documentation/devicetree/bindings/display/mxsfb.txt
> @@ -15,6 +15,12 @@ Required properties:
> - "pix" for the LCDIF block clock
> - (MX6SX-only) "axi", "disp_axi" for the bus interface clock
>
> +Optional properties:
> +- interconnects : interconnect path specifier for LCDIF according to
> + Documentation/devicetree/bindings/interconnect/interconnect.txt.
> +- interconnect-names: the name describing the interconnect path.
> + Should be "dram" for i.MX8MQ.
> +
There's a yaml conversion by Laurentiu for mxsfb in flight:
https://lore.kernel.org/dri-devel/[email protected]/
Cheers,
-- Guido
> Required sub-nodes:
> - port: The connection to an encoder chip.
>
> --
> 2.20.1
>
On Tue, Dec 01, 2020 at 01:39:26PM +0100, Martin Kepplinger wrote:
> From: Leonard Crestez <[email protected]>
>
> Add initial support for dynamic frequency scaling of main NOC.
>
> Make DDRC the parent of the NOC (using passive governor) so that the
> main NOC is automatically scaled together with DDRC by default.
>
> Support for proactive scaling via interconnect will come on top.
>
> Signed-off-by: Leonard Crestez <[email protected]>
> Tested-by: Martin Kepplinger <[email protected]> (imx8mq)
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 22 ++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 22 ++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 22 ++++++++++++++++++++++
> 3 files changed, 66 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index c824f2615fe8..835b19f0ea42 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -921,6 +921,28 @@
>
> };
>
> + noc: interconnect@32700000 {
> + compatible = "fsl,imx8mm-noc", "fsl,imx8m-noc";
> + reg = <0x32700000 0x100000>;
> + clocks = <&clk IMX8MM_CLK_NOC>;
> + devfreq = <&ddrc>;
This does not pass the dtschema checks. Are you missing here any
dependencies?
arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: interconnect@32700000: 'devfreq' does not match any of the regexes: 'pinctrl-[0-9]+'
Best regards,
Krzysztof