UDMA Mode - Frequency compatibility
UDMA5 - 100 MB/s - SCLK = 133 MHz
UDMA4 - 66 MB/s - SCLK >= 80 MHz
UDMA3 - 44.4 MB/s - SCLK >= 50 MHz
UDMA2 - 33 MB/s - SCLK >= 40 MHz
Signed-off-by: Sonic Zhang <[email protected]>
---
drivers/ata/pata_bf54x.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
index 81db405..088a41f 100644
--- a/drivers/ata/pata_bf54x.c
+++ b/drivers/ata/pata_bf54x.c
@@ -1489,6 +1489,8 @@ static int __devinit bfin_atapi_probe(st
int board_idx = 0;
struct resource *res;
struct ata_host *host;
+ unsigned int fsclk = get_sclk();
+ int udma_mode = 5;
const struct ata_port_info *ppi[] =
{ &bfin_port_info[board_idx], NULL };
@@ -1507,6 +1509,11 @@ static int __devinit bfin_atapi_probe(st
if (res == NULL)
return -EINVAL;
+ while (bfin_port_info[board_idx].udma_mask>0 && udma_fsclk[udma_mode] > fsclk) {
+ udma_mode--;
+ bfin_port_info[board_idx].udma_mask >>= 1;
+ }
+
/*
* Now that that's out of the way, wire up the port..
*/
--
1.4.3.4
Any comment?
Thanks
Sonic
On Nov 27, 2007 12:47 PM, sonic zhang <[email protected]> wrote:
> UDMA Mode - Frequency compatibility
>
> UDMA5 - 100 MB/s - SCLK = 133 MHz
> UDMA4 - 66 MB/s - SCLK >= 80 MHz
> UDMA3 - 44.4 MB/s - SCLK >= 50 MHz
> UDMA2 - 33 MB/s - SCLK >= 40 MHz
>
>
> Signed-off-by: Sonic Zhang <[email protected]>
> ---
> drivers/ata/pata_bf54x.c | 7 +++++++
> 1 files changed, 7 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
> index 81db405..088a41f 100644
> --- a/drivers/ata/pata_bf54x.c
> +++ b/drivers/ata/pata_bf54x.c
> @@ -1489,6 +1489,8 @@ static int __devinit bfin_atapi_probe(st
> int board_idx = 0;
> struct resource *res;
> struct ata_host *host;
> + unsigned int fsclk = get_sclk();
> + int udma_mode = 5;
> const struct ata_port_info *ppi[] =
> { &bfin_port_info[board_idx], NULL };
>
> @@ -1507,6 +1509,11 @@ static int __devinit bfin_atapi_probe(st
> if (res == NULL)
> return -EINVAL;
>
> + while (bfin_port_info[board_idx].udma_mask>0 && udma_fsclk[udma_mode] > fsclk) {
> + udma_mode--;
> + bfin_port_info[board_idx].udma_mask >>= 1;
> + }
> +
> /*
> * Now that that's out of the way, wire up the port..
> */
> --
> 1.4.3.4
>
>
> -
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>
On Thu, 29 Nov 2007 15:18:24 +0800
"Sonic Zhang" <[email protected]> wrote:
> Any comment?
Looks fine to me
sonic zhang wrote:
> UDMA Mode - Frequency compatibility
>
> UDMA5 - 100 MB/s - SCLK = 133 MHz
> UDMA4 - 66 MB/s - SCLK >= 80 MHz
> UDMA3 - 44.4 MB/s - SCLK >= 50 MHz
> UDMA2 - 33 MB/s - SCLK >= 40 MHz
>
>
> Signed-off-by: Sonic Zhang <[email protected]>
> ---
> drivers/ata/pata_bf54x.c | 7 +++++++
> 1 files changed, 7 insertions(+), 0 deletions(-)
applied #upstream-fixes