This patch series adds memory interconnect support for Tegra234 SoC.
It is used to dynamically scale DRAM Frequency as per the bandwidth
requests from different Memory Controller (MC) clients.
MC Clients use ICC Framework's icc_set_bw() api to dynamically request
for the DRAM bandwidth (BW). As per path, the request will be routed
from MC to the EMC driver. EMC driver will then send the Client ID,
type, and frequency request info to the BPMP-FW which will set the
final DRAM freq considering all exisiting requests.
MC and EMC are the ICC providers. Nodes in path for a request will be:
Client[1-n] -> MC -> EMC -> EMEM/DRAM
The patch series also adds interconnect support in the CPUFREQ driver
for scaling bandwidth with CPU frequency. For that, added per cluster
OPP table in the CPUFREQ driver and using that to scale DRAM freq by
requesting the minimum BW respective to the given CPU frequency in OPP
table for that cluster.
Sumit Gupta (10):
memory: tegra: add interconnect support for DRAM scaling in Tegra234
memory: tegra: adding iso mc clients for Tegra234
memory: tegra: add pcie mc clients for Tegra234
memory: tegra: add support for software mc clients in Tegra234
dt-bindings: tegra: add icc ids for dummy MC clients
arm64: tegra: Add cpu OPP tables and interconnects property
cpufreq: Add Tegra234 to cpufreq-dt-platdev blocklist
cpufreq: tegra194: add OPP support and set bandwidth
memory: tegra: get number of enabled mc channels
memory: tegra: make cluster bw request a multiple of mc_channels
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 276 +++++++++++
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
drivers/cpufreq/tegra194-cpufreq.c | 152 +++++-
drivers/memory/tegra/mc.c | 80 +++-
drivers/memory/tegra/mc.h | 1 +
drivers/memory/tegra/tegra186-emc.c | 166 +++++++
drivers/memory/tegra/tegra234.c | 565 ++++++++++++++++++++++-
include/dt-bindings/memory/tegra234-mc.h | 5 +
include/soc/tegra/mc.h | 11 +
include/soc/tegra/tegra-icc.h | 79 ++++
10 files changed, 1312 insertions(+), 24 deletions(-)
create mode 100644 include/soc/tegra/tegra-icc.h
--
2.17.1
CPU opp table have bandwidth data per MC channel. The actual bandwidth
depends on number of MC channels which can change as per the boot config
for a board. So, multiply the bandwidth request for CPU clusters with
number of enabled MC channels. This is not required to be done for other
MC clients.
Signed-off-by: Sumit Gupta <[email protected]>
---
drivers/memory/tegra/tegra234.c | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/memory/tegra/tegra234.c b/drivers/memory/tegra/tegra234.c
index 82ce6c3c3eb0..a45fc99b9c82 100644
--- a/drivers/memory/tegra/tegra234.c
+++ b/drivers/memory/tegra/tegra234.c
@@ -834,6 +834,29 @@ static int tegra234_mc_icc_set(struct icc_node *src, struct icc_node *dst)
return 0;
}
+static int tegra234_mc_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
+ u32 peak_bw, u32 *agg_avg, u32 *agg_peak)
+{
+ struct tegra_icc_node *tnode = NULL;
+ struct tegra_mc *mc = NULL;
+
+ if (node->id == TEGRA_ICC_MC_CPU_CLUSTER0 ||
+ node->id == TEGRA_ICC_MC_CPU_CLUSTER1 ||
+ node->id == TEGRA_ICC_MC_CPU_CLUSTER2) {
+ if (node->data) {
+ tnode = node->data;
+ mc = tnode->mc;
+ if (mc)
+ peak_bw = peak_bw * mc->num_channels;
+ }
+ }
+
+ *agg_avg += avg_bw;
+ *agg_peak = max(*agg_peak, peak_bw);
+
+ return 0;
+}
+
static struct icc_node*
tegra234_mc_of_icc_xlate(struct of_phandle_args *spec, void *data)
{
@@ -866,7 +889,7 @@ static int tegra234_mc_icc_get_init_bw(struct icc_node *node, u32 *avg, u32 *pea
static const struct tegra_mc_icc_ops tegra234_mc_icc_ops = {
.xlate = tegra234_mc_of_icc_xlate,
.get_bw = tegra234_mc_icc_get_init_bw,
- .aggregate = icc_std_aggregate,
+ .aggregate = tegra234_mc_icc_aggregate,
.set = tegra234_mc_icc_set,
};
--
2.17.1
Adding ICC id's for dummy software clients representing CCPLEX clusters.
Signed-off-by: Sumit Gupta <[email protected]>
---
include/dt-bindings/memory/tegra234-mc.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
index 347e55e89a2a..6e60d55491b3 100644
--- a/include/dt-bindings/memory/tegra234-mc.h
+++ b/include/dt-bindings/memory/tegra234-mc.h
@@ -536,4 +536,9 @@
#define TEGRA234_MEMORY_CLIENT_NVJPG1SRD 0x123
#define TEGRA234_MEMORY_CLIENT_NVJPG1SWR 0x124
+/* ICC ID's for dummy MC clients used to represent CPU Clusters */
+#define TEGRA_ICC_MC_CPU_CLUSTER0 1003
+#define TEGRA_ICC_MC_CPU_CLUSTER1 1004
+#define TEGRA_ICC_MC_CPU_CLUSTER2 1005
+
#endif
--
2.17.1
On 20/12/2022 17:02, Sumit Gupta wrote:
> Adding ICC id's for dummy software clients representing CCPLEX clusters.
>
> Signed-off-by: Sumit Gupta <[email protected]>
> ---
> include/dt-bindings/memory/tegra234-mc.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
> index 347e55e89a2a..6e60d55491b3 100644
> --- a/include/dt-bindings/memory/tegra234-mc.h
> +++ b/include/dt-bindings/memory/tegra234-mc.h
> @@ -536,4 +536,9 @@
> #define TEGRA234_MEMORY_CLIENT_NVJPG1SRD 0x123
> #define TEGRA234_MEMORY_CLIENT_NVJPG1SWR 0x124
>
> +/* ICC ID's for dummy MC clients used to represent CPU Clusters */
> +#define TEGRA_ICC_MC_CPU_CLUSTER0 1003
Why the IDs do not start from 0?
Best regards,
Krzysztof
On 22/12/22 16:59, Krzysztof Kozlowski wrote:
> External email: Use caution opening links or attachments
>
>
> On 20/12/2022 17:02, Sumit Gupta wrote:
>> Adding ICC id's for dummy software clients representing CCPLEX clusters.
>>
>> Signed-off-by: Sumit Gupta <[email protected]>
>> ---
>> include/dt-bindings/memory/tegra234-mc.h | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/include/dt-bindings/memory/tegra234-mc.h b/include/dt-bindings/memory/tegra234-mc.h
>> index 347e55e89a2a..6e60d55491b3 100644
>> --- a/include/dt-bindings/memory/tegra234-mc.h
>> +++ b/include/dt-bindings/memory/tegra234-mc.h
>> @@ -536,4 +536,9 @@
>> #define TEGRA234_MEMORY_CLIENT_NVJPG1SRD 0x123
>> #define TEGRA234_MEMORY_CLIENT_NVJPG1SWR 0x124
>>
>> +/* ICC ID's for dummy MC clients used to represent CPU Clusters */
>> +#define TEGRA_ICC_MC_CPU_CLUSTER0 1003
>
> Why the IDs do not start from 0?
>
> Best regards,
> Krzysztof
>
MC client ID's are starting from zero. These ID's are used as
"icc_node->id" while creating the icc_node. So, can't use the duplicate
numbers.
$ grep TEGRA234_MEMORY_ "include/dt-bindings/memory/tegra234- mc.h"
#define TEGRA234_MEMORY_CLIENT_PTCR 0x00
#define TEGRA234_MEMORY_CLIENT_MIU7R 0x01
#define TEGRA234_MEMORY_CLIENT_MIU7W 0x02
#define TEGRA234_MEMORY_CLIENT_MIU8R 0x03
....
Dummy ID's which are already being used are starting from '1000'. So,
added to that number as the ID's used for creating "icc_node" for CPU
clusters are also dummy and they are not part of HW MC client's list.
$ grep "100[0-9]" ./drivers/memory/tegra/mc.h
#define TEGRA_ICC_MC 1000
#define TEGRA_ICC_EMC 1001
#define TEGRA_ICC_EMEM 1002
On 20/12/2022 17:02, Sumit Gupta wrote:
> Adding ICC id's for dummy software clients representing CCPLEX clusters.
>
> Signed-off-by: Sumit Gupta <[email protected]>
> ---
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof