On Tue, 31 Jul 2012, Cyril Chemparathy wrote:
> This patch modifies the switch_mm() processor functions to use 64-bit
> addresses. We use u64 instead of phys_addr_t, in order to avoid having config
> dependent register usage when calling into switch_mm assembly code.
>
> The changes in this patch are primarily adjustments for registers used for
> arguments to switch_mm. The few processor definitions that did use the second
> argument have been modified accordingly.
>
> Arguments and calling conventions aside, this patch should be a no-op on v6
> and non-LPAE v7 processors.
NAK.
You just broke all big endian targets, LPAE or not.
Nicolas
On 8/4/2012 3:04 AM, Nicolas Pitre wrote:
> On Tue, 31 Jul 2012, Cyril Chemparathy wrote:
>
>> This patch modifies the switch_mm() processor functions to use 64-bit
>> addresses. We use u64 instead of phys_addr_t, in order to avoid having config
>> dependent register usage when calling into switch_mm assembly code.
>>
>> The changes in this patch are primarily adjustments for registers used for
>> arguments to switch_mm. The few processor definitions that did use the second
>> argument have been modified accordingly.
>>
>> Arguments and calling conventions aside, this patch should be a no-op on v6
>> and non-LPAE v7 processors.
>
> NAK.
>
> You just broke all big endian targets, LPAE or not.
>
Indeed. Thanks.
Would C-land word swappery on BE do? Any other ideas on the best
approach to this?
>
> Nicolas
>
--
Thanks
- Cyril
On Sun, 5 Aug 2012, Cyril Chemparathy wrote:
> On 8/4/2012 3:04 AM, Nicolas Pitre wrote:
> > On Tue, 31 Jul 2012, Cyril Chemparathy wrote:
> >
> > > This patch modifies the switch_mm() processor functions to use 64-bit
> > > addresses. We use u64 instead of phys_addr_t, in order to avoid having
> > > config
> > > dependent register usage when calling into switch_mm assembly code.
> > >
> > > The changes in this patch are primarily adjustments for registers used for
> > > arguments to switch_mm. The few processor definitions that did use the
> > > second
> > > argument have been modified accordingly.
> > >
> > > Arguments and calling conventions aside, this patch should be a no-op on
> > > v6
> > > and non-LPAE v7 processors.
> >
> > NAK.
> >
> > You just broke all big endian targets, LPAE or not.
> >
>
> Indeed. Thanks.
>
> Would C-land word swappery on BE do? Any other ideas on the best approach to
> this?
First, don't use a u64 unconditionally. A phys_addr_t is best for the
same arguments as before. Since this is equivalent to a u64 only when
LPAE is defined, you then only have to care about endian issues in
proc-v7-3level.S. And in there you can deal with the issue with
register aliases just as it is done in lib/div64.S.
Nicolas