From: Vincent Stehlé <[email protected]>
OMAP5 needs SCU in SMP.
This fixes the following link errors:
arch/arm/mach-omap2/built-in.o: In function `scu_gp_set':
arch/arm/mach-omap2/sleep44xx.S:132: undefined reference to `scu_power_mode'
arch/arm/mach-omap2/built-in.o: In function `scu_gp_clear':
arch/arm/mach-omap2/sleep44xx.S:229: undefined reference to `scu_power_mode'
arch/arm/mach-omap2/built-in.o: In function `omap4_smp_prepare_cpus':
arch/arm/mach-omap2/omap-smp.c:211: undefined reference to `scu_enable'
arch/arm/mach-omap2/built-in.o: In function `omap4_smp_init_cpus':
arch/arm/mach-omap2/omap-smp.c:185: undefined reference to `scu_get_core_count'
Signed-off-by: Vincent Stehlé <[email protected]>
---
arch/arm/mach-omap2/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index f49cd51..81690a2 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -109,6 +109,7 @@ config SOC_OMAP5
select ARM_CPU_SUSPEND if PM
select ARM_GIC
select CPU_V7
+ select HAVE_ARM_SCU if SMP
select HAVE_SMP
select COMMON_CLK
select HAVE_ARM_ARCH_TIMER
--
1.7.10.4
On Tuesday 14 May 2013 10:27 PM, Vincent Stehlé wrote:
> From: Vincent Stehlé <[email protected]>
>
> OMAP5 needs SCU in SMP.
>
> This fixes the following link errors:
>
> arch/arm/mach-omap2/built-in.o: In function `scu_gp_set':
> arch/arm/mach-omap2/sleep44xx.S:132: undefined reference to `scu_power_mode'
> arch/arm/mach-omap2/built-in.o: In function `scu_gp_clear':
> arch/arm/mach-omap2/sleep44xx.S:229: undefined reference to `scu_power_mode'
> arch/arm/mach-omap2/built-in.o: In function `omap4_smp_prepare_cpus':
> arch/arm/mach-omap2/omap-smp.c:211: undefined reference to `scu_enable'
> arch/arm/mach-omap2/built-in.o: In function `omap4_smp_init_cpus':
> arch/arm/mach-omap2/omap-smp.c:185: undefined reference to `scu_get_core_count'
>
> Signed-off-by: Vincent Stehlé <[email protected]>
> ---
OMAP5 doesn't need the SCU. So Nak for the patch. I haven't noticed
this earlier. Do you know which commit broke this ?
Regards,
Santosh
On 05/15/2013 02:36 PM, Santosh Shilimkar wrote:
> OMAP5 doesn't need the SCU. So Nak for the patch.
Hi,
I agree that it is a pure link issue.
> I haven't noticed
> this earlier. Do you know which commit broke this ?
After some bisecting I arrived at this merge commit:
5497e7b Merge branch 'late/fixes' into fixes
Indeed, if I revert it (-m 1) the result does link properly. I'll try to
isolate it further.
Best regards,
V.
So the exact commit breaking OMAP5 link for me is:
883a106 ARM: default machine descriptor for multiplatform
The breakage seems to be a side effect of not selecting ARCH_VEXPRESS
any more, which causes HAVE_ARM_SCU to not be selected any more, too,
when compiling only for OMAP5. IMHO this only reveals a deeper issue.
Probably the ideal fix would be to remove all references to the scu_
functions for OMAP5, but those seem to exist in files and functions,
common to OMAP4 and 5 (sleep44xx.S, omap-smp.c).
How would you deal with that, please?
Best regards,
V.
From: Vincent Stehlé <[email protected]>
This fixes the following link error when compiling only for OMAP5:
arch/arm/mach-omap2/built-in.o: In function `scu_gp_set':
arch/arm/mach-omap2/sleep44xx.S:132: undefined reference to `scu_power_mode'
arch/arm/mach-omap2/built-in.o: In function `scu_gp_clear':
arch/arm/mach-omap2/sleep44xx.S:229: undefined reference to `scu_power_mode'
arch/arm/mach-omap2/built-in.o: In function `omap4_smp_prepare_cpus':
arch/arm/mach-omap2/omap-smp.c:211: undefined reference to `scu_enable'
arch/arm/mach-omap2/built-in.o: In function `omap4_smp_init_cpus':
arch/arm/mach-omap2/omap-smp.c:185: undefined reference to `scu_get_core_count'
Signed-off-by: Vincent Stehlé <[email protected]>
---
Hi Santosh,
Here is a try at "gating" all SCU references from OMAP4/5 common code. That
does build and run for me on OMAP4 and 5. On OMAP4, System.map files are even
identical with and without the patch.
How would you like this, please?
Best regards,
V.
arch/arm/mach-omap2/omap-smp.c | 10 ++++++++++
arch/arm/mach-omap2/sleep44xx.S | 10 ++++++++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 2a551f9..45c8b5d 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -21,7 +21,9 @@
#include <linux/io.h>
#include <linux/irqchip/arm-gic.h>
+#ifdef CONFIG_HAVE_ARM_SCU
#include <asm/smp_scu.h>
+#endif
#include "omap-secure.h"
#include "omap-wakeupgen.h"
@@ -41,15 +43,19 @@
u16 pm44xx_errata;
+#ifdef CONFIG_HAVE_ARM_SCU
/* SCU base address */
static void __iomem *scu_base;
+#endif
static DEFINE_SPINLOCK(boot_lock);
+#ifdef CONFIG_HAVE_ARM_SCU
void __iomem *omap4_get_scu_base(void)
{
return scu_base;
}
+#endif
static void __cpuinit omap4_secondary_init(unsigned int cpu)
{
@@ -176,6 +182,7 @@ static void __init omap4_smp_init_cpus(void)
/* Use ARM cpuid check here, as SoC detection will not work so early */
cpu_id = read_cpuid_id() & CPU_MASK;
if (cpu_id == CPU_CORTEX_A9) {
+#ifdef CONFIG_HAVE_ARM_SCU
/*
* Currently we can't call ioremap here because
* SoC detection won't work until after init_early.
@@ -183,6 +190,7 @@ static void __init omap4_smp_init_cpus(void)
scu_base = OMAP2_L4_IO_ADDRESS(scu_a9_get_base());
BUG_ON(!scu_base);
ncores = scu_get_core_count(scu_base);
+#endif
} else if (cpu_id == CPU_CORTEX_A15) {
ncores = OMAP5_CORE_COUNT;
}
@@ -203,12 +211,14 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
void *startup_addr = omap_secondary_startup;
void __iomem *base = omap_get_wakeupgen_base();
+#ifdef CONFIG_HAVE_ARM_SCU
/*
* Initialise the SCU and wake up the secondary core using
* wakeup_secondary().
*/
if (scu_base)
scu_enable(scu_base);
+#endif
if (cpu_is_omap446x()) {
startup_addr = omap_secondary_startup_4460;
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 88ff83a..3e73a32 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -10,7 +10,11 @@
*/
#include <linux/linkage.h>
+
+#ifdef CONFIG_HAVE_ARM_SCU
#include <asm/smp_scu.h>
+#endif
+
#include <asm/memory.h>
#include <asm/hardware/cache-l2x0.h>
@@ -70,6 +74,7 @@ ENTRY(omap4_finish_suspend)
* Flush all data from the L1 data cache before disabling
* SCTLR.C bit.
*/
+#ifdef CONFIG_HAVE_ARM_SCU
bl omap4_get_sar_ram_base
ldr r9, [r0, #OMAP_TYPE_OFFSET]
cmp r9, #0x1 @ Check for HS device
@@ -81,6 +86,7 @@ ENTRY(omap4_finish_suspend)
DO_SMC
ldmfd r13!, {r4-r12, r14}
skip_secure_l1_clean:
+#endif
bl v7_flush_dcache_all
/*
@@ -108,6 +114,7 @@ skip_secure_l1_clean:
* preventing the CPU from receiving cache, TLB, or BTB
* maintenance operations broadcast by other CPUs in the cluster.
*/
+#ifdef CONFIG_HAVE_ARM_SCU
bl omap4_get_sar_ram_base
mov r8, r0
ldr r9, [r8, #OMAP_TYPE_OFFSET]
@@ -131,6 +138,7 @@ scu_gp_set:
bl omap4_get_scu_base
bl scu_power_mode
skip_scu_gp_set:
+#endif
mrc p15, 0, r0, c1, c1, 2 @ Read NSACR data
tst r0, #(1 << 18)
mrcne p15, 0, r0, c1, c0, 1
@@ -211,6 +219,7 @@ do_WFI:
orreq r0, r0, #(1 << 6)
mcreq p15, 0, r0, c1, c0, 1
isb
+#ifdef CONFIG_HAVE_ARM_SCU
bl omap4_get_sar_ram_base
mov r8, r0
ldr r9, [r8, #OMAP_TYPE_OFFSET]
@@ -228,6 +237,7 @@ scu_gp_clear:
mov r1, #SCU_PM_NORMAL
bl scu_power_mode
skip_scu_gp_clear:
+#endif
isb
dsb
ldmfd sp!, {r4-r12, pc}
--
1.7.10.4
Sorry for top posting. Can you just add static inlines functions in header file and #ifdef it for OMAP5.
Regards,
Santosh
________________________________________
From: Stehle, Vincent
Sent: Thursday, May 16, 2013 7:59 PM
To: Shilimkar, Santosh
Cc: Vincent Stehl?; Tony Lindgren; [email protected]; [email protected]
Subject: Re: [PATCH] ARM: OMAP5: select SCU
So the exact commit breaking OMAP5 link for me is:
883a106 ARM: default machine descriptor for multiplatform
The breakage seems to be a side effect of not selecting ARCH_VEXPRESS
any more, which causes HAVE_ARM_SCU to not be selected any more, too,
when compiling only for OMAP5. IMHO this only reveals a deeper issue.
Probably the ideal fix would be to remove all references to the scu_
functions for OMAP5, but those seem to exist in files and functions,
common to OMAP4 and 5 (sleep44xx.S, omap-smp.c).
How would you deal with that, please?
Best regards,
V.