Recently we added an early quirk to detect 5500/5520 chipsets with early
revisions that had problems with irq draining with interrupt remapping enabled:
commit 03bbcb2e7e292838bb0244f5a7816d194c911d62
Author: Neil Horman <[email protected]>
Date: Tue Apr 16 16:38:32 2013 -0400
iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets
It turns out this same problem is present in the intel X58 chipset as well. See
errata 69 here:
http://www.intel.com/content/www/us/en/chipsets/x58-express-specification-update.html
This patch extends the pci early quirk so that the chip devices/revisions
specified in the above update are also covered in the same way:
Signed-off-by: Neil Horman <[email protected]>
Reviewed-by: Jan Beulich <[email protected]>
CC: Jan Beulich <[email protected]>
CC: Joerg Roedel <[email protected]>
CC: Andrew Cooper <[email protected]>
CC: Malcolm Crossley <[email protected]>
CC: Prarit Bhargava <[email protected]>
CC: Don Zickus <[email protected]>
CC: Don Dutile <[email protected]>
CC: Thomas Gleixner <[email protected]>
CC: Ingo Molnar <[email protected]>
CC: "H. Peter Anvin" <[email protected]>
CC: [email protected] (maintainer:X86 ARCHITECTURE...)
CC: [email protected]
---
arch/x86/kernel/early-quirks.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 94ab6b9..743d583 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -196,15 +196,23 @@ static void __init ati_bugs_contd(int num, int slot, int func)
static void __init intel_remapping_check(int num, int slot, int func)
{
u8 revision;
+ u16 device;
+ device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
/*
- * Revision 0x13 of this chipset supports irq remapping
- * but has an erratum that breaks its behavior, flag it as such
+ * Revision 13 of all triggering devices id in this quirk have
+ * a problem draining interrupts when irq remapping is enabled,
+ * and should be flagged as broken. Additionally revisions 0x12
+ * and 0x22 of device id 0x3405 has this problem.
*/
if (revision == 0x13)
set_irq_remapping_broken();
+ else if ((device == 0x3405) &&
+ ((revision == 0x12) ||
+ (revision == 0x22)))
+ set_irq_remapping_broken();
}
@@ -239,8 +247,11 @@ static struct chipset early_qrk[] __initdata = {
PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
{ PCI_VENDOR_ID_INTEL, 0x3403, PCI_CLASS_BRIDGE_HOST,
PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
+ { PCI_VENDOR_ID_INTEL, 0x3405, PCI_CLASS_BRIDGE_HOST,
+ PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
{ PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST,
PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
+
{}
};
--
1.8.1.4
On 07/09/2013 03:11 PM, Neil Horman wrote:
> Recently we added an early quirk to detect 5500/5520 chipsets with early
> revisions that had problems with irq draining with interrupt remapping enabled:
>
> commit 03bbcb2e7e292838bb0244f5a7816d194c911d62
> Author: Neil Horman<[email protected]>
> Date: Tue Apr 16 16:38:32 2013 -0400
>
> iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets
>
> It turns out this same problem is present in the intel X58 chipset as well. See
> errata 69 here:
> http://www.intel.com/content/www/us/en/chipsets/x58-express-specification-update.html
>
> This patch extends the pci early quirk so that the chip devices/revisions
> specified in the above update are also covered in the same way:
>
> Signed-off-by: Neil Horman<[email protected]>
> Reviewed-by: Jan Beulich<[email protected]>
> CC: Jan Beulich<[email protected]>
> CC: Joerg Roedel<[email protected]>
> CC: Andrew Cooper<[email protected]>
> CC: Malcolm Crossley<[email protected]>
> CC: Prarit Bhargava<[email protected]>
> CC: Don Zickus<[email protected]>
> CC: Don Dutile<[email protected]>
> CC: Thomas Gleixner<[email protected]>
> CC: Ingo Molnar<[email protected]>
> CC: "H. Peter Anvin"<[email protected]>
> CC: [email protected] (maintainer:X86 ARCHITECTURE...)
> CC: [email protected]
> ---
> arch/x86/kernel/early-quirks.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> index 94ab6b9..743d583 100644
> --- a/arch/x86/kernel/early-quirks.c
> +++ b/arch/x86/kernel/early-quirks.c
> @@ -196,15 +196,23 @@ static void __init ati_bugs_contd(int num, int slot, int func)
> static void __init intel_remapping_check(int num, int slot, int func)
> {
> u8 revision;
> + u16 device;
>
> + device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
> revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
>
> /*
> - * Revision 0x13 of this chipset supports irq remapping
> - * but has an erratum that breaks its behavior, flag it as such
> + * Revision 13 of all triggering devices id in this quirk have
> + * a problem draining interrupts when irq remapping is enabled,
> + * and should be flagged as broken. Additionally revisions 0x12
> + * and 0x22 of device id 0x3405 has this problem.
> */
> if (revision == 0x13)
> set_irq_remapping_broken();
> + else if ((device == 0x3405)&&
> + ((revision == 0x12) ||
> + (revision == 0x22)))
> + set_irq_remapping_broken();
>
> }
>
When discussing the original-seen errata w/Intel on 55xx chips, the
statements made were any chip with rev C1(revision = 0x21) or greater had the
correct
hw implementation for the intr-pending flush.
We knew the bug existed in the A3 (rev=0x13) rev of the chip, but the
true check should be:
revision < 0x21
I suspect there were multiple revs of the x58, of which B2(0x12) & C2(0x22)
were shipped to oem's, system vendors, etc.
But, in case there were any chip revisions in between these well-known values
out there, I suggest the 0x3405 check be changed to:
revision < 0x22
Since it's unlikely that hw degressed in design over revisions, it seems
more correct to check for revs less than a rev-value having an errata,
or conversely, a chip value >= rev-value do not have the errata.
IOW, an equal check may not provide sufficient.
- Don
> @@ -239,8 +247,11 @@ static struct chipset early_qrk[] __initdata = {
> PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
> { PCI_VENDOR_ID_INTEL, 0x3403, PCI_CLASS_BRIDGE_HOST,
> PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
> + { PCI_VENDOR_ID_INTEL, 0x3405, PCI_CLASS_BRIDGE_HOST,
> + PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
> { PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST,
> PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
> +
> {}
> };
>
On Wed, Jul 10, 2013 at 01:31:36PM -0400, Don Dutile wrote:
> On 07/09/2013 03:11 PM, Neil Horman wrote:
> >Recently we added an early quirk to detect 5500/5520 chipsets with early
> >revisions that had problems with irq draining with interrupt remapping enabled:
> >
> >commit 03bbcb2e7e292838bb0244f5a7816d194c911d62
> >Author: Neil Horman<[email protected]>
> >Date: Tue Apr 16 16:38:32 2013 -0400
> >
> > iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets
> >
> >It turns out this same problem is present in the intel X58 chipset as well. See
> >errata 69 here:
> >http://www.intel.com/content/www/us/en/chipsets/x58-express-specification-update.html
> >
> >This patch extends the pci early quirk so that the chip devices/revisions
> >specified in the above update are also covered in the same way:
> >
> >Signed-off-by: Neil Horman<[email protected]>
> >Reviewed-by: Jan Beulich<[email protected]>
> >CC: Jan Beulich<[email protected]>
> >CC: Joerg Roedel<[email protected]>
> >CC: Andrew Cooper<[email protected]>
> >CC: Malcolm Crossley<[email protected]>
> >CC: Prarit Bhargava<[email protected]>
> >CC: Don Zickus<[email protected]>
> >CC: Don Dutile<[email protected]>
> >CC: Thomas Gleixner<[email protected]>
> >CC: Ingo Molnar<[email protected]>
> >CC: "H. Peter Anvin"<[email protected]>
> >CC: [email protected] (maintainer:X86 ARCHITECTURE...)
> >CC: [email protected]
> >---
> > arch/x86/kernel/early-quirks.c | 15 +++++++++++++--
> > 1 file changed, 13 insertions(+), 2 deletions(-)
> >
> >diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> >index 94ab6b9..743d583 100644
> >--- a/arch/x86/kernel/early-quirks.c
> >+++ b/arch/x86/kernel/early-quirks.c
> >@@ -196,15 +196,23 @@ static void __init ati_bugs_contd(int num, int slot, int func)
> > static void __init intel_remapping_check(int num, int slot, int func)
> > {
> > u8 revision;
> >+ u16 device;
> >
> >+ device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
> > revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
> >
> > /*
> >- * Revision 0x13 of this chipset supports irq remapping
> >- * but has an erratum that breaks its behavior, flag it as such
> >+ * Revision 13 of all triggering devices id in this quirk have
> >+ * a problem draining interrupts when irq remapping is enabled,
> >+ * and should be flagged as broken. Additionally revisions 0x12
> >+ * and 0x22 of device id 0x3405 has this problem.
> > */
> > if (revision == 0x13)
> > set_irq_remapping_broken();
> >+ else if ((device == 0x3405)&&
> >+ ((revision == 0x12) ||
> >+ (revision == 0x22)))
> >+ set_irq_remapping_broken();
> >
> > }
> >
> When discussing the original-seen errata w/Intel on 55xx chips, the
> statements made were any chip with rev C1(revision = 0x21) or
> greater had the correct
> hw implementation for the intr-pending flush.
> We knew the bug existed in the A3 (rev=0x13) rev of the chip, but the
> true check should be:
> revision < 0x21
>
> I suspect there were multiple revs of the x58, of which B2(0x12) & C2(0x22)
> were shipped to oem's, system vendors, etc.
> But, in case there were any chip revisions in between these well-known values
> out there, I suggest the 0x3405 check be changed to:
> revision < 0x22
>
> Since it's unlikely that hw degressed in design over revisions, it seems
> more correct to check for revs less than a rev-value having an errata,
> or conversely, a chip value >= rev-value do not have the errata.
> IOW, an equal check may not provide sufficient.
>
Don and I discussed this offline. Given that his comments make good sense
to me, I'm hesitant to apply the quirk to anything other than what the spec
update says, given that its clear. Don is attempting to contact people at Intel
who will be able (we hope) to give us a definitive answer on this, please hold
on this patch until we have resolution on the issue.
Neil
On Thu, Jul 11, 2013 at 06:59:52AM -0400, Neil Horman wrote:
> On Wed, Jul 10, 2013 at 01:31:36PM -0400, Don Dutile wrote:
> > On 07/09/2013 03:11 PM, Neil Horman wrote:
> > >Recently we added an early quirk to detect 5500/5520 chipsets with early
> > >revisions that had problems with irq draining with interrupt remapping enabled:
> > >
> > >commit 03bbcb2e7e292838bb0244f5a7816d194c911d62
> > >Author: Neil Horman<[email protected]>
> > >Date: Tue Apr 16 16:38:32 2013 -0400
> > >
> > > iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets
> > >
> > >It turns out this same problem is present in the intel X58 chipset as well. See
> > >errata 69 here:
> > >http://www.intel.com/content/www/us/en/chipsets/x58-express-specification-update.html
> > >
> > >This patch extends the pci early quirk so that the chip devices/revisions
> > >specified in the above update are also covered in the same way:
> > >
> > >Signed-off-by: Neil Horman<[email protected]>
> > >Reviewed-by: Jan Beulich<[email protected]>
> > >CC: Jan Beulich<[email protected]>
> > >CC: Joerg Roedel<[email protected]>
> > >CC: Andrew Cooper<[email protected]>
> > >CC: Malcolm Crossley<[email protected]>
> > >CC: Prarit Bhargava<[email protected]>
> > >CC: Don Zickus<[email protected]>
> > >CC: Don Dutile<[email protected]>
> > >CC: Thomas Gleixner<[email protected]>
> > >CC: Ingo Molnar<[email protected]>
> > >CC: "H. Peter Anvin"<[email protected]>
> > >CC: [email protected] (maintainer:X86 ARCHITECTURE...)
> > >CC: [email protected]
> > >---
> > > arch/x86/kernel/early-quirks.c | 15 +++++++++++++--
> > > 1 file changed, 13 insertions(+), 2 deletions(-)
> > >
> > >diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> > >index 94ab6b9..743d583 100644
> > >--- a/arch/x86/kernel/early-quirks.c
> > >+++ b/arch/x86/kernel/early-quirks.c
> > >@@ -196,15 +196,23 @@ static void __init ati_bugs_contd(int num, int slot, int func)
> > > static void __init intel_remapping_check(int num, int slot, int func)
> > > {
> > > u8 revision;
> > >+ u16 device;
> > >
> > >+ device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
> > > revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
> > >
> > > /*
> > >- * Revision 0x13 of this chipset supports irq remapping
> > >- * but has an erratum that breaks its behavior, flag it as such
> > >+ * Revision 13 of all triggering devices id in this quirk have
> > >+ * a problem draining interrupts when irq remapping is enabled,
> > >+ * and should be flagged as broken. Additionally revisions 0x12
> > >+ * and 0x22 of device id 0x3405 has this problem.
> > > */
> > > if (revision == 0x13)
> > > set_irq_remapping_broken();
> > >+ else if ((device == 0x3405)&&
> > >+ ((revision == 0x12) ||
> > >+ (revision == 0x22)))
> > >+ set_irq_remapping_broken();
> > >
> > > }
> > >
> > When discussing the original-seen errata w/Intel on 55xx chips, the
> > statements made were any chip with rev C1(revision = 0x21) or
> > greater had the correct
> > hw implementation for the intr-pending flush.
> > We knew the bug existed in the A3 (rev=0x13) rev of the chip, but the
> > true check should be:
> > revision < 0x21
> >
> > I suspect there were multiple revs of the x58, of which B2(0x12) & C2(0x22)
> > were shipped to oem's, system vendors, etc.
> > But, in case there were any chip revisions in between these well-known values
> > out there, I suggest the 0x3405 check be changed to:
> > revision < 0x22
> >
> > Since it's unlikely that hw degressed in design over revisions, it seems
> > more correct to check for revs less than a rev-value having an errata,
> > or conversely, a chip value >= rev-value do not have the errata.
> > IOW, an equal check may not provide sufficient.
> >
> Don and I discussed this offline. Given that his comments make good sense
> to me, I'm hesitant to apply the quirk to anything other than what the spec
> update says, given that its clear. Don is attempting to contact people at Intel
> who will be able (we hope) to give us a definitive answer on this, please hold
> on this patch until we have resolution on the issue.
> Neil
>
Don, do you have any updates here from Intel? I'd like to get this put to bed.
Neil
Recently we added an early quirk to detect 5500/5520 chipsets with early
revisions that had problems with irq draining with interrupt remapping enabled:
commit 03bbcb2e7e292838bb0244f5a7816d194c911d62
Author: Neil Horman <[email protected]>
Date: Tue Apr 16 16:38:32 2013 -0400
iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets
It turns out this same problem is present in the intel X58 chipset as well. See
errata 69 here:
http://www.intel.com/content/www/us/en/chipsets/x58-express-specification-update.html
This patch extends the pci early quirk so that the chip devices/revisions
specified in the above update are also covered in the same way:
Signed-off-by: Neil Horman <[email protected]>
Reviewed-by: Jan Beulich <[email protected]>
CC: Jan Beulich <[email protected]>
CC: Joerg Roedel <[email protected]>
CC: Andrew Cooper <[email protected]>
CC: Malcolm Crossley <[email protected]>
CC: Prarit Bhargava <[email protected]>
CC: Don Zickus <[email protected]>
CC: Don Dutile <[email protected]>
CC: Thomas Gleixner <[email protected]>
CC: Ingo Molnar <[email protected]>
CC: "H. Peter Anvin" <[email protected]>
CC: [email protected]
CC: [email protected]
---
Note, this a repost of this patch. Don and I talked about this offline again,
and neither of us have been able to gather any information from intel on the
subject. While I understand his point that we should try to get confirmation
about inclusive steppings that are affected by this errata, I feel like we
should commit this patch based on the documentation we do have, and we can
always ammend it later if Intel indicates other chips are affected.
---
arch/x86/kernel/early-quirks.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 94ab6b9..743d583 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -196,15 +196,23 @@ static void __init ati_bugs_contd(int num, int slot, int func)
static void __init intel_remapping_check(int num, int slot, int func)
{
u8 revision;
+ u16 device;
+ device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
/*
- * Revision 0x13 of this chipset supports irq remapping
- * but has an erratum that breaks its behavior, flag it as such
+ * Revision 13 of all triggering devices id in this quirk have
+ * a problem draining interrupts when irq remapping is enabled,
+ * and should be flagged as broken. Additionally revisions 0x12
+ * and 0x22 of device id 0x3405 has this problem.
*/
if (revision == 0x13)
set_irq_remapping_broken();
+ else if ((device == 0x3405) &&
+ ((revision == 0x12) ||
+ (revision == 0x22)))
+ set_irq_remapping_broken();
}
@@ -239,8 +247,11 @@ static struct chipset early_qrk[] __initdata = {
PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
{ PCI_VENDOR_ID_INTEL, 0x3403, PCI_CLASS_BRIDGE_HOST,
PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
+ { PCI_VENDOR_ID_INTEL, 0x3405, PCI_CLASS_BRIDGE_HOST,
+ PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
{ PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST,
PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
+
{}
};
--
1.8.1.4
On 07/17/2013 07:13 AM, Neil Horman wrote:
> Recently we added an early quirk to detect 5500/5520 chipsets with early
> revisions that had problems with irq draining with interrupt remapping enabled:
>
> commit 03bbcb2e7e292838bb0244f5a7816d194c911d62
> Author: Neil Horman<[email protected]>
> Date: Tue Apr 16 16:38:32 2013 -0400
>
> iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets
>
> It turns out this same problem is present in the intel X58 chipset as well. See
> errata 69 here:
> http://www.intel.com/content/www/us/en/chipsets/x58-express-specification-update.html
>
> This patch extends the pci early quirk so that the chip devices/revisions
> specified in the above update are also covered in the same way:
>
> Signed-off-by: Neil Horman<[email protected]>
> Reviewed-by: Jan Beulich<[email protected]>
> CC: Jan Beulich<[email protected]>
> CC: Joerg Roedel<[email protected]>
> CC: Andrew Cooper<[email protected]>
> CC: Malcolm Crossley<[email protected]>
> CC: Prarit Bhargava<[email protected]>
> CC: Don Zickus<[email protected]>
> CC: Don Dutile<[email protected]>
> CC: Thomas Gleixner<[email protected]>
> CC: Ingo Molnar<[email protected]>
> CC: "H. Peter Anvin"<[email protected]>
> CC: [email protected]
> CC: [email protected]
>
> ---
> Note, this a repost of this patch. Don and I talked about this offline again,
> and neither of us have been able to gather any information from intel on the
> subject. While I understand his point that we should try to get confirmation
> about inclusive steppings that are affected by this errata, I feel like we
> should commit this patch based on the documentation we do have, and we can
> always ammend it later if Intel indicates other chips are affected.
and to back-up what Neil says...
Acked-by: Donald Dutile <[email protected]>
> ---
> arch/x86/kernel/early-quirks.c | 15 +++++++++++++--
> 1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> index 94ab6b9..743d583 100644
> --- a/arch/x86/kernel/early-quirks.c
> +++ b/arch/x86/kernel/early-quirks.c
> @@ -196,15 +196,23 @@ static void __init ati_bugs_contd(int num, int slot, int func)
> static void __init intel_remapping_check(int num, int slot, int func)
> {
> u8 revision;
> + u16 device;
>
> + device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
> revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
>
> /*
> - * Revision 0x13 of this chipset supports irq remapping
> - * but has an erratum that breaks its behavior, flag it as such
> + * Revision 13 of all triggering devices id in this quirk have
> + * a problem draining interrupts when irq remapping is enabled,
> + * and should be flagged as broken. Additionally revisions 0x12
> + * and 0x22 of device id 0x3405 has this problem.
> */
> if (revision == 0x13)
> set_irq_remapping_broken();
> + else if ((device == 0x3405)&&
> + ((revision == 0x12) ||
> + (revision == 0x22)))
> + set_irq_remapping_broken();
>
> }
>
> @@ -239,8 +247,11 @@ static struct chipset early_qrk[] __initdata = {
> PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
> { PCI_VENDOR_ID_INTEL, 0x3403, PCI_CLASS_BRIDGE_HOST,
> PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
> + { PCI_VENDOR_ID_INTEL, 0x3405, PCI_CLASS_BRIDGE_HOST,
> + PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
> { PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST,
> PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
> +
> {}
> };
>
Commit-ID: 803075dba31c17af110e1d9a915fe7262165b213
Gitweb: http://git.kernel.org/tip/803075dba31c17af110e1d9a915fe7262165b213
Author: Neil Horman <[email protected]>
AuthorDate: Wed, 17 Jul 2013 07:13:59 -0400
Committer: Ingo Molnar <[email protected]>
CommitDate: Tue, 23 Jul 2013 11:29:30 +0200
x86/iommu/vt-d: Expand interrupt remapping quirk to cover x58 chipset
Recently we added an early quirk to detect 5500/5520 chipsets
with early revisions that had problems with irq draining with
interrupt remapping enabled:
commit 03bbcb2e7e292838bb0244f5a7816d194c911d62
Author: Neil Horman <[email protected]>
Date: Tue Apr 16 16:38:32 2013 -0400
iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets
It turns out this same problem is present in the intel X58
chipset as well. See errata 69 here:
http://www.intel.com/content/www/us/en/chipsets/x58-express-specification-update.html
This patch extends the pci early quirk so that the chip
devices/revisions specified in the above update are also covered
in the same way:
Signed-off-by: Neil Horman <[email protected]>
Reviewed-by: Jan Beulich <[email protected]>
Acked-by: Donald Dutile <[email protected]>
Cc: Joerg Roedel <[email protected]>
Cc: Andrew Cooper <[email protected]>
Cc: Malcolm Crossley <[email protected]>
Cc: Prarit Bhargava <[email protected]>
Cc: Don Zickus <[email protected]>
Cc: [email protected]
Link: http://lkml.kernel.org/r/[email protected]
[ Small edits. ]
Signed-off-by: Ingo Molnar <[email protected]>
---
arch/x86/kernel/early-quirks.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 94ab6b9..63bdb29 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -196,15 +196,23 @@ static void __init ati_bugs_contd(int num, int slot, int func)
static void __init intel_remapping_check(int num, int slot, int func)
{
u8 revision;
+ u16 device;
+ device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
revision = read_pci_config_byte(num, slot, func, PCI_REVISION_ID);
/*
- * Revision 0x13 of this chipset supports irq remapping
- * but has an erratum that breaks its behavior, flag it as such
+ * Revision 13 of all triggering devices id in this quirk have
+ * a problem draining interrupts when irq remapping is enabled,
+ * and should be flagged as broken. Additionally revisions 0x12
+ * and 0x22 of device id 0x3405 has this problem.
*/
if (revision == 0x13)
set_irq_remapping_broken();
+ else if ((device == 0x3405) &&
+ ((revision == 0x12) ||
+ (revision == 0x22)))
+ set_irq_remapping_broken();
}
@@ -239,6 +247,8 @@ static struct chipset early_qrk[] __initdata = {
PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
{ PCI_VENDOR_ID_INTEL, 0x3403, PCI_CLASS_BRIDGE_HOST,
PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
+ { PCI_VENDOR_ID_INTEL, 0x3405, PCI_CLASS_BRIDGE_HOST,
+ PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
{ PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST,
PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
{}