Zpos property is immutable for all hardware versions except the last
version (0x40100) which support the blending order feature
(dynamic z-order).
Signed-off-by: Yannick Fertre <[email protected]>
---
drivers/gpu/drm/stm/drv.c | 1 +
drivers/gpu/drm/stm/ltdc.c | 23 ++++++++++++++++++++---
drivers/gpu/drm/stm/ltdc.h | 1 +
3 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm/drv.c
index 0da7cce2a1a2..c63945dc2260 100644
--- a/drivers/gpu/drm/stm/drv.c
+++ b/drivers/gpu/drm/stm/drv.c
@@ -95,6 +95,7 @@ static int drv_load(struct drm_device *ddev)
ddev->mode_config.max_width = STM_MAX_FB_WIDTH;
ddev->mode_config.max_height = STM_MAX_FB_HEIGHT;
ddev->mode_config.funcs = &drv_mode_config_funcs;
+ ddev->mode_config.normalize_zpos = true;
ret = ltdc_load(ddev);
if (ret)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 6a9f613839b5..00a6bc1b1d7c 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -194,6 +194,7 @@
#define LXBFCR_BF2 GENMASK(2, 0) /* Blending Factor 2 */
#define LXBFCR_BF1 GENMASK(10, 8) /* Blending Factor 1 */
+#define LXBFCR_BOR GENMASK(18, 16) /* Blending ORder */
#define LXCFBLR_CFBLL GENMASK(12, 0) /* Color Frame Buffer Line Length */
#define LXCFBLR_CFBP GENMASK(28, 16) /* Color Frame Buffer Pitch in bytes */
@@ -1309,7 +1310,14 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
plane->type != DRM_PLANE_TYPE_PRIMARY)
val = BF1_PAXCA | BF2_1PAXCA;
- regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs, LXBFCR_BF2 | LXBFCR_BF1, val);
+ if (ldev->caps.dynamic_zorder) {
+ val |= (newstate->normalized_zpos << 16);
+ regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs,
+ LXBFCR_BF2 | LXBFCR_BF1 | LXBFCR_BOR, val);
+ } else {
+ regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs,
+ LXBFCR_BF2 | LXBFCR_BF1, val);
+ }
/* Configures the frame buffer line number */
line_number = y1 - y0 + 1;
@@ -1578,7 +1586,10 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
return -EINVAL;
}
- drm_plane_create_zpos_immutable_property(primary, 0);
+ if (ldev->caps.dynamic_zorder)
+ drm_plane_create_zpos_property(primary, 0, 0, ldev->caps.nb_layers - 1);
+ else
+ drm_plane_create_zpos_immutable_property(primary, 0);
/* Init CRTC according to its hardware features */
if (ldev->caps.crc)
@@ -1607,7 +1618,10 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
DRM_ERROR("Can not create overlay plane %d\n", i);
goto cleanup;
}
- drm_plane_create_zpos_immutable_property(overlay, i);
+ if (ldev->caps.dynamic_zorder)
+ drm_plane_create_zpos_property(overlay, i, 0, ldev->caps.nb_layers - 1);
+ else
+ drm_plane_create_zpos_immutable_property(overlay, i);
}
return 0;
@@ -1737,6 +1751,7 @@ static int ltdc_get_caps(struct drm_device *ddev)
ldev->caps.ycbcr_output = false;
ldev->caps.plane_reg_shadow = false;
ldev->caps.crc = false;
+ ldev->caps.dynamic_zorder = false;
break;
case HWVER_20101:
ldev->caps.layer_ofs = LAY_OFS_0;
@@ -1752,6 +1767,7 @@ static int ltdc_get_caps(struct drm_device *ddev)
ldev->caps.ycbcr_output = false;
ldev->caps.plane_reg_shadow = false;
ldev->caps.crc = false;
+ ldev->caps.dynamic_zorder = false;
break;
case HWVER_40100:
ldev->caps.layer_ofs = LAY_OFS_1;
@@ -1767,6 +1783,7 @@ static int ltdc_get_caps(struct drm_device *ddev)
ldev->caps.ycbcr_output = true;
ldev->caps.plane_reg_shadow = true;
ldev->caps.crc = true;
+ ldev->caps.dynamic_zorder = true;
break;
default:
return -ENODEV;
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
index 59fc5d1bbbab..4855898bd4c0 100644
--- a/drivers/gpu/drm/stm/ltdc.h
+++ b/drivers/gpu/drm/stm/ltdc.h
@@ -28,6 +28,7 @@ struct ltdc_caps {
bool ycbcr_output; /* ycbcr output converter supported */
bool plane_reg_shadow; /* plane shadow registers ability */
bool crc; /* cyclic redundancy check supported */
+ bool dynamic_zorder; /* dynamic z-order */
};
#define LTDC_MAX_LAYER 4
--
2.25.1
On 6/3/22 15:44, Yannick Fertre wrote:
> Zpos property is immutable for all hardware versions except the last
> version (0x40100) which support the blending order feature
> (dynamic z-order).
>
> Signed-off-by: Yannick Fertre <[email protected]>
> ---
> drivers/gpu/drm/stm/drv.c | 1 +
> drivers/gpu/drm/stm/ltdc.c | 23 ++++++++++++++++++++---
> drivers/gpu/drm/stm/ltdc.h | 1 +
> 3 files changed, 22 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/stm/drv.c b/drivers/gpu/drm/stm/drv.c
> index 0da7cce2a1a2..c63945dc2260 100644
> --- a/drivers/gpu/drm/stm/drv.c
> +++ b/drivers/gpu/drm/stm/drv.c
> @@ -95,6 +95,7 @@ static int drv_load(struct drm_device *ddev)
> ddev->mode_config.max_width = STM_MAX_FB_WIDTH;
> ddev->mode_config.max_height = STM_MAX_FB_HEIGHT;
> ddev->mode_config.funcs = &drv_mode_config_funcs;
> + ddev->mode_config.normalize_zpos = true;
>
> ret = ltdc_load(ddev);
> if (ret)
> diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
> index 6a9f613839b5..00a6bc1b1d7c 100644
> --- a/drivers/gpu/drm/stm/ltdc.c
> +++ b/drivers/gpu/drm/stm/ltdc.c
> @@ -194,6 +194,7 @@
>
> #define LXBFCR_BF2 GENMASK(2, 0) /* Blending Factor 2 */
> #define LXBFCR_BF1 GENMASK(10, 8) /* Blending Factor 1 */
> +#define LXBFCR_BOR GENMASK(18, 16) /* Blending ORder */
>
> #define LXCFBLR_CFBLL GENMASK(12, 0) /* Color Frame Buffer Line Length */
> #define LXCFBLR_CFBP GENMASK(28, 16) /* Color Frame Buffer Pitch in bytes */
> @@ -1309,7 +1310,14 @@ static void ltdc_plane_atomic_update(struct drm_plane *plane,
> plane->type != DRM_PLANE_TYPE_PRIMARY)
> val = BF1_PAXCA | BF2_1PAXCA;
>
> - regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs, LXBFCR_BF2 | LXBFCR_BF1, val);
> + if (ldev->caps.dynamic_zorder) {
> + val |= (newstate->normalized_zpos << 16);
> + regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs,
> + LXBFCR_BF2 | LXBFCR_BF1 | LXBFCR_BOR, val);
> + } else {
> + regmap_write_bits(ldev->regmap, LTDC_L1BFCR + lofs,
> + LXBFCR_BF2 | LXBFCR_BF1, val);
> + }
>
> /* Configures the frame buffer line number */
> line_number = y1 - y0 + 1;
> @@ -1578,7 +1586,10 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
> return -EINVAL;
> }
>
> - drm_plane_create_zpos_immutable_property(primary, 0);
> + if (ldev->caps.dynamic_zorder)
> + drm_plane_create_zpos_property(primary, 0, 0, ldev->caps.nb_layers - 1);
> + else
> + drm_plane_create_zpos_immutable_property(primary, 0);
>
> /* Init CRTC according to its hardware features */
> if (ldev->caps.crc)
> @@ -1607,7 +1618,10 @@ static int ltdc_crtc_init(struct drm_device *ddev, struct drm_crtc *crtc)
> DRM_ERROR("Can not create overlay plane %d\n", i);
> goto cleanup;
> }
> - drm_plane_create_zpos_immutable_property(overlay, i);
> + if (ldev->caps.dynamic_zorder)
> + drm_plane_create_zpos_property(overlay, i, 0, ldev->caps.nb_layers - 1);
> + else
> + drm_plane_create_zpos_immutable_property(overlay, i);
> }
>
> return 0;
> @@ -1737,6 +1751,7 @@ static int ltdc_get_caps(struct drm_device *ddev)
> ldev->caps.ycbcr_output = false;
> ldev->caps.plane_reg_shadow = false;
> ldev->caps.crc = false;
> + ldev->caps.dynamic_zorder = false;
> break;
> case HWVER_20101:
> ldev->caps.layer_ofs = LAY_OFS_0;
> @@ -1752,6 +1767,7 @@ static int ltdc_get_caps(struct drm_device *ddev)
> ldev->caps.ycbcr_output = false;
> ldev->caps.plane_reg_shadow = false;
> ldev->caps.crc = false;
> + ldev->caps.dynamic_zorder = false;
> break;
> case HWVER_40100:
> ldev->caps.layer_ofs = LAY_OFS_1;
> @@ -1767,6 +1783,7 @@ static int ltdc_get_caps(struct drm_device *ddev)
> ldev->caps.ycbcr_output = true;
> ldev->caps.plane_reg_shadow = true;
> ldev->caps.crc = true;
> + ldev->caps.dynamic_zorder = true;
> break;
> default:
> return -ENODEV;
> diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
> index 59fc5d1bbbab..4855898bd4c0 100644
> --- a/drivers/gpu/drm/stm/ltdc.h
> +++ b/drivers/gpu/drm/stm/ltdc.h
> @@ -28,6 +28,7 @@ struct ltdc_caps {
> bool ycbcr_output; /* ycbcr output converter supported */
> bool plane_reg_shadow; /* plane shadow registers ability */
> bool crc; /* cyclic redundancy check supported */
> + bool dynamic_zorder; /* dynamic z-order */
> };
>
> #define LTDC_MAX_LAYER 4
Dear Yannick,
Many thanks for your patch,
Applied on drm-misc-next.
Have a good day
Philippe :-)