This patch adds code to handle the misplaced TRIMINFO register
incase of Exynos5420.
On Exynos5420 we have a TRIMINFO register being misplaced for
TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a0000 contains data for TMU channel 4
TRIMINFO at 0x10068000 contains data for TMU channel 2
The misplaced register address is passed through devicetree and
map it seperately during probe.
Also, adds the documentation under devicetree/bindings/thermal/
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
Reviewed-by: Doug Anderson <[email protected]>
---
Rebased on http://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master branch. I'm not sure which one is the right tree to rebase.
.../devicetree/bindings/thermal/exynos-thermal.txt | 48 ++++++++++++++++++++++
drivers/thermal/exynos_thermal.c | 26 +++++++++++-
2 files changed, 72 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/thermal/exynos-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
new file mode 100644
index 0000000..1db279e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -0,0 +1,48 @@
+* Exynos Thermal
+
+Required properties:
+- compatible: should be one of the following.
+ * "samsung,exynos4210-tmu" - for controllers compatible with exynos4210 tmu.
+ * "samsung,exynos5250-tmu" - for controllers compatible with exynos5250 tmu.
+ * "samsung,exynos5420-tmu" - for controllers compatible with exynos5420 tmu.
+
+- reg: physical base address of the controller and length of
+ memory mapped region.
+
+ ** NOTE FOR EXYNOS5420 **
+ TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
+
+ TERMINFO for TMU channel 2 is present in address space of TMU channel 3
+ TERMINFO for TMU channel 3 is present in address space of TMU channel 4
+ TERMINFO for TMU channel 4 is present in address space of TMU channel 2
+
+ * In such cases the reg property contains the misplaced register address and
+ range as the second parameter.
+
+- interrupts : interrupt number to the cpu.
+- clocks : Clock number as per common clock framework for the cpu.
+- clock-names : clock name to be used in the driver
+
+Example:
+
+ /* tmu for CPU0 */
+ tmu@10060000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x10060000 0x100>;
+ interrupts = <0 65 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
+Example: In case of Exynos5420 TMU channel 3
+
+ /* tmu for CPU3 */
+ tmu@1006c000 {
+ compatible = "samsung,exynos5420-tmu";
+ /* 2nd reg is for the misplaced TRIMINFO register */
+ reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+ interrupts = <0 185 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index cec3f1f..a229314 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -38,6 +38,7 @@
#include <linux/cpufreq.h>
#include <linux/cpu_cooling.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <plat/cpu.h>
#include <mach/regs-pmu.h> /* for EXYNOS5_PS_HOLD_CONTROL */
@@ -123,7 +124,7 @@ struct exynos_thermal_zone;
struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
struct resource *mem;
- void __iomem *base;
+ void __iomem *base, *triminfo_base;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -665,8 +666,14 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
__raw_writel(EXYNOS_TRIMINFO_RELOAD,
data->base + EXYNOS_TMU_TRIMINFO_CON);
}
+
/* Save trimming info in order to perform calibration */
- trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
+ if (data->triminfo_base)
+ /* On exynos5420 TRIMINFO is misplaced for some channels */
+ trim_info = readl(data->triminfo_base);
+ else
+ trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
+
data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
@@ -1016,6 +1023,15 @@ static int exynos_tmu_probe(struct platform_device *pdev)
return -ENODEV;
}
+ /* For Exynos5420 The misplaced TERMINFO register address will be
+ * passed from device tree node.
+ *
+ * We cannot use devm_request_and_ioremap, as the base address
+ * over laps with the address space of the other TMU channel.
+ * Check Documentation for details
+ */
+ data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
+
data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
if (IS_ERR(data->clk)) {
dev_err(&pdev->dev, "Failed to get clock\n");
@@ -1086,6 +1102,9 @@ static int exynos_tmu_probe(struct platform_device *pdev)
err_irq:
exynos_unregister_thermal(data);
err_clk:
+ if (data->triminfo_base)
+ iounmap(data->triminfo_base);
+
platform_set_drvdata(pdev, NULL);
clk_unprepare(data->clk);
return ret;
@@ -1100,6 +1119,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
exynos_unregister_thermal(data);
+ if (data->triminfo_base)
+ iounmap(data->triminfo_base);
+
clk_unprepare(data->clk);
platform_set_drvdata(pdev, NULL);
--
1.7.12.4
Hi Naveen,
Can you rebase these patches against
https://git.kernel.org/cgit/linux/kernel/git/evalenti/linux-soc-thermal.git/log/?h=next.
All these patches have been queued for 3.12 merge and contains the new
re-structured TMU driver.
Thanks,
Amit Daniel
On Thu, Aug 1, 2013 at 11:32 AM, Naveen Krishna Chatradhi
<[email protected]> wrote:
> This patch adds code to handle the misplaced TRIMINFO register
> incase of Exynos5420.
>
> On Exynos5420 we have a TRIMINFO register being misplaced for
> TMU channels 2, 3 and 4
>
> TRIMINFO at 0x1006c000 contains data for TMU channel 3
> TRIMINFO at 0x100a0000 contains data for TMU channel 4
> TRIMINFO at 0x10068000 contains data for TMU channel 2
>
> The misplaced register address is passed through devicetree and
> map it seperately during probe.
> Also, adds the documentation under devicetree/bindings/thermal/
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> Reviewed-by: Doug Anderson <[email protected]>
> ---
>
> Rebased on http://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master branch. I'm not sure which one is the right tree to rebase.
>
> .../devicetree/bindings/thermal/exynos-thermal.txt | 48 ++++++++++++++++++++++
> drivers/thermal/exynos_thermal.c | 26 +++++++++++-
> 2 files changed, 72 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> new file mode 100644
> index 0000000..1db279e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> @@ -0,0 +1,48 @@
> +* Exynos Thermal
> +
> +Required properties:
> +- compatible: should be one of the following.
> + * "samsung,exynos4210-tmu" - for controllers compatible with exynos4210 tmu.
> + * "samsung,exynos5250-tmu" - for controllers compatible with exynos5250 tmu.
> + * "samsung,exynos5420-tmu" - for controllers compatible with exynos5420 tmu.
> +
> +- reg: physical base address of the controller and length of
> + memory mapped region.
> +
> + ** NOTE FOR EXYNOS5420 **
> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
> +
> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
> +
> + * In such cases the reg property contains the misplaced register address and
> + range as the second parameter.
> +
> +- interrupts : interrupt number to the cpu.
> +- clocks : Clock number as per common clock framework for the cpu.
> +- clock-names : clock name to be used in the driver
> +
> +Example:
> +
> + /* tmu for CPU0 */
> + tmu@10060000 {
> + compatible = "samsung,exynos5420-tmu";
> + reg = <0x10060000 0x100>;
> + interrupts = <0 65 0>;
> + clocks = <&clock 318>;
> + clock-names = "tmu_apbif";
> + };
> +
> +Example: In case of Exynos5420 TMU channel 3
> +
> + /* tmu for CPU3 */
> + tmu@1006c000 {
> + compatible = "samsung,exynos5420-tmu";
> + /* 2nd reg is for the misplaced TRIMINFO register */
> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> + interrupts = <0 185 0>;
> + clocks = <&clock 318>;
> + clock-names = "tmu_apbif";
> + };
> +
> diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
> index cec3f1f..a229314 100644
> --- a/drivers/thermal/exynos_thermal.c
> +++ b/drivers/thermal/exynos_thermal.c
> @@ -38,6 +38,7 @@
> #include <linux/cpufreq.h>
> #include <linux/cpu_cooling.h>
> #include <linux/of.h>
> +#include <linux/of_address.h>
>
> #include <plat/cpu.h>
> #include <mach/regs-pmu.h> /* for EXYNOS5_PS_HOLD_CONTROL */
> @@ -123,7 +124,7 @@ struct exynos_thermal_zone;
> struct exynos_tmu_data {
> struct exynos_tmu_platform_data *pdata;
> struct resource *mem;
> - void __iomem *base;
> + void __iomem *base, *triminfo_base;
> int irq;
> enum soc_type soc;
> struct work_struct irq_work;
> @@ -665,8 +666,14 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
> __raw_writel(EXYNOS_TRIMINFO_RELOAD,
> data->base + EXYNOS_TMU_TRIMINFO_CON);
> }
> +
> /* Save trimming info in order to perform calibration */
> - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
> + if (data->triminfo_base)
> + /* On exynos5420 TRIMINFO is misplaced for some channels */
> + trim_info = readl(data->triminfo_base);
> + else
> + trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
> +
> data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
> data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
>
> @@ -1016,6 +1023,15 @@ static int exynos_tmu_probe(struct platform_device *pdev)
> return -ENODEV;
> }
>
> + /* For Exynos5420 The misplaced TERMINFO register address will be
> + * passed from device tree node.
> + *
> + * We cannot use devm_request_and_ioremap, as the base address
> + * over laps with the address space of the other TMU channel.
> + * Check Documentation for details
> + */
> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
> +
> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
> if (IS_ERR(data->clk)) {
> dev_err(&pdev->dev, "Failed to get clock\n");
> @@ -1086,6 +1102,9 @@ static int exynos_tmu_probe(struct platform_device *pdev)
> err_irq:
> exynos_unregister_thermal(data);
> err_clk:
> + if (data->triminfo_base)
> + iounmap(data->triminfo_base);
> +
> platform_set_drvdata(pdev, NULL);
> clk_unprepare(data->clk);
> return ret;
> @@ -1100,6 +1119,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>
> exynos_unregister_thermal(data);
>
> + if (data->triminfo_base)
> + iounmap(data->triminfo_base);
> +
> clk_unprepare(data->clk);
>
> platform_set_drvdata(pdev, NULL);
> --
> 1.7.12.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On 1 August 2013 14:02, amit daniel kachhap <[email protected]> wrote:
> Hi Naveen,
>
> Can you rebase these patches against
> https://git.kernel.org/cgit/linux/kernel/git/evalenti/linux-soc-thermal.git/log/?h=next.
> All these patches have been queued for 3.12 merge and contains the new
> re-structured TMU driver.
Sure, I will re base and submit.
>
> Thanks,
> Amit Daniel
>
> On Thu, Aug 1, 2013 at 11:32 AM, Naveen Krishna Chatradhi
> <[email protected]> wrote:
>> This patch adds code to handle the misplaced TRIMINFO register
>> incase of Exynos5420.
>>
>> On Exynos5420 we have a TRIMINFO register being misplaced for
>> TMU channels 2, 3 and 4
>>
>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>
>> The misplaced register address is passed through devicetree and
>> map it seperately during probe.
>> Also, adds the documentation under devicetree/bindings/thermal/
>>
>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>> Reviewed-by: Doug Anderson <[email protected]>
>> ---
>>
>> Rebased on http://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
>> master branch. I'm not sure which one is the right tree to rebase.
>>
>> .../devicetree/bindings/thermal/exynos-thermal.txt | 48 ++++++++++++++++++++++
>> drivers/thermal/exynos_thermal.c | 26 +++++++++++-
>> 2 files changed, 72 insertions(+), 2 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> new file mode 100644
>> index 0000000..1db279e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> @@ -0,0 +1,48 @@
>> +* Exynos Thermal
>> +
>> +Required properties:
>> +- compatible: should be one of the following.
>> + * "samsung,exynos4210-tmu" - for controllers compatible with exynos4210 tmu.
>> + * "samsung,exynos5250-tmu" - for controllers compatible with exynos5250 tmu.
>> + * "samsung,exynos5420-tmu" - for controllers compatible with exynos5420 tmu.
>> +
>> +- reg: physical base address of the controller and length of
>> + memory mapped region.
>> +
>> + ** NOTE FOR EXYNOS5420 **
>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>> +
>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>> +
>> + * In such cases the reg property contains the misplaced register address and
>> + range as the second parameter.
>> +
>> +- interrupts : interrupt number to the cpu.
>> +- clocks : Clock number as per common clock framework for the cpu.
>> +- clock-names : clock name to be used in the driver
>> +
>> +Example:
>> +
>> + /* tmu for CPU0 */
>> + tmu@10060000 {
>> + compatible = "samsung,exynos5420-tmu";
>> + reg = <0x10060000 0x100>;
>> + interrupts = <0 65 0>;
>> + clocks = <&clock 318>;
>> + clock-names = "tmu_apbif";
>> + };
>> +
>> +Example: In case of Exynos5420 TMU channel 3
>> +
>> + /* tmu for CPU3 */
>> + tmu@1006c000 {
>> + compatible = "samsung,exynos5420-tmu";
>> + /* 2nd reg is for the misplaced TRIMINFO register */
>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>> + interrupts = <0 185 0>;
>> + clocks = <&clock 318>;
>> + clock-names = "tmu_apbif";
>> + };
>> +
>> diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
>> index cec3f1f..a229314 100644
>> --- a/drivers/thermal/exynos_thermal.c
>> +++ b/drivers/thermal/exynos_thermal.c
>> @@ -38,6 +38,7 @@
>> #include <linux/cpufreq.h>
>> #include <linux/cpu_cooling.h>
>> #include <linux/of.h>
>> +#include <linux/of_address.h>
>>
>> #include <plat/cpu.h>
>> #include <mach/regs-pmu.h> /* for EXYNOS5_PS_HOLD_CONTROL */
>> @@ -123,7 +124,7 @@ struct exynos_thermal_zone;
>> struct exynos_tmu_data {
>> struct exynos_tmu_platform_data *pdata;
>> struct resource *mem;
>> - void __iomem *base;
>> + void __iomem *base, *triminfo_base;
>> int irq;
>> enum soc_type soc;
>> struct work_struct irq_work;
>> @@ -665,8 +666,14 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>> __raw_writel(EXYNOS_TRIMINFO_RELOAD,
>> data->base + EXYNOS_TMU_TRIMINFO_CON);
>> }
>> +
>> /* Save trimming info in order to perform calibration */
>> - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
>> + if (data->triminfo_base)
>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>> + trim_info = readl(data->triminfo_base);
>> + else
>> + trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
>> +
>> data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
>> data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
>>
>> @@ -1016,6 +1023,15 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>> return -ENODEV;
>> }
>>
>> + /* For Exynos5420 The misplaced TERMINFO register address will be
>> + * passed from device tree node.
>> + *
>> + * We cannot use devm_request_and_ioremap, as the base address
>> + * over laps with the address space of the other TMU channel.
>> + * Check Documentation for details
>> + */
>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>> +
>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>> if (IS_ERR(data->clk)) {
>> dev_err(&pdev->dev, "Failed to get clock\n");
>> @@ -1086,6 +1102,9 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>> err_irq:
>> exynos_unregister_thermal(data);
>> err_clk:
>> + if (data->triminfo_base)
>> + iounmap(data->triminfo_base);
>> +
>> platform_set_drvdata(pdev, NULL);
>> clk_unprepare(data->clk);
>> return ret;
>> @@ -1100,6 +1119,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>
>> exynos_unregister_thermal(data);
>>
>> + if (data->triminfo_base)
>> + iounmap(data->triminfo_base);
>> +
>> clk_unprepare(data->clk);
>>
>> platform_set_drvdata(pdev, NULL);
>> --
>> 1.7.12.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
>> the body of a message to [email protected]
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Shine bright,
(: Nav :)
This patch adds code to handle the misplaced TRIMINFO register
incase of Exynos5420.
On Exynos5420 we have a TRIMINFO register being misplaced for
TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a0000 contains data for TMU channel 4
TRIMINFO at 0x10068000 contains data for TMU channel 2
The misplaced register address is passed through devicetree and
map it seperately during probe.
Also, adds the documentation under devicetree/bindings/thermal/
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
Reviewed-by: Doug Anderson <[email protected]>
---
Changes since v1:
Rebased on http://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
.../devicetree/bindings/thermal/exynos-thermal.txt | 48 ++++++++++++++++++++
drivers/thermal/exynos_thermal.c | 26 ++++++++++-
2 files changed, 72 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/thermal/exynos-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
new file mode 100644
index 0000000..1db279e
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -0,0 +1,48 @@
+* Exynos Thermal
+
+Required properties:
+- compatible: should be one of the following.
+ * "samsung,exynos4210-tmu" - for controllers compatible with exynos4210 tmu.
+ * "samsung,exynos5250-tmu" - for controllers compatible with exynos5250 tmu.
+ * "samsung,exynos5420-tmu" - for controllers compatible with exynos5420 tmu.
+
+- reg: physical base address of the controller and length of
+ memory mapped region.
+
+ ** NOTE FOR EXYNOS5420 **
+ TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
+
+ TERMINFO for TMU channel 2 is present in address space of TMU channel 3
+ TERMINFO for TMU channel 3 is present in address space of TMU channel 4
+ TERMINFO for TMU channel 4 is present in address space of TMU channel 2
+
+ * In such cases the reg property contains the misplaced register address and
+ range as the second parameter.
+
+- interrupts : interrupt number to the cpu.
+- clocks : Clock number as per common clock framework for the cpu.
+- clock-names : clock name to be used in the driver
+
+Example:
+
+ /* tmu for CPU0 */
+ tmu@10060000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x10060000 0x100>;
+ interrupts = <0 65 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
+Example: In case of Exynos5420 TMU channel 3
+
+ /* tmu for CPU3 */
+ tmu@1006c000 {
+ compatible = "samsung,exynos5420-tmu";
+ /* 2nd reg is for the misplaced TRIMINFO register */
+ reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+ interrupts = <0 185 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
index d20ce9e..1ad9005 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -38,6 +38,7 @@
#include <linux/cpufreq.h>
#include <linux/cpu_cooling.h>
#include <linux/of.h>
+#include <linux/of_address.h>
/* Exynos generic registers */
#define EXYNOS_TMU_REG_TRIMINFO 0x0
@@ -120,7 +121,7 @@
struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
struct resource *mem;
- void __iomem *base;
+ void __iomem *base, *triminfo_base;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -593,8 +594,14 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
__raw_writel(EXYNOS_TRIMINFO_RELOAD,
data->base + EXYNOS_TMU_TRIMINFO_CON);
}
+
/* Save trimming info in order to perform calibration */
- trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
+ if (data->triminfo_base)
+ /* On exynos5420 TRIMINFO is misplaced for some channels */
+ trim_info = readl(data->triminfo_base);
+ else
+ trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
+
data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
@@ -941,6 +948,15 @@ static int exynos_tmu_probe(struct platform_device *pdev)
return ret;
}
+ /* For Exynos5420 The misplaced TERMINFO register address will be
+ * passed from device tree node.
+ *
+ * We cannot use devm_request_and_ioremap, as the base address
+ * over laps with the address space of the other TMU channel.
+ * Check Documentation for details
+ */
+ data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
+
data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
if (IS_ERR(data->clk)) {
dev_err(&pdev->dev, "Failed to get clock\n");
@@ -1001,6 +1017,9 @@ static int exynos_tmu_probe(struct platform_device *pdev)
return 0;
err_clk:
+ if (data->triminfo_base)
+ iounmap(data->triminfo_base);
+
platform_set_drvdata(pdev, NULL);
clk_unprepare(data->clk);
return ret;
@@ -1014,6 +1033,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
exynos_unregister_thermal();
+ if (data->triminfo_base)
+ iounmap(data->triminfo_base);
+
clk_unprepare(data->clk);
platform_set_drvdata(pdev, NULL);
--
1.7.9.5
Hi Naveen,
On Thu, Aug 1, 2013 at 4:06 PM, Naveen Krishna Chatradhi
<[email protected]> wrote:
> This patch adds code to handle the misplaced TRIMINFO register
> incase of Exynos5420.
>
> On Exynos5420 we have a TRIMINFO register being misplaced for
> TMU channels 2, 3 and 4
>
> TRIMINFO at 0x1006c000 contains data for TMU channel 3
> TRIMINFO at 0x100a0000 contains data for TMU channel 4
> TRIMINFO at 0x10068000 contains data for TMU channel 2
>
> The misplaced register address is passed through devicetree and
> map it seperately during probe.
> Also, adds the documentation under devicetree/bindings/thermal/
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> Reviewed-by: Doug Anderson <[email protected]>
> ---
> Changes since v1:
> Rebased on http://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
Is it rebased against next branch?
>
> .../devicetree/bindings/thermal/exynos-thermal.txt | 48 ++++++++++++++++++++
> drivers/thermal/exynos_thermal.c | 26 ++++++++++-
In the new directory structure this file is renamed as
drivers/thermal/samsung/exynos_tmu.c.
Thanks,
Amit Daniel
> 2 files changed, 72 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>
> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> new file mode 100644
> index 0000000..1db279e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> @@ -0,0 +1,48 @@
> +* Exynos Thermal
> +
> +Required properties:
> +- compatible: should be one of the following.
> + * "samsung,exynos4210-tmu" - for controllers compatible with exynos4210 tmu.
> + * "samsung,exynos5250-tmu" - for controllers compatible with exynos5250 tmu.
> + * "samsung,exynos5420-tmu" - for controllers compatible with exynos5420 tmu.
> +
> +- reg: physical base address of the controller and length of
> + memory mapped region.
> +
> + ** NOTE FOR EXYNOS5420 **
> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
> +
> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
> +
> + * In such cases the reg property contains the misplaced register address and
> + range as the second parameter.
> +
> +- interrupts : interrupt number to the cpu.
> +- clocks : Clock number as per common clock framework for the cpu.
> +- clock-names : clock name to be used in the driver
> +
> +Example:
> +
> + /* tmu for CPU0 */
> + tmu@10060000 {
> + compatible = "samsung,exynos5420-tmu";
> + reg = <0x10060000 0x100>;
> + interrupts = <0 65 0>;
> + clocks = <&clock 318>;
> + clock-names = "tmu_apbif";
> + };
> +
> +Example: In case of Exynos5420 TMU channel 3
> +
> + /* tmu for CPU3 */
> + tmu@1006c000 {
> + compatible = "samsung,exynos5420-tmu";
> + /* 2nd reg is for the misplaced TRIMINFO register */
> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> + interrupts = <0 185 0>;
> + clocks = <&clock 318>;
> + clock-names = "tmu_apbif";
> + };
> +
> diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
> index d20ce9e..1ad9005 100644
> --- a/drivers/thermal/exynos_thermal.c
> +++ b/drivers/thermal/exynos_thermal.c
> @@ -38,6 +38,7 @@
> #include <linux/cpufreq.h>
> #include <linux/cpu_cooling.h>
> #include <linux/of.h>
> +#include <linux/of_address.h>
>
> /* Exynos generic registers */
> #define EXYNOS_TMU_REG_TRIMINFO 0x0
> @@ -120,7 +121,7 @@
> struct exynos_tmu_data {
> struct exynos_tmu_platform_data *pdata;
> struct resource *mem;
> - void __iomem *base;
> + void __iomem *base, *triminfo_base;
> int irq;
> enum soc_type soc;
> struct work_struct irq_work;
> @@ -593,8 +594,14 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
> __raw_writel(EXYNOS_TRIMINFO_RELOAD,
> data->base + EXYNOS_TMU_TRIMINFO_CON);
> }
> +
> /* Save trimming info in order to perform calibration */
> - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
> + if (data->triminfo_base)
> + /* On exynos5420 TRIMINFO is misplaced for some channels */
> + trim_info = readl(data->triminfo_base);
> + else
> + trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
> +
> data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
> data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
>
> @@ -941,6 +948,15 @@ static int exynos_tmu_probe(struct platform_device *pdev)
> return ret;
> }
>
> + /* For Exynos5420 The misplaced TERMINFO register address will be
> + * passed from device tree node.
> + *
> + * We cannot use devm_request_and_ioremap, as the base address
> + * over laps with the address space of the other TMU channel.
> + * Check Documentation for details
> + */
> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
> +
> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
> if (IS_ERR(data->clk)) {
> dev_err(&pdev->dev, "Failed to get clock\n");
> @@ -1001,6 +1017,9 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>
> return 0;
> err_clk:
> + if (data->triminfo_base)
> + iounmap(data->triminfo_base);
> +
> platform_set_drvdata(pdev, NULL);
> clk_unprepare(data->clk);
> return ret;
> @@ -1014,6 +1033,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>
> exynos_unregister_thermal();
>
> + if (data->triminfo_base)
> + iounmap(data->triminfo_base);
> +
> clk_unprepare(data->clk);
>
> platform_set_drvdata(pdev, NULL);
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On 7 August 2013 12:06, amit daniel kachhap <[email protected]> wrote:
> Hi Naveen,
>
> On Thu, Aug 1, 2013 at 4:06 PM, Naveen Krishna Chatradhi
> <[email protected]> wrote:
>> This patch adds code to handle the misplaced TRIMINFO register
>> incase of Exynos5420.
>>
>> On Exynos5420 we have a TRIMINFO register being misplaced for
>> TMU channels 2, 3 and 4
>>
>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>
>> The misplaced register address is passed through devicetree and
>> map it seperately during probe.
>> Also, adds the documentation under devicetree/bindings/thermal/
>>
>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>> Reviewed-by: Doug Anderson <[email protected]>
>> ---
>> Changes since v1:
>> Rebased on http://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
> Is it rebased against next branch?
Sorry, i re based it on to master.
>>
>> .../devicetree/bindings/thermal/exynos-thermal.txt | 48 ++++++++++++++++++++
>> drivers/thermal/exynos_thermal.c | 26 ++++++++++-
> In the new directory structure this file is renamed as
> drivers/thermal/samsung/exynos_tmu.c.
Yea, just checked it. Will re-base and submit.
>
> Thanks,
> Amit Daniel
>> 2 files changed, 72 insertions(+), 2 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> new file mode 100644
>> index 0000000..1db279e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> @@ -0,0 +1,48 @@
>> +* Exynos Thermal
>> +
>> +Required properties:
>> +- compatible: should be one of the following.
>> + * "samsung,exynos4210-tmu" - for controllers compatible with exynos4210 tmu.
>> + * "samsung,exynos5250-tmu" - for controllers compatible with exynos5250 tmu.
>> + * "samsung,exynos5420-tmu" - for controllers compatible with exynos5420 tmu.
>> +
>> +- reg: physical base address of the controller and length of
>> + memory mapped region.
>> +
>> + ** NOTE FOR EXYNOS5420 **
>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>> +
>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>> +
>> + * In such cases the reg property contains the misplaced register address and
>> + range as the second parameter.
>> +
>> +- interrupts : interrupt number to the cpu.
>> +- clocks : Clock number as per common clock framework for the cpu.
>> +- clock-names : clock name to be used in the driver
>> +
>> +Example:
>> +
>> + /* tmu for CPU0 */
>> + tmu@10060000 {
>> + compatible = "samsung,exynos5420-tmu";
>> + reg = <0x10060000 0x100>;
>> + interrupts = <0 65 0>;
>> + clocks = <&clock 318>;
>> + clock-names = "tmu_apbif";
>> + };
>> +
>> +Example: In case of Exynos5420 TMU channel 3
>> +
>> + /* tmu for CPU3 */
>> + tmu@1006c000 {
>> + compatible = "samsung,exynos5420-tmu";
>> + /* 2nd reg is for the misplaced TRIMINFO register */
>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>> + interrupts = <0 185 0>;
>> + clocks = <&clock 318>;
>> + clock-names = "tmu_apbif";
>> + };
>> +
>> diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
>> index d20ce9e..1ad9005 100644
>> --- a/drivers/thermal/exynos_thermal.c
>> +++ b/drivers/thermal/exynos_thermal.c
>> @@ -38,6 +38,7 @@
>> #include <linux/cpufreq.h>
>> #include <linux/cpu_cooling.h>
>> #include <linux/of.h>
>> +#include <linux/of_address.h>
>>
>> /* Exynos generic registers */
>> #define EXYNOS_TMU_REG_TRIMINFO 0x0
>> @@ -120,7 +121,7 @@
>> struct exynos_tmu_data {
>> struct exynos_tmu_platform_data *pdata;
>> struct resource *mem;
>> - void __iomem *base;
>> + void __iomem *base, *triminfo_base;
>> int irq;
>> enum soc_type soc;
>> struct work_struct irq_work;
>> @@ -593,8 +594,14 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>> __raw_writel(EXYNOS_TRIMINFO_RELOAD,
>> data->base + EXYNOS_TMU_TRIMINFO_CON);
>> }
>> +
>> /* Save trimming info in order to perform calibration */
>> - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
>> + if (data->triminfo_base)
>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>> + trim_info = readl(data->triminfo_base);
>> + else
>> + trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
>> +
>> data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
>> data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
>>
>> @@ -941,6 +948,15 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>> return ret;
>> }
>>
>> + /* For Exynos5420 The misplaced TERMINFO register address will be
>> + * passed from device tree node.
>> + *
>> + * We cannot use devm_request_and_ioremap, as the base address
>> + * over laps with the address space of the other TMU channel.
>> + * Check Documentation for details
>> + */
>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>> +
>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>> if (IS_ERR(data->clk)) {
>> dev_err(&pdev->dev, "Failed to get clock\n");
>> @@ -1001,6 +1017,9 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>
>> return 0;
>> err_clk:
>> + if (data->triminfo_base)
>> + iounmap(data->triminfo_base);
>> +
>> platform_set_drvdata(pdev, NULL);
>> clk_unprepare(data->clk);
>> return ret;
>> @@ -1014,6 +1033,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>
>> exynos_unregister_thermal();
>>
>> + if (data->triminfo_base)
>> + iounmap(data->triminfo_base);
>> +
>> clk_unprepare(data->clk);
>>
>> platform_set_drvdata(pdev, NULL);
>> --
>> 1.7.9.5
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
>> the body of a message to [email protected]
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Shine bright,
(: Nav :)
This patch adds code to handle the misplaced TRIMINFO register
incase of Exynos5420.
On Exynos5420 we have a TRIMINFO register being misplaced for
TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a0000 contains data for TMU channel 4
TRIMINFO at 0x10068000 contains data for TMU channel 2
The misplaced register address is passed through devicetree and
map it seperately during probe.
Also, adds the documentation under devicetree/bindings/thermal/
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
.../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
2 files changed, 49 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 284f530..e818473 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -7,12 +7,21 @@
"samsung,exynos4210-tmu"
"samsung,exynos5250-tmu"
"samsung,exynos5440-tmu"
+ "samsung,exynos5420-tmu"
- interrupt-parent : The phandle for the interrupt controller
- reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
interrupt related then 2 set of register has to supplied. First set
belongs to each instance of TMU and second set belongs to common TMU
registers.
+
+ ** NOTE FOR EXYNOS5420 **
+ TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
+
+ TERMINFO for TMU channel 2 is present in address space of TMU channel 3
+ TERMINFO for TMU channel 3 is present in address space of TMU channel 4
+ TERMINFO for TMU channel 4 is present in address space of TMU channel 2
+
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
@@ -43,6 +52,18 @@ Example 2):
clock-names = "tmu_apbif";
};
+Example 3): In case of Exynos5420 TMU channel 3
+
+ /* tmu for CPU3 */
+ tmu@1006c000 {
+ compatible = "samsung,exynos5420-tmu";
+ /* 2nd reg is for the misplaced TRIMINFO register */
+ reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+ interrupts = <0 185 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
Note: For multi-instance tmu each instance should have an alias correctly
numbered in "aliases" node.
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index bfdfbd6..f95844e 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -42,6 +42,7 @@
* @pdata: pointer to the tmu platform/configuration data
* @base: base address of the single instance of the TMU controller.
* @base_common: base address of the common registers of the TMU controller.
+ * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
* @irq: irq number of the TMU controller.
* @soc: id of the SOC type.
* @irq_work: pointer to the irq work structure.
@@ -57,6 +58,7 @@ struct exynos_tmu_data {
struct exynos_tmu_platform_data *pdata;
void __iomem *base;
void __iomem *base_common;
+ void __iomem *triminfo_base; /* Needed only Exynos5420 */
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
}
} else {
- trim_info = readl(data->base + reg->triminfo_data);
+ /* On exynos5420 TRIMINFO is misplaced for some channels */
+ if (data->triminfo_base)
+ trim_info = readl(data->triminfo_base +
+ reg->triminfo_data);
+ else
+ trim_info = readl(data->base + reg->triminfo_data);
}
data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
@@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
* Check if the TMU shares some registers and then try to map the
* memory of common registers.
*/
- if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
+ if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
+ /* For Exynos5420 The misplaced TERMINFO register address will
+ * be passed from device tree node.
+ *
+ * We cannot use devm_request_and_ioremap, as the base address
+ * over laps with the address space of the other TMU channel.
+ * Check Documentation for details
+ */
+ data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
return 0;
+ }
if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
dev_err(&pdev->dev, "failed to get Resource 1\n");
@@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
if (IS_ERR(data->clk)) {
dev_err(&pdev->dev, "Failed to get clock\n");
- return PTR_ERR(data->clk);
+ ret = PTR_ERR(data->clk);
+ goto err_triminfo_base;
}
ret = clk_prepare(data->clk);
if (ret)
- return ret;
+ goto err_triminfo_base;
if (pdata->type == SOC_ARCH_EXYNOS ||
pdata->type == SOC_ARCH_EXYNOS4210 ||
@@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
}
return 0;
+
err_clk:
clk_unprepare(data->clk);
return ret;
+err_triminfo_base:
+ if (data->triminfo_base)
+ iounmap(data->triminfo_base);
}
static int exynos_tmu_remove(struct platform_device *pdev)
@@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
exynos_unregister_thermal(data->reg_conf);
+ if (data->triminfo_base)
+ iounmap(data->triminfo_base);
+
clk_unprepare(data->clk);
if (!IS_ERR(data->regulator))
--
1.7.9.5
This patch adds the neccessary register changes and arch information
to support Exynos5420 SoCs
Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
drivers/thermal/samsung/exynos_tmu.c | 4 ++
drivers/thermal/samsung/exynos_tmu.h | 1 +
drivers/thermal/samsung/exynos_tmu_data.c | 90 +++++++++++++++++++++++++++++
drivers/thermal/samsung/exynos_tmu_data.h | 7 +++
4 files changed, 102 insertions(+)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index d201ed8..bfdfbd6 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -499,6 +499,10 @@ static const struct of_device_id exynos_tmu_match[] = {
.compatible = "samsung,exynos5440-tmu",
.data = (void *)EXYNOS5440_TMU_DRV_DATA,
},
+ {
+ .compatible = "samsung,exynos5420-tmu",
+ .data = (void *)EXYNOS5420_TMU_DRV_DATA,
+ },
{},
};
MODULE_DEVICE_TABLE(of, exynos_tmu_match);
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index 7c6c34a..d88a536 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -43,6 +43,7 @@ enum soc_type {
SOC_ARCH_EXYNOS4210 = 1,
SOC_ARCH_EXYNOS,
SOC_ARCH_EXYNOS5440,
+ SOC_ARCH_EXYNOS5420,
};
/**
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 23fea23..5adbb36 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -177,6 +177,96 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
};
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+static const struct exynos_tmu_registers exynos5420_tmu_registers = {
+ .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
+ .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
+ .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
+ .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
+ .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
+ .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
+ .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
+ .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
+ .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
+ .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+ .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
+ .tmu_status = EXYNOS_TMU_REG_STATUS,
+ .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
+ .threshold_th0 = EXYNOS_THD_TEMP_RISE,
+ .threshold_th1 = EXYNOS_THD_TEMP_FALL,
+ .tmu_inten = EXYNOS_TMU_REG_INTEN,
+ .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
+ .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
+ .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
+ .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
+ .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
+ .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
+ /* INTEN_RISE3 Not availble in exynos5420 */
+ .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
+ .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
+ .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
+ .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .emul_con = EXYNOS_EMUL_CON,
+ .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
+ .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
+ .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
+};
+
+#define EXYNOS5420_TMU_DATA \
+ .threshold_falling = 10, \
+ .trigger_levels[0] = 85, \
+ .trigger_levels[1] = 103, \
+ .trigger_levels[2] = 110, \
+ .trigger_levels[3] = 120, \
+ .trigger_enable[0] = true, \
+ .trigger_enable[1] = true, \
+ .trigger_enable[2] = true, \
+ .trigger_enable[3] = false, \
+ .trigger_type[0] = THROTTLE_ACTIVE, \
+ .trigger_type[1] = THROTTLE_ACTIVE, \
+ .trigger_type[2] = SW_TRIP, \
+ .trigger_type[3] = HW_TRIP, \
+ .max_trigger_level = 4, \
+ .gain = 8, \
+ .reference_voltage = 16, \
+ .noise_cancel_mode = 4, \
+ .cal_type = TYPE_ONE_POINT_TRIMMING, \
+ .efuse_value = 55, \
+ .min_efuse_value = 40, \
+ .max_efuse_value = 100, \
+ .first_point_trim = 25, \
+ .second_point_trim = 85, \
+ .default_temp_offset = 50, \
+ .freq_tab[0] = { \
+ .freq_clip_max = 800 * 1000, \
+ .temp_level = 85, \
+ }, \
+ .freq_tab[1] = { \
+ .freq_clip_max = 200 * 1000, \
+ .temp_level = 103, \
+ }, \
+ .freq_tab_count = 2, \
+ .type = SOC_ARCH_EXYNOS5420, \
+ .registers = &exynos5420_tmu_registers, \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
+ TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
+ TMU_SUPPORT_EMUL_TIME)
+
+struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
+ .tmu_data = {
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA },
+ },
+ .tmu_count = 5,
+};
+#endif
+
#if defined(CONFIG_SOC_EXYNOS5440)
static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index 8788a87..3ce94cd 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -153,4 +153,11 @@ extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
#define EXYNOS5440_TMU_DRV_DATA (NULL)
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
+#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
+#else
+#define EXYNOS5420_TMU_DRV_DATA (NULL)
+#endif
+
#endif /*_EXYNOS_TMU_DATA_H*/
--
1.7.9.5
The FALL interrupt related en, status bits are available at an offset of
16 on INTEN, INTSTAT registers and at an offset of
12 on INTCLEAR register.
This patch corrects the same for exyns5250 and exynos5440
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
drivers/thermal/samsung/exynos_tmu.c | 2 +-
drivers/thermal/samsung/exynos_tmu.h | 2 ++
drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
4 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index ec01dfe..d201ed8 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -265,7 +265,7 @@ skip_calib_data:
data->base + reg->threshold_th1);
writel((reg->inten_rise_mask << reg->inten_rise_shift) |
- (reg->inten_fall_mask << reg->inten_fall_shift),
+ (reg->inten_fall_mask << reg->intclr_fall_shift),
data->base + reg->tmu_intclear);
/* if last threshold limit is also present */
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index b364c9e..7c6c34a 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -134,6 +134,7 @@ enum soc_type {
* @inten_fall3_shift: shift bits of falling 3 interrupt bits.
* @tmu_intstat: Register containing the interrupt status values.
* @tmu_intclear: Register for clearing the raised interrupt status.
+ * @intclr_fall_shift: shift bits for interrupt clear fall 0
* @emul_con: TMU emulation controller register.
* @emul_temp_shift: shift bits of emulation temperature.
* @emul_time_shift: shift bits of emulation time.
@@ -204,6 +205,7 @@ struct exynos_tmu_registers {
u32 tmu_intstat;
u32 tmu_intclear;
+ u32 intclr_fall_shift;
u32 emul_con;
u32 emul_temp_shift;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 9002499..23fea23 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
.emul_con = EXYNOS_EMUL_CON,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
.emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
@@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
.tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
+ .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
.tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
.emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index dc7feb5..8788a87 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -69,9 +69,10 @@
#define EXYNOS_TMU_RISE_INT_MASK 0x111
#define EXYNOS_TMU_RISE_INT_SHIFT 0
#define EXYNOS_TMU_FALL_INT_MASK 0x111
-#define EXYNOS_TMU_FALL_INT_SHIFT 12
+#define EXYNOS_TMU_FALL_INT_SHIFT 16
#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
+#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
#define EXYNOS_TMU_TRIP_MODE_MASK 0x7
#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
--
1.7.9.5
The below patchset adds the TMU support for Exynos5420
1. correct the fall interrupt en, status bit fields
Fixes an existing bug in the register field access
2. Add TMU support for Exynos5420 SoCs
Adds support for Exynos5420. (These changes were tested on a different
kernel version)
3. Handle the misplaced TRIMINFO register
Discussion was going on at https://lkml.org/lkml/2013/8/7/59
Handles the misplaced register on Exynos5420 Only
Naveen Krishna Chatradhi (3):
thermal: samsung: correct the fall interrupt en, status bit fields
thermal: samsung: Add TMU support for Exynos5420 SoCs
thermal: exynos: Handle the misplaced TRIMINFO register
.../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++
drivers/thermal/samsung/exynos_tmu.c | 38 ++++++--
drivers/thermal/samsung/exynos_tmu.h | 3 +
drivers/thermal/samsung/exynos_tmu_data.c | 92 ++++++++++++++++++++
drivers/thermal/samsung/exynos_tmu_data.h | 10 ++-
5 files changed, 158 insertions(+), 6 deletions(-)
--
1.7.9.5
On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
<[email protected]> wrote:
> The FALL interrupt related en, status bits are available at an offset of
> 16 on INTEN, INTSTAT registers and at an offset of
> 12 on INTCLEAR register.
>
> This patch corrects the same for exyns5250 and exynos5440
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
The changes looks fine.
Acked-by: Amit Daniel Kachhap <[email protected]>
Thanks,
Amit
> ---
> drivers/thermal/samsung/exynos_tmu.c | 2 +-
> drivers/thermal/samsung/exynos_tmu.h | 2 ++
> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
> drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
> 4 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index ec01dfe..d201ed8 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -265,7 +265,7 @@ skip_calib_data:
> data->base + reg->threshold_th1);
>
> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
> - (reg->inten_fall_mask << reg->inten_fall_shift),
> + (reg->inten_fall_mask << reg->intclr_fall_shift),
> data->base + reg->tmu_intclear);
>
> /* if last threshold limit is also present */
> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> index b364c9e..7c6c34a 100644
> --- a/drivers/thermal/samsung/exynos_tmu.h
> +++ b/drivers/thermal/samsung/exynos_tmu.h
> @@ -134,6 +134,7 @@ enum soc_type {
> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
> * @tmu_intstat: Register containing the interrupt status values.
> * @tmu_intclear: Register for clearing the raised interrupt status.
> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
> * @emul_con: TMU emulation controller register.
> * @emul_temp_shift: shift bits of emulation temperature.
> * @emul_time_shift: shift bits of emulation time.
> @@ -204,6 +205,7 @@ struct exynos_tmu_registers {
> u32 tmu_intstat;
>
> u32 tmu_intclear;
> + u32 intclr_fall_shift;
>
> u32 emul_con;
> u32 emul_temp_shift;
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> index 9002499..23fea23 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> @@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> .emul_con = EXYNOS_EMUL_CON,
> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> @@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> index dc7feb5..8788a87 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> @@ -69,9 +69,10 @@
> #define EXYNOS_TMU_RISE_INT_MASK 0x111
> #define EXYNOS_TMU_RISE_INT_SHIFT 0
> #define EXYNOS_TMU_FALL_INT_MASK 0x111
> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
> +#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
<[email protected]> wrote:
> The FALL interrupt related en, status bits are available at an offset of
> 16 on INTEN, INTSTAT registers and at an offset of
> 12 on INTCLEAR register.
>
> This patch corrects the same for exyns5250 and exynos5440
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> ---
> drivers/thermal/samsung/exynos_tmu.c | 2 +-
> drivers/thermal/samsung/exynos_tmu.h | 2 ++
> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
> drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
> 4 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index ec01dfe..d201ed8 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -265,7 +265,7 @@ skip_calib_data:
> data->base + reg->threshold_th1);
>
> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
> - (reg->inten_fall_mask << reg->inten_fall_shift),
> + (reg->inten_fall_mask << reg->intclr_fall_shift),
> data->base + reg->tmu_intclear);
>
> /* if last threshold limit is also present */
> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> index b364c9e..7c6c34a 100644
> --- a/drivers/thermal/samsung/exynos_tmu.h
> +++ b/drivers/thermal/samsung/exynos_tmu.h
> @@ -134,6 +134,7 @@ enum soc_type {
> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
> * @tmu_intstat: Register containing the interrupt status values.
> * @tmu_intclear: Register for clearing the raised interrupt status.
> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
> * @emul_con: TMU emulation controller register.
> * @emul_temp_shift: shift bits of emulation temperature.
> * @emul_time_shift: shift bits of emulation time.
> @@ -204,6 +205,7 @@ struct exynos_tmu_registers {
> u32 tmu_intstat;
>
> u32 tmu_intclear;
> + u32 intclr_fall_shift;
>
> u32 emul_con;
> u32 emul_temp_shift;
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> index 9002499..23fea23 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> @@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> .emul_con = EXYNOS_EMUL_CON,
> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> @@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> index dc7feb5..8788a87 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> @@ -69,9 +69,10 @@
> #define EXYNOS_TMU_RISE_INT_MASK 0x111
> #define EXYNOS_TMU_RISE_INT_SHIFT 0
> #define EXYNOS_TMU_FALL_INT_MASK 0x111
> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
> +#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
<[email protected]> wrote:
> This patch adds the neccessary register changes and arch information
> to support Exynos5420 SoCs
> Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
Acked-by: Amit Daniel Kachhap <[email protected]>
Thanks,
Amit
> ---
> drivers/thermal/samsung/exynos_tmu.c | 4 ++
> drivers/thermal/samsung/exynos_tmu.h | 1 +
> drivers/thermal/samsung/exynos_tmu_data.c | 90 +++++++++++++++++++++++++++++
> drivers/thermal/samsung/exynos_tmu_data.h | 7 +++
> 4 files changed, 102 insertions(+)
>
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index d201ed8..bfdfbd6 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -499,6 +499,10 @@ static const struct of_device_id exynos_tmu_match[] = {
> .compatible = "samsung,exynos5440-tmu",
> .data = (void *)EXYNOS5440_TMU_DRV_DATA,
> },
> + {
> + .compatible = "samsung,exynos5420-tmu",
> + .data = (void *)EXYNOS5420_TMU_DRV_DATA,
> + },
> {},
> };
> MODULE_DEVICE_TABLE(of, exynos_tmu_match);
> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> index 7c6c34a..d88a536 100644
> --- a/drivers/thermal/samsung/exynos_tmu.h
> +++ b/drivers/thermal/samsung/exynos_tmu.h
> @@ -43,6 +43,7 @@ enum soc_type {
> SOC_ARCH_EXYNOS4210 = 1,
> SOC_ARCH_EXYNOS,
> SOC_ARCH_EXYNOS5440,
> + SOC_ARCH_EXYNOS5420,
> };
>
> /**
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> index 23fea23..5adbb36 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> @@ -177,6 +177,96 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
> };
> #endif
>
> +#if defined(CONFIG_SOC_EXYNOS5420)
> +static const struct exynos_tmu_registers exynos5420_tmu_registers = {
> + .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
> + .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
> + .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
> + .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
> + .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
> + .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
> + .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
> + .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
> + .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
> + .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
> + .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
> + .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
> + .tmu_status = EXYNOS_TMU_REG_STATUS,
> + .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
> + .threshold_th0 = EXYNOS_THD_TEMP_RISE,
> + .threshold_th1 = EXYNOS_THD_TEMP_FALL,
> + .tmu_inten = EXYNOS_TMU_REG_INTEN,
> + .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
> + .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
> + .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
> + .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
> + .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
> + .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
> + .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
> + /* INTEN_RISE3 Not availble in exynos5420 */
> + .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
> + .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> + .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> + .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> + .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
> + .emul_con = EXYNOS_EMUL_CON,
> + .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> + .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> + .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
> +};
> +
> +#define EXYNOS5420_TMU_DATA \
> + .threshold_falling = 10, \
> + .trigger_levels[0] = 85, \
> + .trigger_levels[1] = 103, \
> + .trigger_levels[2] = 110, \
> + .trigger_levels[3] = 120, \
> + .trigger_enable[0] = true, \
> + .trigger_enable[1] = true, \
> + .trigger_enable[2] = true, \
> + .trigger_enable[3] = false, \
> + .trigger_type[0] = THROTTLE_ACTIVE, \
> + .trigger_type[1] = THROTTLE_ACTIVE, \
> + .trigger_type[2] = SW_TRIP, \
> + .trigger_type[3] = HW_TRIP, \
> + .max_trigger_level = 4, \
> + .gain = 8, \
> + .reference_voltage = 16, \
> + .noise_cancel_mode = 4, \
> + .cal_type = TYPE_ONE_POINT_TRIMMING, \
> + .efuse_value = 55, \
> + .min_efuse_value = 40, \
> + .max_efuse_value = 100, \
> + .first_point_trim = 25, \
> + .second_point_trim = 85, \
> + .default_temp_offset = 50, \
> + .freq_tab[0] = { \
> + .freq_clip_max = 800 * 1000, \
> + .temp_level = 85, \
> + }, \
> + .freq_tab[1] = { \
> + .freq_clip_max = 200 * 1000, \
> + .temp_level = 103, \
> + }, \
> + .freq_tab_count = 2, \
> + .type = SOC_ARCH_EXYNOS5420, \
> + .registers = &exynos5420_tmu_registers, \
> + .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
> + TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
> + TMU_SUPPORT_EMUL_TIME)
> +
> +struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
> + .tmu_data = {
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA },
> + },
> + .tmu_count = 5,
> +};
> +#endif
> +
> #if defined(CONFIG_SOC_EXYNOS5440)
> static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> index 8788a87..3ce94cd 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> @@ -153,4 +153,11 @@ extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
> #define EXYNOS5440_TMU_DRV_DATA (NULL)
> #endif
>
> +#if defined(CONFIG_SOC_EXYNOS5420)
> +extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
> +#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
> +#else
> +#define EXYNOS5420_TMU_DRV_DATA (NULL)
> +#endif
> +
> #endif /*_EXYNOS_TMU_DATA_H*/
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
Hi Naveen
On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
<[email protected]> wrote:
> This patch adds code to handle the misplaced TRIMINFO register
> incase of Exynos5420.
>
> On Exynos5420 we have a TRIMINFO register being misplaced for
> TMU channels 2, 3 and 4
>
> TRIMINFO at 0x1006c000 contains data for TMU channel 3
> TRIMINFO at 0x100a0000 contains data for TMU channel 4
> TRIMINFO at 0x10068000 contains data for TMU channel 2
>
> The misplaced register address is passed through devicetree and
> map it seperately during probe.
> Also, adds the documentation under devicetree/bindings/thermal/
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> ---
> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
> 2 files changed, 49 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> index 284f530..e818473 100644
> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> @@ -7,12 +7,21 @@
> "samsung,exynos4210-tmu"
> "samsung,exynos5250-tmu"
> "samsung,exynos5440-tmu"
> + "samsung,exynos5420-tmu"
> - interrupt-parent : The phandle for the interrupt controller
> - reg : Address range of the thermal registers. For soc's which has multiple
> instances of TMU and some registers are shared across all TMU's like
> interrupt related then 2 set of register has to supplied. First set
> belongs to each instance of TMU and second set belongs to common TMU
> registers.
> +
> + ** NOTE FOR EXYNOS5420 **
> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
> +
> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
> +
> - interrupts : Should contain interrupt for thermal system
> - clocks : The main clock for TMU device
> - clock-names : Thermal system clock name
> @@ -43,6 +52,18 @@ Example 2):
> clock-names = "tmu_apbif";
> };
>
> +Example 3): In case of Exynos5420 TMU channel 3
> +
> + /* tmu for CPU3 */
> + tmu@1006c000 {
> + compatible = "samsung,exynos5420-tmu";
> + /* 2nd reg is for the misplaced TRIMINFO register */
> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> + interrupts = <0 185 0>;
> + clocks = <&clock 318>;
> + clock-names = "tmu_apbif";
> + };
> +
> Note: For multi-instance tmu each instance should have an alias correctly
> numbered in "aliases" node.
>
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index bfdfbd6..f95844e 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -42,6 +42,7 @@
> * @pdata: pointer to the tmu platform/configuration data
> * @base: base address of the single instance of the TMU controller.
> * @base_common: base address of the common registers of the TMU controller.
> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
Instead of creating this new field you can re-use base_common for
accessing the second set of register for misplaced triminfo address.
Also you can rename this variable as base_second.
> * @irq: irq number of the TMU controller.
> * @soc: id of the SOC type.
> * @irq_work: pointer to the irq work structure.
> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
> struct exynos_tmu_platform_data *pdata;
> void __iomem *base;
> void __iomem *base_common;
> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
> int irq;
> enum soc_type soc;
> struct work_struct irq_work;
> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
> }
> } else {
> - trim_info = readl(data->base + reg->triminfo_data);
> + /* On exynos5420 TRIMINFO is misplaced for some channels */
> + if (data->triminfo_base)
> + trim_info = readl(data->triminfo_base +
> + reg->triminfo_data);
> + else
> + trim_info = readl(data->base + reg->triminfo_data);
> }
> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
> * Check if the TMU shares some registers and then try to map the
> * memory of common registers.
> */
> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
> + /* For Exynos5420 The misplaced TERMINFO register address will
> + * be passed from device tree node.
> + *
> + * We cannot use devm_request_and_ioremap, as the base address
> + * over laps with the address space of the other TMU channel.
> + * Check Documentation for details
> + */
> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
> return 0;
> + }
In the below code, remove the request resource API for common_base and
use simple of_iomap API.
Thanks,
Amit Daniel
>
> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
> dev_err(&pdev->dev, "failed to get Resource 1\n");
> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
> if (IS_ERR(data->clk)) {
> dev_err(&pdev->dev, "Failed to get clock\n");
> - return PTR_ERR(data->clk);
> + ret = PTR_ERR(data->clk);
> + goto err_triminfo_base;
> }
>
> ret = clk_prepare(data->clk);
> if (ret)
> - return ret;
> + goto err_triminfo_base;
>
> if (pdata->type == SOC_ARCH_EXYNOS ||
> pdata->type == SOC_ARCH_EXYNOS4210 ||
> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
> }
>
> return 0;
> +
> err_clk:
> clk_unprepare(data->clk);
> return ret;
> +err_triminfo_base:
> + if (data->triminfo_base)
> + iounmap(data->triminfo_base);
> }
>
> static int exynos_tmu_remove(struct platform_device *pdev)
> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>
> exynos_unregister_thermal(data->reg_conf);
>
> + if (data->triminfo_base)
> + iounmap(data->triminfo_base);
> +
> clk_unprepare(data->clk);
>
> if (!IS_ERR(data->regulator))
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
On 28 August 2013 11:33, amit daniel kachhap <[email protected]> wrote:
> Hi Naveen
>
> On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
> <[email protected]> wrote:
>> This patch adds code to handle the misplaced TRIMINFO register
>> incase of Exynos5420.
>>
>> On Exynos5420 we have a TRIMINFO register being misplaced for
>> TMU channels 2, 3 and 4
>>
>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>
>> The misplaced register address is passed through devicetree and
>> map it seperately during probe.
>> Also, adds the documentation under devicetree/bindings/thermal/
>>
>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>> ---
>> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
>> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
>> 2 files changed, 49 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> index 284f530..e818473 100644
>> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> @@ -7,12 +7,21 @@
>> "samsung,exynos4210-tmu"
>> "samsung,exynos5250-tmu"
>> "samsung,exynos5440-tmu"
>> + "samsung,exynos5420-tmu"
>> - interrupt-parent : The phandle for the interrupt controller
>> - reg : Address range of the thermal registers. For soc's which has multiple
>> instances of TMU and some registers are shared across all TMU's like
>> interrupt related then 2 set of register has to supplied. First set
>> belongs to each instance of TMU and second set belongs to common TMU
>> registers.
>> +
>> + ** NOTE FOR EXYNOS5420 **
>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>> +
>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>> +
>> - interrupts : Should contain interrupt for thermal system
>> - clocks : The main clock for TMU device
>> - clock-names : Thermal system clock name
>> @@ -43,6 +52,18 @@ Example 2):
>> clock-names = "tmu_apbif";
>> };
>>
>> +Example 3): In case of Exynos5420 TMU channel 3
>> +
>> + /* tmu for CPU3 */
>> + tmu@1006c000 {
>> + compatible = "samsung,exynos5420-tmu";
>> + /* 2nd reg is for the misplaced TRIMINFO register */
>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>> + interrupts = <0 185 0>;
>> + clocks = <&clock 318>;
>> + clock-names = "tmu_apbif";
>> + };
>> +
>> Note: For multi-instance tmu each instance should have an alias correctly
>> numbered in "aliases" node.
>>
>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>> index bfdfbd6..f95844e 100644
>> --- a/drivers/thermal/samsung/exynos_tmu.c
>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>> @@ -42,6 +42,7 @@
>> * @pdata: pointer to the tmu platform/configuration data
>> * @base: base address of the single instance of the TMU controller.
>> * @base_common: base address of the common registers of the TMU controller.
>> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
>
> Instead of creating this new field you can re-use base_common for
> accessing the second set of register for misplaced triminfo address.
> Also you can rename this variable as base_second.
The purpose and the meaning of the fields are entirely different.
The triminfo is a hardware bug present only in Exynos5420
and the common registers are available only on Exynos5440 i guess.
IMHO, reusing is not a nice idea.
I'm willing to modify the code if there is a better idea.
>
>> * @irq: irq number of the TMU controller.
>> * @soc: id of the SOC type.
>> * @irq_work: pointer to the irq work structure.
>> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
>> struct exynos_tmu_platform_data *pdata;
>> void __iomem *base;
>> void __iomem *base_common;
>> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
>> int irq;
>> enum soc_type soc;
>> struct work_struct irq_work;
>> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>> }
>> } else {
>> - trim_info = readl(data->base + reg->triminfo_data);
>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>> + if (data->triminfo_base)
>> + trim_info = readl(data->triminfo_base +
>> + reg->triminfo_data);
>> + else
>> + trim_info = readl(data->base + reg->triminfo_data);
>> }
>> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
>> * Check if the TMU shares some registers and then try to map the
>> * memory of common registers.
>> */
>> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
>> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
>> + /* For Exynos5420 The misplaced TERMINFO register address will
>> + * be passed from device tree node.
>> + *
>> + * We cannot use devm_request_and_ioremap, as the base address
>> + * over laps with the address space of the other TMU channel.
>> + * Check Documentation for details
>> + */
>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>> return 0;
>> + }
> In the below code, remove the request resource API for common_base and
> use simple of_iomap API.
That will be a separate fix patch. Will submit separately,
This patchset is to add exynos5420 support
Is the res_size for the common registers fixed ?
>
> Thanks,
> Amit Daniel
>>
>> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
>> dev_err(&pdev->dev, "failed to get Resource 1\n");
>> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>> if (IS_ERR(data->clk)) {
>> dev_err(&pdev->dev, "Failed to get clock\n");
>> - return PTR_ERR(data->clk);
>> + ret = PTR_ERR(data->clk);
>> + goto err_triminfo_base;
>> }
>>
>> ret = clk_prepare(data->clk);
>> if (ret)
>> - return ret;
>> + goto err_triminfo_base;
>>
>> if (pdata->type == SOC_ARCH_EXYNOS ||
>> pdata->type == SOC_ARCH_EXYNOS4210 ||
>> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>> }
>>
>> return 0;
>> +
>> err_clk:
>> clk_unprepare(data->clk);
>> return ret;
>> +err_triminfo_base:
>> + if (data->triminfo_base)
>> + iounmap(data->triminfo_base);
>> }
>>
>> static int exynos_tmu_remove(struct platform_device *pdev)
>> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>
>> exynos_unregister_thermal(data->reg_conf);
>>
>> + if (data->triminfo_base)
>> + iounmap(data->triminfo_base);
>> +
>> clk_unprepare(data->clk);
>>
>> if (!IS_ERR(data->regulator))
>> --
>> 1.7.9.5
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>> the body of a message to [email protected]
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>> Please read the FAQ at http://www.tux.org/lkml/
--
Shine bright,
(: Nav :)
Hi Naveen,
On Wed, Aug 28, 2013 at 11:49 AM, Naveen Krishna Ch
<[email protected]> wrote:
> On 28 August 2013 11:33, amit daniel kachhap <[email protected]> wrote:
>> Hi Naveen
>>
>> On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
>> <[email protected]> wrote:
>>> This patch adds code to handle the misplaced TRIMINFO register
>>> incase of Exynos5420.
>>>
>>> On Exynos5420 we have a TRIMINFO register being misplaced for
>>> TMU channels 2, 3 and 4
>>>
>>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>>
>>> The misplaced register address is passed through devicetree and
>>> map it seperately during probe.
>>> Also, adds the documentation under devicetree/bindings/thermal/
>>>
>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>>> ---
>>> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
>>> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
>>> 2 files changed, 49 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>> index 284f530..e818473 100644
>>> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>> @@ -7,12 +7,21 @@
>>> "samsung,exynos4210-tmu"
>>> "samsung,exynos5250-tmu"
>>> "samsung,exynos5440-tmu"
>>> + "samsung,exynos5420-tmu"
>>> - interrupt-parent : The phandle for the interrupt controller
>>> - reg : Address range of the thermal registers. For soc's which has multiple
>>> instances of TMU and some registers are shared across all TMU's like
>>> interrupt related then 2 set of register has to supplied. First set
>>> belongs to each instance of TMU and second set belongs to common TMU
>>> registers.
>>> +
>>> + ** NOTE FOR EXYNOS5420 **
>>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>>> +
>>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>>> +
>>> - interrupts : Should contain interrupt for thermal system
>>> - clocks : The main clock for TMU device
>>> - clock-names : Thermal system clock name
>>> @@ -43,6 +52,18 @@ Example 2):
>>> clock-names = "tmu_apbif";
>>> };
>>>
>>> +Example 3): In case of Exynos5420 TMU channel 3
>>> +
>>> + /* tmu for CPU3 */
>>> + tmu@1006c000 {
>>> + compatible = "samsung,exynos5420-tmu";
>>> + /* 2nd reg is for the misplaced TRIMINFO register */
>>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>>> + interrupts = <0 185 0>;
>>> + clocks = <&clock 318>;
>>> + clock-names = "tmu_apbif";
>>> + };
>>> +
>>> Note: For multi-instance tmu each instance should have an alias correctly
>>> numbered in "aliases" node.
>>>
>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>>> index bfdfbd6..f95844e 100644
>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>>> @@ -42,6 +42,7 @@
>>> * @pdata: pointer to the tmu platform/configuration data
>>> * @base: base address of the single instance of the TMU controller.
>>> * @base_common: base address of the common registers of the TMU controller.
>>> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
>>
>> Instead of creating this new field you can re-use base_common for
>> accessing the second set of register for misplaced triminfo address.
>> Also you can rename this variable as base_second.
>
> The purpose and the meaning of the fields are entirely different.
> The triminfo is a hardware bug present only in Exynos5420
My point is that for a bug a new field does not seem good as driver is
common across many Socs. Even In case of 5440 the common base can be
generalized and considered as second base address and documentation
can be updated accordingly. Also change the flag SHARED_MEMORY to
ADDRESS_TWO.
> and the common registers are available only on Exynos5440 i guess.
>
> IMHO, reusing is not a nice idea.
> I'm willing to modify the code if there is a better idea.
>>
>>> * @irq: irq number of the TMU controller.
>>> * @soc: id of the SOC type.
>>> * @irq_work: pointer to the irq work structure.
>>> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
>>> struct exynos_tmu_platform_data *pdata;
>>> void __iomem *base;
>>> void __iomem *base_common;
>>> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
>>> int irq;
>>> enum soc_type soc;
>>> struct work_struct irq_work;
>>> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>>> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>>> }
>>> } else {
>>> - trim_info = readl(data->base + reg->triminfo_data);
>>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>>> + if (data->triminfo_base)
>>> + trim_info = readl(data->triminfo_base +
>>> + reg->triminfo_data);
>>> + else
>>> + trim_info = readl(data->base + reg->triminfo_data);
>>> }
>>> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>>> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>>> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
>>> * Check if the TMU shares some registers and then try to map the
>>> * memory of common registers.
>>> */
>>> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
>>> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
>>> + /* For Exynos5420 The misplaced TERMINFO register address will
>>> + * be passed from device tree node.
>>> + *
>>> + * We cannot use devm_request_and_ioremap, as the base address
>>> + * over laps with the address space of the other TMU channel.
>>> + * Check Documentation for details
>>> + */
>>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>>> return 0;
>>> + }
>> In the below code, remove the request resource API for common_base and
>> use simple of_iomap API.
>
> That will be a separate fix patch. Will submit separately,
> This patchset is to add exynos5420 support
Sorry for my earlier comment. Actually my suggested change is not
needed as the APIs used don't bind resources. Just enable the
SHARED_MEMORY flag and it should be fine.
>
> Is the res_size for the common registers fixed ?
Yes in 5440 it is same.
Thanks,
Amit Daniel
>
>>
>> Thanks,
>> Amit Daniel
>>>
>>> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
>>> dev_err(&pdev->dev, "failed to get Resource 1\n");
>>> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>>> if (IS_ERR(data->clk)) {
>>> dev_err(&pdev->dev, "Failed to get clock\n");
>>> - return PTR_ERR(data->clk);
>>> + ret = PTR_ERR(data->clk);
>>> + goto err_triminfo_base;
>>> }
>>>
>>> ret = clk_prepare(data->clk);
>>> if (ret)
>>> - return ret;
>>> + goto err_triminfo_base;
>>>
>>> if (pdata->type == SOC_ARCH_EXYNOS ||
>>> pdata->type == SOC_ARCH_EXYNOS4210 ||
>>> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>> }
>>>
>>> return 0;
>>> +
>>> err_clk:
>>> clk_unprepare(data->clk);
>>> return ret;
>>> +err_triminfo_base:
>>> + if (data->triminfo_base)
>>> + iounmap(data->triminfo_base);
>>> }
>>>
>>> static int exynos_tmu_remove(struct platform_device *pdev)
>>> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>>
>>> exynos_unregister_thermal(data->reg_conf);
>>>
>>> + if (data->triminfo_base)
>>> + iounmap(data->triminfo_base);
>>> +
>>> clk_unprepare(data->clk);
>>>
>>> if (!IS_ERR(data->regulator))
>>> --
>>> 1.7.9.5
>>>
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>>> the body of a message to [email protected]
>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>> Please read the FAQ at http://www.tux.org/lkml/
>
>
>
> --
> Shine bright,
> (: Nav :)
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Aug 28, 2013 at 11:49 AM, Naveen Krishna Ch
<[email protected]> wrote:
> On 28 August 2013 11:33, amit daniel kachhap <[email protected]> wrote:
>> Hi Naveen
>>
>> On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
>> <[email protected]> wrote:
>>> This patch adds code to handle the misplaced TRIMINFO register
>>> incase of Exynos5420.
>>>
>>> On Exynos5420 we have a TRIMINFO register being misplaced for
>>> TMU channels 2, 3 and 4
>>>
>>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>>
>>> The misplaced register address is passed through devicetree and
>>> map it seperately during probe.
>>> Also, adds the documentation under devicetree/bindings/thermal/
>>>
>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>>> ---
>>> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
>>> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
>>> 2 files changed, 49 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>> index 284f530..e818473 100644
>>> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>> @@ -7,12 +7,21 @@
>>> "samsung,exynos4210-tmu"
>>> "samsung,exynos5250-tmu"
>>> "samsung,exynos5440-tmu"
>>> + "samsung,exynos5420-tmu"
>>> - interrupt-parent : The phandle for the interrupt controller
>>> - reg : Address range of the thermal registers. For soc's which has multiple
>>> instances of TMU and some registers are shared across all TMU's like
>>> interrupt related then 2 set of register has to supplied. First set
>>> belongs to each instance of TMU and second set belongs to common TMU
>>> registers.
>>> +
>>> + ** NOTE FOR EXYNOS5420 **
>>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>>> +
>>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>>> +
>>> - interrupts : Should contain interrupt for thermal system
>>> - clocks : The main clock for TMU device
>>> - clock-names : Thermal system clock name
>>> @@ -43,6 +52,18 @@ Example 2):
>>> clock-names = "tmu_apbif";
>>> };
>>>
>>> +Example 3): In case of Exynos5420 TMU channel 3
>>> +
>>> + /* tmu for CPU3 */
>>> + tmu@1006c000 {
>>> + compatible = "samsung,exynos5420-tmu";
>>> + /* 2nd reg is for the misplaced TRIMINFO register */
>>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>>> + interrupts = <0 185 0>;
>>> + clocks = <&clock 318>;
>>> + clock-names = "tmu_apbif";
>>> + };
>>> +
>>> Note: For multi-instance tmu each instance should have an alias correctly
>>> numbered in "aliases" node.
>>>
>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>>> index bfdfbd6..f95844e 100644
>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>>> @@ -42,6 +42,7 @@
>>> * @pdata: pointer to the tmu platform/configuration data
>>> * @base: base address of the single instance of the TMU controller.
>>> * @base_common: base address of the common registers of the TMU controller.
>>> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
>>
>> Instead of creating this new field you can re-use base_common for
>> accessing the second set of register for misplaced triminfo address.
>> Also you can rename this variable as base_second.
>
> The purpose and the meaning of the fields are entirely different.
> The triminfo is a hardware bug present only in Exynos5420
> and the common registers are available only on Exynos5440 i guess.
>
> IMHO, reusing is not a nice idea.
> I'm willing to modify the code if there is a better idea.
>>
>>> * @irq: irq number of the TMU controller.
>>> * @soc: id of the SOC type.
>>> * @irq_work: pointer to the irq work structure.
>>> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
>>> struct exynos_tmu_platform_data *pdata;
>>> void __iomem *base;
>>> void __iomem *base_common;
>>> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
>>> int irq;
>>> enum soc_type soc;
>>> struct work_struct irq_work;
>>> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>>> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>>> }
>>> } else {
>>> - trim_info = readl(data->base + reg->triminfo_data);
>>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>>> + if (data->triminfo_base)
>>> + trim_info = readl(data->triminfo_base +
>>> + reg->triminfo_data);
>>> + else
>>> + trim_info = readl(data->base + reg->triminfo_data);
>>> }
>>> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>>> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>>> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
>>> * Check if the TMU shares some registers and then try to map the
>>> * memory of common registers.
>>> */
>>> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
>>> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
>>> + /* For Exynos5420 The misplaced TERMINFO register address will
>>> + * be passed from device tree node.
>>> + *
>>> + * We cannot use devm_request_and_ioremap, as the base address
>>> + * over laps with the address space of the other TMU channel.
>>> + * Check Documentation for details
>>> + */
>>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>>> return 0;
>>> + }
>> In the below code, remove the request resource API for common_base and
>> use simple of_iomap API.
>
> That will be a separate fix patch. Will submit separately,
> This patchset is to add exynos5420 support
>
> Is the res_size for the common registers fixed ?
>
>>
>> Thanks,
>> Amit Daniel
>>>
>>> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
>>> dev_err(&pdev->dev, "failed to get Resource 1\n");
>>> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>>> if (IS_ERR(data->clk)) {
>>> dev_err(&pdev->dev, "Failed to get clock\n");
>>> - return PTR_ERR(data->clk);
>>> + ret = PTR_ERR(data->clk);
>>> + goto err_triminfo_base;
>>> }
>>>
>>> ret = clk_prepare(data->clk);
>>> if (ret)
>>> - return ret;
>>> + goto err_triminfo_base;
>>>
>>> if (pdata->type == SOC_ARCH_EXYNOS ||
>>> pdata->type == SOC_ARCH_EXYNOS4210 ||
>>> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>> }
>>>
>>> return 0;
>>> +
>>> err_clk:
>>> clk_unprepare(data->clk);
>>> return ret;
>>> +err_triminfo_base:
>>> + if (data->triminfo_base)
>>> + iounmap(data->triminfo_base);
>>> }
>>>
>>> static int exynos_tmu_remove(struct platform_device *pdev)
>>> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>>
>>> exynos_unregister_thermal(data->reg_conf);
>>>
>>> + if (data->triminfo_base)
>>> + iounmap(data->triminfo_base);
>>> +
>>> clk_unprepare(data->clk);
>>>
>>> if (!IS_ERR(data->regulator))
>>> --
>>> 1.7.9.5
>>>
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>>> the body of a message to [email protected]
>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>> Please read the FAQ at http://www.tux.org/lkml/
>
>
>
> --
> Shine bright,
> (: Nav :)
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On 28 August 2013 14:13, amit daniel kachhap <[email protected]> wrote:
> Hi Naveen,
>
> On Wed, Aug 28, 2013 at 11:49 AM, Naveen Krishna Ch
> <[email protected]> wrote:
>> On 28 August 2013 11:33, amit daniel kachhap <[email protected]> wrote:
>>> Hi Naveen
>>>
>>> On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
>>> <[email protected]> wrote:
>>>> This patch adds code to handle the misplaced TRIMINFO register
>>>> incase of Exynos5420.
>>>>
>>>> On Exynos5420 we have a TRIMINFO register being misplaced for
>>>> TMU channels 2, 3 and 4
>>>>
>>>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>>>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>>>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>>>
>>>> The misplaced register address is passed through devicetree and
>>>> map it seperately during probe.
>>>> Also, adds the documentation under devicetree/bindings/thermal/
>>>>
>>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>>>> ---
>>>> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
>>>> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
>>>> 2 files changed, 49 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>> index 284f530..e818473 100644
>>>> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>> @@ -7,12 +7,21 @@
>>>> "samsung,exynos4210-tmu"
>>>> "samsung,exynos5250-tmu"
>>>> "samsung,exynos5440-tmu"
>>>> + "samsung,exynos5420-tmu"
>>>> - interrupt-parent : The phandle for the interrupt controller
>>>> - reg : Address range of the thermal registers. For soc's which has multiple
>>>> instances of TMU and some registers are shared across all TMU's like
>>>> interrupt related then 2 set of register has to supplied. First set
>>>> belongs to each instance of TMU and second set belongs to common TMU
>>>> registers.
>>>> +
>>>> + ** NOTE FOR EXYNOS5420 **
>>>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>>>> +
>>>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>>>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>>>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>>>> +
>>>> - interrupts : Should contain interrupt for thermal system
>>>> - clocks : The main clock for TMU device
>>>> - clock-names : Thermal system clock name
>>>> @@ -43,6 +52,18 @@ Example 2):
>>>> clock-names = "tmu_apbif";
>>>> };
>>>>
>>>> +Example 3): In case of Exynos5420 TMU channel 3
>>>> +
>>>> + /* tmu for CPU3 */
>>>> + tmu@1006c000 {
>>>> + compatible = "samsung,exynos5420-tmu";
>>>> + /* 2nd reg is for the misplaced TRIMINFO register */
>>>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>>>> + interrupts = <0 185 0>;
>>>> + clocks = <&clock 318>;
>>>> + clock-names = "tmu_apbif";
>>>> + };
>>>> +
>>>> Note: For multi-instance tmu each instance should have an alias correctly
>>>> numbered in "aliases" node.
>>>>
>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>>>> index bfdfbd6..f95844e 100644
>>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>>>> @@ -42,6 +42,7 @@
>>>> * @pdata: pointer to the tmu platform/configuration data
>>>> * @base: base address of the single instance of the TMU controller.
>>>> * @base_common: base address of the common registers of the TMU controller.
>>>> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
>>>
>>> Instead of creating this new field you can re-use base_common for
>>> accessing the second set of register for misplaced triminfo address.
>>> Also you can rename this variable as base_second.
>>
>> The purpose and the meaning of the fields are entirely different.
>> The triminfo is a hardware bug present only in Exynos5420
> My point is that for a bug a new field does not seem good as driver is
> common across many Socs. Even In case of 5440 the common base can be
> generalized and considered as second base address and documentation
> can be updated accordingly. Also change the flag SHARED_MEMORY to
> ADDRESS_TWO.
Why ADDRESS_TWO, are we expecting ADDRESS_THREE as well.
>> and the common registers are available only on Exynos5440 i guess.
>>
>> IMHO, reusing is not a nice idea.
>> I'm willing to modify the code if there is a better idea.
>>>
>>>> * @irq: irq number of the TMU controller.
>>>> * @soc: id of the SOC type.
>>>> * @irq_work: pointer to the irq work structure.
>>>> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
>>>> struct exynos_tmu_platform_data *pdata;
>>>> void __iomem *base;
>>>> void __iomem *base_common;
>>>> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
>>>> int irq;
>>>> enum soc_type soc;
>>>> struct work_struct irq_work;
>>>> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>>>> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>>>> }
>>>> } else {
>>>> - trim_info = readl(data->base + reg->triminfo_data);
>>>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>>>> + if (data->triminfo_base)
>>>> + trim_info = readl(data->triminfo_base +
>>>> + reg->triminfo_data);
>>>> + else
>>>> + trim_info = readl(data->base + reg->triminfo_data);
>>>> }
>>>> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>>>> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>>>> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
>>>> * Check if the TMU shares some registers and then try to map the
>>>> * memory of common registers.
>>>> */
>>>> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
>>>> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
>>>> + /* For Exynos5420 The misplaced TERMINFO register address will
>>>> + * be passed from device tree node.
>>>> + *
>>>> + * We cannot use devm_request_and_ioremap, as the base address
>>>> + * over laps with the address space of the other TMU channel.
>>>> + * Check Documentation for details
>>>> + */
>>>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>>>> return 0;
>>>> + }
>>> In the below code, remove the request resource API for common_base and
>>> use simple of_iomap API.
>>
>> That will be a separate fix patch. Will submit separately,
>> This patchset is to add exynos5420 support
>
> Sorry for my earlier comment. Actually my suggested change is not
> needed as the APIs used don't bind resources. Just enable the
> SHARED_MEMORY flag and it should be fine.
>
>
>>
>> Is the res_size for the common registers fixed ?
> Yes in 5440 it is same.
>
> Thanks,
> Amit Daniel
>
>>
>>>
>>> Thanks,
>>> Amit Daniel
>>>>
>>>> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
>>>> dev_err(&pdev->dev, "failed to get Resource 1\n");
>>>> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>>>> if (IS_ERR(data->clk)) {
>>>> dev_err(&pdev->dev, "Failed to get clock\n");
>>>> - return PTR_ERR(data->clk);
>>>> + ret = PTR_ERR(data->clk);
>>>> + goto err_triminfo_base;
>>>> }
>>>>
>>>> ret = clk_prepare(data->clk);
>>>> if (ret)
>>>> - return ret;
>>>> + goto err_triminfo_base;
>>>>
>>>> if (pdata->type == SOC_ARCH_EXYNOS ||
>>>> pdata->type == SOC_ARCH_EXYNOS4210 ||
>>>> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>> }
>>>>
>>>> return 0;
>>>> +
>>>> err_clk:
>>>> clk_unprepare(data->clk);
>>>> return ret;
>>>> +err_triminfo_base:
>>>> + if (data->triminfo_base)
>>>> + iounmap(data->triminfo_base);
>>>> }
>>>>
>>>> static int exynos_tmu_remove(struct platform_device *pdev)
>>>> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>>>
>>>> exynos_unregister_thermal(data->reg_conf);
>>>>
>>>> + if (data->triminfo_base)
>>>> + iounmap(data->triminfo_base);
>>>> +
>>>> clk_unprepare(data->clk);
>>>>
>>>> if (!IS_ERR(data->regulator))
>>>> --
>>>> 1.7.9.5
>>>>
>>>> --
>>>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>>>> the body of a message to [email protected]
>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>> Please read the FAQ at http://www.tux.org/lkml/
>>
>>
>>
>> --
>> Shine bright,
>> (: Nav :)
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
>> the body of a message to [email protected]
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
> On Wed, Aug 28, 2013 at 11:49 AM, Naveen Krishna Ch
> <[email protected]> wrote:
>> On 28 August 2013 11:33, amit daniel kachhap <[email protected]> wrote:
>>> Hi Naveen
>>>
>>> On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
>>> <[email protected]> wrote:
>>>> This patch adds code to handle the misplaced TRIMINFO register
>>>> incase of Exynos5420.
>>>>
>>>> On Exynos5420 we have a TRIMINFO register being misplaced for
>>>> TMU channels 2, 3 and 4
>>>>
>>>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>>>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>>>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>>>
>>>> The misplaced register address is passed through devicetree and
>>>> map it seperately during probe.
>>>> Also, adds the documentation under devicetree/bindings/thermal/
>>>>
>>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>>>> ---
>>>> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
>>>> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
>>>> 2 files changed, 49 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>> index 284f530..e818473 100644
>>>> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>> @@ -7,12 +7,21 @@
>>>> "samsung,exynos4210-tmu"
>>>> "samsung,exynos5250-tmu"
>>>> "samsung,exynos5440-tmu"
>>>> + "samsung,exynos5420-tmu"
>>>> - interrupt-parent : The phandle for the interrupt controller
>>>> - reg : Address range of the thermal registers. For soc's which has multiple
>>>> instances of TMU and some registers are shared across all TMU's like
>>>> interrupt related then 2 set of register has to supplied. First set
>>>> belongs to each instance of TMU and second set belongs to common TMU
>>>> registers.
>>>> +
>>>> + ** NOTE FOR EXYNOS5420 **
>>>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>>>> +
>>>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>>>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>>>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>>>> +
>>>> - interrupts : Should contain interrupt for thermal system
>>>> - clocks : The main clock for TMU device
>>>> - clock-names : Thermal system clock name
>>>> @@ -43,6 +52,18 @@ Example 2):
>>>> clock-names = "tmu_apbif";
>>>> };
>>>>
>>>> +Example 3): In case of Exynos5420 TMU channel 3
>>>> +
>>>> + /* tmu for CPU3 */
>>>> + tmu@1006c000 {
>>>> + compatible = "samsung,exynos5420-tmu";
>>>> + /* 2nd reg is for the misplaced TRIMINFO register */
>>>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>>>> + interrupts = <0 185 0>;
>>>> + clocks = <&clock 318>;
>>>> + clock-names = "tmu_apbif";
>>>> + };
>>>> +
>>>> Note: For multi-instance tmu each instance should have an alias correctly
>>>> numbered in "aliases" node.
>>>>
>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>>>> index bfdfbd6..f95844e 100644
>>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>>>> @@ -42,6 +42,7 @@
>>>> * @pdata: pointer to the tmu platform/configuration data
>>>> * @base: base address of the single instance of the TMU controller.
>>>> * @base_common: base address of the common registers of the TMU controller.
>>>> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
>>>
>>> Instead of creating this new field you can re-use base_common for
>>> accessing the second set of register for misplaced triminfo address.
>>> Also you can rename this variable as base_second.
>>
>> The purpose and the meaning of the fields are entirely different.
>> The triminfo is a hardware bug present only in Exynos5420
>> and the common registers are available only on Exynos5440 i guess.
>>
>> IMHO, reusing is not a nice idea.
>> I'm willing to modify the code if there is a better idea.
>>>
>>>> * @irq: irq number of the TMU controller.
>>>> * @soc: id of the SOC type.
>>>> * @irq_work: pointer to the irq work structure.
>>>> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
>>>> struct exynos_tmu_platform_data *pdata;
>>>> void __iomem *base;
>>>> void __iomem *base_common;
>>>> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
>>>> int irq;
>>>> enum soc_type soc;
>>>> struct work_struct irq_work;
>>>> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>>>> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>>>> }
>>>> } else {
>>>> - trim_info = readl(data->base + reg->triminfo_data);
>>>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>>>> + if (data->triminfo_base)
>>>> + trim_info = readl(data->triminfo_base +
>>>> + reg->triminfo_data);
>>>> + else
>>>> + trim_info = readl(data->base + reg->triminfo_data);
>>>> }
>>>> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>>>> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>>>> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
>>>> * Check if the TMU shares some registers and then try to map the
>>>> * memory of common registers.
>>>> */
>>>> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
>>>> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
>>>> + /* For Exynos5420 The misplaced TERMINFO register address will
>>>> + * be passed from device tree node.
>>>> + *
>>>> + * We cannot use devm_request_and_ioremap, as the base address
>>>> + * over laps with the address space of the other TMU channel.
>>>> + * Check Documentation for details
>>>> + */
>>>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>>>> return 0;
>>>> + }
>>> In the below code, remove the request resource API for common_base and
>>> use simple of_iomap API.
>>
>> That will be a separate fix patch. Will submit separately,
>> This patchset is to add exynos5420 support
>>
>> Is the res_size for the common registers fixed ?
>>
>>>
>>> Thanks,
>>> Amit Daniel
>>>>
>>>> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
>>>> dev_err(&pdev->dev, "failed to get Resource 1\n");
>>>> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>>>> if (IS_ERR(data->clk)) {
>>>> dev_err(&pdev->dev, "Failed to get clock\n");
>>>> - return PTR_ERR(data->clk);
>>>> + ret = PTR_ERR(data->clk);
>>>> + goto err_triminfo_base;
>>>> }
>>>>
>>>> ret = clk_prepare(data->clk);
>>>> if (ret)
>>>> - return ret;
>>>> + goto err_triminfo_base;
>>>>
>>>> if (pdata->type == SOC_ARCH_EXYNOS ||
>>>> pdata->type == SOC_ARCH_EXYNOS4210 ||
>>>> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>> }
>>>>
>>>> return 0;
>>>> +
>>>> err_clk:
>>>> clk_unprepare(data->clk);
>>>> return ret;
>>>> +err_triminfo_base:
>>>> + if (data->triminfo_base)
>>>> + iounmap(data->triminfo_base);
>>>> }
>>>>
>>>> static int exynos_tmu_remove(struct platform_device *pdev)
>>>> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>>>
>>>> exynos_unregister_thermal(data->reg_conf);
>>>>
>>>> + if (data->triminfo_base)
>>>> + iounmap(data->triminfo_base);
>>>> +
>>>> clk_unprepare(data->clk);
>>>>
>>>> if (!IS_ERR(data->regulator))
>>>> --
>>>> 1.7.9.5
>>>>
>>>> --
>>>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>>>> the body of a message to [email protected]
>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>> Please read the FAQ at http://www.tux.org/lkml/
>>
>>
>>
>> --
>> Shine bright,
>> (: Nav :)
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
>> the body of a message to [email protected]
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Shine bright,
(: Nav :)
On Wed, Aug 28, 2013 at 2:27 PM, Naveen Krishna Ch
<[email protected]> wrote:
> On 28 August 2013 14:13, amit daniel kachhap <[email protected]> wrote:
>> Hi Naveen,
>>
>> On Wed, Aug 28, 2013 at 11:49 AM, Naveen Krishna Ch
>> <[email protected]> wrote:
>>> On 28 August 2013 11:33, amit daniel kachhap <[email protected]> wrote:
>>>> Hi Naveen
>>>>
>>>> On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
>>>> <[email protected]> wrote:
>>>>> This patch adds code to handle the misplaced TRIMINFO register
>>>>> incase of Exynos5420.
>>>>>
>>>>> On Exynos5420 we have a TRIMINFO register being misplaced for
>>>>> TMU channels 2, 3 and 4
>>>>>
>>>>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>>>>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>>>>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>>>>
>>>>> The misplaced register address is passed through devicetree and
>>>>> map it seperately during probe.
>>>>> Also, adds the documentation under devicetree/bindings/thermal/
>>>>>
>>>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>>>>> ---
>>>>> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
>>>>> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
>>>>> 2 files changed, 49 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> index 284f530..e818473 100644
>>>>> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> @@ -7,12 +7,21 @@
>>>>> "samsung,exynos4210-tmu"
>>>>> "samsung,exynos5250-tmu"
>>>>> "samsung,exynos5440-tmu"
>>>>> + "samsung,exynos5420-tmu"
>>>>> - interrupt-parent : The phandle for the interrupt controller
>>>>> - reg : Address range of the thermal registers. For soc's which has multiple
>>>>> instances of TMU and some registers are shared across all TMU's like
>>>>> interrupt related then 2 set of register has to supplied. First set
>>>>> belongs to each instance of TMU and second set belongs to common TMU
>>>>> registers.
>>>>> +
>>>>> + ** NOTE FOR EXYNOS5420 **
>>>>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>>>>> +
>>>>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>>>>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>>>>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>>>>> +
>>>>> - interrupts : Should contain interrupt for thermal system
>>>>> - clocks : The main clock for TMU device
>>>>> - clock-names : Thermal system clock name
>>>>> @@ -43,6 +52,18 @@ Example 2):
>>>>> clock-names = "tmu_apbif";
>>>>> };
>>>>>
>>>>> +Example 3): In case of Exynos5420 TMU channel 3
>>>>> +
>>>>> + /* tmu for CPU3 */
>>>>> + tmu@1006c000 {
>>>>> + compatible = "samsung,exynos5420-tmu";
>>>>> + /* 2nd reg is for the misplaced TRIMINFO register */
>>>>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>>>>> + interrupts = <0 185 0>;
>>>>> + clocks = <&clock 318>;
>>>>> + clock-names = "tmu_apbif";
>>>>> + };
>>>>> +
>>>>> Note: For multi-instance tmu each instance should have an alias correctly
>>>>> numbered in "aliases" node.
>>>>>
>>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>>>>> index bfdfbd6..f95844e 100644
>>>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>>>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>>>>> @@ -42,6 +42,7 @@
>>>>> * @pdata: pointer to the tmu platform/configuration data
>>>>> * @base: base address of the single instance of the TMU controller.
>>>>> * @base_common: base address of the common registers of the TMU controller.
>>>>> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
>>>>
>>>> Instead of creating this new field you can re-use base_common for
>>>> accessing the second set of register for misplaced triminfo address.
>>>> Also you can rename this variable as base_second.
>>>
>>> The purpose and the meaning of the fields are entirely different.
>>> The triminfo is a hardware bug present only in Exynos5420
>> My point is that for a bug a new field does not seem good as driver is
>> common across many Socs. Even In case of 5440 the common base can be
>> generalized and considered as second base address and documentation
>> can be updated accordingly. Also change the flag SHARED_MEMORY to
>> ADDRESS_TWO.
>
> Why ADDRESS_TWO, are we expecting ADDRESS_THREE as well.
or ADDRESS_MULTIPLE :)
>
>>> and the common registers are available only on Exynos5440 i guess.
>>>
>>> IMHO, reusing is not a nice idea.
>>> I'm willing to modify the code if there is a better idea.
>>>>
>>>>> * @irq: irq number of the TMU controller.
>>>>> * @soc: id of the SOC type.
>>>>> * @irq_work: pointer to the irq work structure.
>>>>> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
>>>>> struct exynos_tmu_platform_data *pdata;
>>>>> void __iomem *base;
>>>>> void __iomem *base_common;
>>>>> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
>>>>> int irq;
>>>>> enum soc_type soc;
>>>>> struct work_struct irq_work;
>>>>> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>>>>> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>>>>> }
>>>>> } else {
>>>>> - trim_info = readl(data->base + reg->triminfo_data);
>>>>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>>>>> + if (data->triminfo_base)
>>>>> + trim_info = readl(data->triminfo_base +
>>>>> + reg->triminfo_data);
>>>>> + else
>>>>> + trim_info = readl(data->base + reg->triminfo_data);
>>>>> }
>>>>> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>>>>> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>>>>> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
>>>>> * Check if the TMU shares some registers and then try to map the
>>>>> * memory of common registers.
>>>>> */
>>>>> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
>>>>> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
>>>>> + /* For Exynos5420 The misplaced TERMINFO register address will
>>>>> + * be passed from device tree node.
>>>>> + *
>>>>> + * We cannot use devm_request_and_ioremap, as the base address
>>>>> + * over laps with the address space of the other TMU channel.
>>>>> + * Check Documentation for details
>>>>> + */
>>>>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>>>>> return 0;
>>>>> + }
>>>> In the below code, remove the request resource API for common_base and
>>>> use simple of_iomap API.
>>>
>>> That will be a separate fix patch. Will submit separately,
>>> This patchset is to add exynos5420 support
>>
>> Sorry for my earlier comment. Actually my suggested change is not
>> needed as the APIs used don't bind resources. Just enable the
>> SHARED_MEMORY flag and it should be fine.
>>
>>
>>>
>>> Is the res_size for the common registers fixed ?
>> Yes in 5440 it is same.
>>
>> Thanks,
>> Amit Daniel
>>
>>>
>>>>
>>>> Thanks,
>>>> Amit Daniel
>>>>>
>>>>> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
>>>>> dev_err(&pdev->dev, "failed to get Resource 1\n");
>>>>> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>>>>> if (IS_ERR(data->clk)) {
>>>>> dev_err(&pdev->dev, "Failed to get clock\n");
>>>>> - return PTR_ERR(data->clk);
>>>>> + ret = PTR_ERR(data->clk);
>>>>> + goto err_triminfo_base;
>>>>> }
>>>>>
>>>>> ret = clk_prepare(data->clk);
>>>>> if (ret)
>>>>> - return ret;
>>>>> + goto err_triminfo_base;
>>>>>
>>>>> if (pdata->type == SOC_ARCH_EXYNOS ||
>>>>> pdata->type == SOC_ARCH_EXYNOS4210 ||
>>>>> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>>> }
>>>>>
>>>>> return 0;
>>>>> +
>>>>> err_clk:
>>>>> clk_unprepare(data->clk);
>>>>> return ret;
>>>>> +err_triminfo_base:
>>>>> + if (data->triminfo_base)
>>>>> + iounmap(data->triminfo_base);
>>>>> }
>>>>>
>>>>> static int exynos_tmu_remove(struct platform_device *pdev)
>>>>> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>>>>
>>>>> exynos_unregister_thermal(data->reg_conf);
>>>>>
>>>>> + if (data->triminfo_base)
>>>>> + iounmap(data->triminfo_base);
>>>>> +
>>>>> clk_unprepare(data->clk);
>>>>>
>>>>> if (!IS_ERR(data->regulator))
>>>>> --
>>>>> 1.7.9.5
>>>>>
>>>>> --
>>>>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>>>>> the body of a message to [email protected]
>>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>>> Please read the FAQ at http://www.tux.org/lkml/
>>>
>>>
>>>
>>> --
>>> Shine bright,
>>> (: Nav :)
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
>>> the body of a message to [email protected]
>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
>> On Wed, Aug 28, 2013 at 11:49 AM, Naveen Krishna Ch
>> <[email protected]> wrote:
>>> On 28 August 2013 11:33, amit daniel kachhap <[email protected]> wrote:
>>>> Hi Naveen
>>>>
>>>> On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
>>>> <[email protected]> wrote:
>>>>> This patch adds code to handle the misplaced TRIMINFO register
>>>>> incase of Exynos5420.
>>>>>
>>>>> On Exynos5420 we have a TRIMINFO register being misplaced for
>>>>> TMU channels 2, 3 and 4
>>>>>
>>>>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>>>>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>>>>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>>>>
>>>>> The misplaced register address is passed through devicetree and
>>>>> map it seperately during probe.
>>>>> Also, adds the documentation under devicetree/bindings/thermal/
>>>>>
>>>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>>>>> ---
>>>>> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
>>>>> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
>>>>> 2 files changed, 49 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> index 284f530..e818473 100644
>>>>> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> @@ -7,12 +7,21 @@
>>>>> "samsung,exynos4210-tmu"
>>>>> "samsung,exynos5250-tmu"
>>>>> "samsung,exynos5440-tmu"
>>>>> + "samsung,exynos5420-tmu"
>>>>> - interrupt-parent : The phandle for the interrupt controller
>>>>> - reg : Address range of the thermal registers. For soc's which has multiple
>>>>> instances of TMU and some registers are shared across all TMU's like
>>>>> interrupt related then 2 set of register has to supplied. First set
>>>>> belongs to each instance of TMU and second set belongs to common TMU
>>>>> registers.
>>>>> +
>>>>> + ** NOTE FOR EXYNOS5420 **
>>>>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>>>>> +
>>>>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>>>>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>>>>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>>>>> +
>>>>> - interrupts : Should contain interrupt for thermal system
>>>>> - clocks : The main clock for TMU device
>>>>> - clock-names : Thermal system clock name
>>>>> @@ -43,6 +52,18 @@ Example 2):
>>>>> clock-names = "tmu_apbif";
>>>>> };
>>>>>
>>>>> +Example 3): In case of Exynos5420 TMU channel 3
>>>>> +
>>>>> + /* tmu for CPU3 */
>>>>> + tmu@1006c000 {
>>>>> + compatible = "samsung,exynos5420-tmu";
>>>>> + /* 2nd reg is for the misplaced TRIMINFO register */
>>>>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>>>>> + interrupts = <0 185 0>;
>>>>> + clocks = <&clock 318>;
>>>>> + clock-names = "tmu_apbif";
>>>>> + };
>>>>> +
>>>>> Note: For multi-instance tmu each instance should have an alias correctly
>>>>> numbered in "aliases" node.
>>>>>
>>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>>>>> index bfdfbd6..f95844e 100644
>>>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>>>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>>>>> @@ -42,6 +42,7 @@
>>>>> * @pdata: pointer to the tmu platform/configuration data
>>>>> * @base: base address of the single instance of the TMU controller.
>>>>> * @base_common: base address of the common registers of the TMU controller.
>>>>> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
>>>>
>>>> Instead of creating this new field you can re-use base_common for
>>>> accessing the second set of register for misplaced triminfo address.
>>>> Also you can rename this variable as base_second.
>>>
>>> The purpose and the meaning of the fields are entirely different.
>>> The triminfo is a hardware bug present only in Exynos5420
>>> and the common registers are available only on Exynos5440 i guess.
>>>
>>> IMHO, reusing is not a nice idea.
>>> I'm willing to modify the code if there is a better idea.
>>>>
>>>>> * @irq: irq number of the TMU controller.
>>>>> * @soc: id of the SOC type.
>>>>> * @irq_work: pointer to the irq work structure.
>>>>> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
>>>>> struct exynos_tmu_platform_data *pdata;
>>>>> void __iomem *base;
>>>>> void __iomem *base_common;
>>>>> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
>>>>> int irq;
>>>>> enum soc_type soc;
>>>>> struct work_struct irq_work;
>>>>> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>>>>> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>>>>> }
>>>>> } else {
>>>>> - trim_info = readl(data->base + reg->triminfo_data);
>>>>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>>>>> + if (data->triminfo_base)
>>>>> + trim_info = readl(data->triminfo_base +
>>>>> + reg->triminfo_data);
>>>>> + else
>>>>> + trim_info = readl(data->base + reg->triminfo_data);
>>>>> }
>>>>> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>>>>> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>>>>> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
>>>>> * Check if the TMU shares some registers and then try to map the
>>>>> * memory of common registers.
>>>>> */
>>>>> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
>>>>> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
>>>>> + /* For Exynos5420 The misplaced TERMINFO register address will
>>>>> + * be passed from device tree node.
>>>>> + *
>>>>> + * We cannot use devm_request_and_ioremap, as the base address
>>>>> + * over laps with the address space of the other TMU channel.
>>>>> + * Check Documentation for details
>>>>> + */
>>>>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>>>>> return 0;
>>>>> + }
>>>> In the below code, remove the request resource API for common_base and
>>>> use simple of_iomap API.
>>>
>>> That will be a separate fix patch. Will submit separately,
>>> This patchset is to add exynos5420 support
>>>
>>> Is the res_size for the common registers fixed ?
>>>
>>>>
>>>> Thanks,
>>>> Amit Daniel
>>>>>
>>>>> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
>>>>> dev_err(&pdev->dev, "failed to get Resource 1\n");
>>>>> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>>>>> if (IS_ERR(data->clk)) {
>>>>> dev_err(&pdev->dev, "Failed to get clock\n");
>>>>> - return PTR_ERR(data->clk);
>>>>> + ret = PTR_ERR(data->clk);
>>>>> + goto err_triminfo_base;
>>>>> }
>>>>>
>>>>> ret = clk_prepare(data->clk);
>>>>> if (ret)
>>>>> - return ret;
>>>>> + goto err_triminfo_base;
>>>>>
>>>>> if (pdata->type == SOC_ARCH_EXYNOS ||
>>>>> pdata->type == SOC_ARCH_EXYNOS4210 ||
>>>>> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>>> }
>>>>>
>>>>> return 0;
>>>>> +
>>>>> err_clk:
>>>>> clk_unprepare(data->clk);
>>>>> return ret;
>>>>> +err_triminfo_base:
>>>>> + if (data->triminfo_base)
>>>>> + iounmap(data->triminfo_base);
>>>>> }
>>>>>
>>>>> static int exynos_tmu_remove(struct platform_device *pdev)
>>>>> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>>>>
>>>>> exynos_unregister_thermal(data->reg_conf);
>>>>>
>>>>> + if (data->triminfo_base)
>>>>> + iounmap(data->triminfo_base);
>>>>> +
>>>>> clk_unprepare(data->clk);
>>>>>
>>>>> if (!IS_ERR(data->regulator))
>>>>> --
>>>>> 1.7.9.5
>>>>>
>>>>> --
>>>>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>>>>> the body of a message to [email protected]
>>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>>> Please read the FAQ at http://www.tux.org/lkml/
>>>
>>>
>>>
>>> --
>>> Shine bright,
>>> (: Nav :)
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> --
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On Wed, Aug 28, 2013 at 2:27 PM, Naveen Krishna Ch
<[email protected]> wrote:
> On 28 August 2013 14:13, amit daniel kachhap <[email protected]> wrote:
>> Hi Naveen,
>>
>> On Wed, Aug 28, 2013 at 11:49 AM, Naveen Krishna Ch
>> <[email protected]> wrote:
>>> On 28 August 2013 11:33, amit daniel kachhap <[email protected]> wrote:
>>>> Hi Naveen
>>>>
>>>> On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
>>>> <[email protected]> wrote:
>>>>> This patch adds code to handle the misplaced TRIMINFO register
>>>>> incase of Exynos5420.
>>>>>
>>>>> On Exynos5420 we have a TRIMINFO register being misplaced for
>>>>> TMU channels 2, 3 and 4
>>>>>
>>>>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>>>>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>>>>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>>>>
>>>>> The misplaced register address is passed through devicetree and
>>>>> map it seperately during probe.
>>>>> Also, adds the documentation under devicetree/bindings/thermal/
>>>>>
>>>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>>>>> ---
>>>>> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
>>>>> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
>>>>> 2 files changed, 49 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> index 284f530..e818473 100644
>>>>> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> @@ -7,12 +7,21 @@
>>>>> "samsung,exynos4210-tmu"
>>>>> "samsung,exynos5250-tmu"
>>>>> "samsung,exynos5440-tmu"
>>>>> + "samsung,exynos5420-tmu"
>>>>> - interrupt-parent : The phandle for the interrupt controller
>>>>> - reg : Address range of the thermal registers. For soc's which has multiple
>>>>> instances of TMU and some registers are shared across all TMU's like
>>>>> interrupt related then 2 set of register has to supplied. First set
>>>>> belongs to each instance of TMU and second set belongs to common TMU
>>>>> registers.
>>>>> +
>>>>> + ** NOTE FOR EXYNOS5420 **
>>>>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>>>>> +
>>>>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>>>>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>>>>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>>>>> +
>>>>> - interrupts : Should contain interrupt for thermal system
>>>>> - clocks : The main clock for TMU device
>>>>> - clock-names : Thermal system clock name
>>>>> @@ -43,6 +52,18 @@ Example 2):
>>>>> clock-names = "tmu_apbif";
>>>>> };
>>>>>
>>>>> +Example 3): In case of Exynos5420 TMU channel 3
>>>>> +
>>>>> + /* tmu for CPU3 */
>>>>> + tmu@1006c000 {
>>>>> + compatible = "samsung,exynos5420-tmu";
>>>>> + /* 2nd reg is for the misplaced TRIMINFO register */
>>>>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>>>>> + interrupts = <0 185 0>;
>>>>> + clocks = <&clock 318>;
>>>>> + clock-names = "tmu_apbif";
>>>>> + };
>>>>> +
>>>>> Note: For multi-instance tmu each instance should have an alias correctly
>>>>> numbered in "aliases" node.
>>>>>
>>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>>>>> index bfdfbd6..f95844e 100644
>>>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>>>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>>>>> @@ -42,6 +42,7 @@
>>>>> * @pdata: pointer to the tmu platform/configuration data
>>>>> * @base: base address of the single instance of the TMU controller.
>>>>> * @base_common: base address of the common registers of the TMU controller.
>>>>> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
>>>>
>>>> Instead of creating this new field you can re-use base_common for
>>>> accessing the second set of register for misplaced triminfo address.
>>>> Also you can rename this variable as base_second.
>>>
>>> The purpose and the meaning of the fields are entirely different.
>>> The triminfo is a hardware bug present only in Exynos5420
>> My point is that for a bug a new field does not seem good as driver is
>> common across many Socs. Even In case of 5440 the common base can be
>> generalized and considered as second base address and documentation
>> can be updated accordingly. Also change the flag SHARED_MEMORY to
>> ADDRESS_TWO.
>
> Why ADDRESS_TWO, are we expecting ADDRESS_THREE as well.
>
>>> and the common registers are available only on Exynos5440 i guess.
>>>
>>> IMHO, reusing is not a nice idea.
>>> I'm willing to modify the code if there is a better idea.
>>>>
>>>>> * @irq: irq number of the TMU controller.
>>>>> * @soc: id of the SOC type.
>>>>> * @irq_work: pointer to the irq work structure.
>>>>> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
>>>>> struct exynos_tmu_platform_data *pdata;
>>>>> void __iomem *base;
>>>>> void __iomem *base_common;
>>>>> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
>>>>> int irq;
>>>>> enum soc_type soc;
>>>>> struct work_struct irq_work;
>>>>> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>>>>> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>>>>> }
>>>>> } else {
>>>>> - trim_info = readl(data->base + reg->triminfo_data);
>>>>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>>>>> + if (data->triminfo_base)
>>>>> + trim_info = readl(data->triminfo_base +
>>>>> + reg->triminfo_data);
>>>>> + else
>>>>> + trim_info = readl(data->base + reg->triminfo_data);
>>>>> }
>>>>> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>>>>> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>>>>> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
>>>>> * Check if the TMU shares some registers and then try to map the
>>>>> * memory of common registers.
>>>>> */
>>>>> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
>>>>> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
>>>>> + /* For Exynos5420 The misplaced TERMINFO register address will
>>>>> + * be passed from device tree node.
>>>>> + *
>>>>> + * We cannot use devm_request_and_ioremap, as the base address
>>>>> + * over laps with the address space of the other TMU channel.
>>>>> + * Check Documentation for details
>>>>> + */
>>>>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>>>>> return 0;
>>>>> + }
>>>> In the below code, remove the request resource API for common_base and
>>>> use simple of_iomap API.
>>>
>>> That will be a separate fix patch. Will submit separately,
>>> This patchset is to add exynos5420 support
>>
>> Sorry for my earlier comment. Actually my suggested change is not
>> needed as the APIs used don't bind resources. Just enable the
>> SHARED_MEMORY flag and it should be fine.
>>
>>
>>>
>>> Is the res_size for the common registers fixed ?
>> Yes in 5440 it is same.
>>
>> Thanks,
>> Amit Daniel
>>
>>>
>>>>
>>>> Thanks,
>>>> Amit Daniel
>>>>>
>>>>> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
>>>>> dev_err(&pdev->dev, "failed to get Resource 1\n");
>>>>> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>>>>> if (IS_ERR(data->clk)) {
>>>>> dev_err(&pdev->dev, "Failed to get clock\n");
>>>>> - return PTR_ERR(data->clk);
>>>>> + ret = PTR_ERR(data->clk);
>>>>> + goto err_triminfo_base;
>>>>> }
>>>>>
>>>>> ret = clk_prepare(data->clk);
>>>>> if (ret)
>>>>> - return ret;
>>>>> + goto err_triminfo_base;
>>>>>
>>>>> if (pdata->type == SOC_ARCH_EXYNOS ||
>>>>> pdata->type == SOC_ARCH_EXYNOS4210 ||
>>>>> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>>> }
>>>>>
>>>>> return 0;
>>>>> +
>>>>> err_clk:
>>>>> clk_unprepare(data->clk);
>>>>> return ret;
>>>>> +err_triminfo_base:
>>>>> + if (data->triminfo_base)
>>>>> + iounmap(data->triminfo_base);
>>>>> }
>>>>>
>>>>> static int exynos_tmu_remove(struct platform_device *pdev)
>>>>> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>>>>
>>>>> exynos_unregister_thermal(data->reg_conf);
>>>>>
>>>>> + if (data->triminfo_base)
>>>>> + iounmap(data->triminfo_base);
>>>>> +
>>>>> clk_unprepare(data->clk);
>>>>>
>>>>> if (!IS_ERR(data->regulator))
>>>>> --
>>>>> 1.7.9.5
>>>>>
>>>>> --
>>>>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>>>>> the body of a message to [email protected]
>>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>>> Please read the FAQ at http://www.tux.org/lkml/
>>>
>>>
>>>
>>> --
>>> Shine bright,
>>> (: Nav :)
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
>>> the body of a message to [email protected]
>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
>> On Wed, Aug 28, 2013 at 11:49 AM, Naveen Krishna Ch
>> <[email protected]> wrote:
>>> On 28 August 2013 11:33, amit daniel kachhap <[email protected]> wrote:
>>>> Hi Naveen
>>>>
>>>> On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
>>>> <[email protected]> wrote:
>>>>> This patch adds code to handle the misplaced TRIMINFO register
>>>>> incase of Exynos5420.
>>>>>
>>>>> On Exynos5420 we have a TRIMINFO register being misplaced for
>>>>> TMU channels 2, 3 and 4
>>>>>
>>>>> TRIMINFO at 0x1006c000 contains data for TMU channel 3
>>>>> TRIMINFO at 0x100a0000 contains data for TMU channel 4
>>>>> TRIMINFO at 0x10068000 contains data for TMU channel 2
>>>>>
>>>>> The misplaced register address is passed through devicetree and
>>>>> map it seperately during probe.
>>>>> Also, adds the documentation under devicetree/bindings/thermal/
>>>>>
>>>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>>>>> ---
>>>>> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
>>>>> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
>>>>> 2 files changed, 49 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> index 284f530..e818473 100644
>>>>> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>>>>> @@ -7,12 +7,21 @@
>>>>> "samsung,exynos4210-tmu"
>>>>> "samsung,exynos5250-tmu"
>>>>> "samsung,exynos5440-tmu"
>>>>> + "samsung,exynos5420-tmu"
>>>>> - interrupt-parent : The phandle for the interrupt controller
>>>>> - reg : Address range of the thermal registers. For soc's which has multiple
>>>>> instances of TMU and some registers are shared across all TMU's like
>>>>> interrupt related then 2 set of register has to supplied. First set
>>>>> belongs to each instance of TMU and second set belongs to common TMU
>>>>> registers.
>>>>> +
>>>>> + ** NOTE FOR EXYNOS5420 **
>>>>> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
>>>>> +
>>>>> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
>>>>> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
>>>>> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
>>>>> +
>>>>> - interrupts : Should contain interrupt for thermal system
>>>>> - clocks : The main clock for TMU device
>>>>> - clock-names : Thermal system clock name
>>>>> @@ -43,6 +52,18 @@ Example 2):
>>>>> clock-names = "tmu_apbif";
>>>>> };
>>>>>
>>>>> +Example 3): In case of Exynos5420 TMU channel 3
>>>>> +
>>>>> + /* tmu for CPU3 */
>>>>> + tmu@1006c000 {
>>>>> + compatible = "samsung,exynos5420-tmu";
>>>>> + /* 2nd reg is for the misplaced TRIMINFO register */
>>>>> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>>>>> + interrupts = <0 185 0>;
>>>>> + clocks = <&clock 318>;
>>>>> + clock-names = "tmu_apbif";
>>>>> + };
>>>>> +
>>>>> Note: For multi-instance tmu each instance should have an alias correctly
>>>>> numbered in "aliases" node.
>>>>>
>>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>>>>> index bfdfbd6..f95844e 100644
>>>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>>>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>>>>> @@ -42,6 +42,7 @@
>>>>> * @pdata: pointer to the tmu platform/configuration data
>>>>> * @base: base address of the single instance of the TMU controller.
>>>>> * @base_common: base address of the common registers of the TMU controller.
>>>>> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
>>>>
>>>> Instead of creating this new field you can re-use base_common for
>>>> accessing the second set of register for misplaced triminfo address.
>>>> Also you can rename this variable as base_second.
>>>
>>> The purpose and the meaning of the fields are entirely different.
>>> The triminfo is a hardware bug present only in Exynos5420
>>> and the common registers are available only on Exynos5440 i guess.
>>>
>>> IMHO, reusing is not a nice idea.
>>> I'm willing to modify the code if there is a better idea.
>>>>
>>>>> * @irq: irq number of the TMU controller.
>>>>> * @soc: id of the SOC type.
>>>>> * @irq_work: pointer to the irq work structure.
>>>>> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
>>>>> struct exynos_tmu_platform_data *pdata;
>>>>> void __iomem *base;
>>>>> void __iomem *base_common;
>>>>> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
>>>>> int irq;
>>>>> enum soc_type soc;
>>>>> struct work_struct irq_work;
>>>>> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>>>>> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>>>>> }
>>>>> } else {
>>>>> - trim_info = readl(data->base + reg->triminfo_data);
>>>>> + /* On exynos5420 TRIMINFO is misplaced for some channels */
>>>>> + if (data->triminfo_base)
>>>>> + trim_info = readl(data->triminfo_base +
>>>>> + reg->triminfo_data);
>>>>> + else
>>>>> + trim_info = readl(data->base + reg->triminfo_data);
>>>>> }
>>>>> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>>>>> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>>>>> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
>>>>> * Check if the TMU shares some registers and then try to map the
>>>>> * memory of common registers.
>>>>> */
>>>>> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
>>>>> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
>>>>> + /* For Exynos5420 The misplaced TERMINFO register address will
>>>>> + * be passed from device tree node.
>>>>> + *
>>>>> + * We cannot use devm_request_and_ioremap, as the base address
>>>>> + * over laps with the address space of the other TMU channel.
>>>>> + * Check Documentation for details
>>>>> + */
>>>>> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
>>>>> return 0;
>>>>> + }
>>>> In the below code, remove the request resource API for common_base and
>>>> use simple of_iomap API.
>>>
>>> That will be a separate fix patch. Will submit separately,
>>> This patchset is to add exynos5420 support
>>>
>>> Is the res_size for the common registers fixed ?
>>>
>>>>
>>>> Thanks,
>>>> Amit Daniel
>>>>>
>>>>> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
>>>>> dev_err(&pdev->dev, "failed to get Resource 1\n");
>>>>> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>>> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
>>>>> if (IS_ERR(data->clk)) {
>>>>> dev_err(&pdev->dev, "Failed to get clock\n");
>>>>> - return PTR_ERR(data->clk);
>>>>> + ret = PTR_ERR(data->clk);
>>>>> + goto err_triminfo_base;
>>>>> }
>>>>>
>>>>> ret = clk_prepare(data->clk);
>>>>> if (ret)
>>>>> - return ret;
>>>>> + goto err_triminfo_base;
>>>>>
>>>>> if (pdata->type == SOC_ARCH_EXYNOS ||
>>>>> pdata->type == SOC_ARCH_EXYNOS4210 ||
>>>>> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>>>>> }
>>>>>
>>>>> return 0;
>>>>> +
>>>>> err_clk:
>>>>> clk_unprepare(data->clk);
>>>>> return ret;
>>>>> +err_triminfo_base:
>>>>> + if (data->triminfo_base)
>>>>> + iounmap(data->triminfo_base);
>>>>> }
>>>>>
>>>>> static int exynos_tmu_remove(struct platform_device *pdev)
>>>>> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>>>>>
>>>>> exynos_unregister_thermal(data->reg_conf);
>>>>>
>>>>> + if (data->triminfo_base)
>>>>> + iounmap(data->triminfo_base);
>>>>> +
>>>>> clk_unprepare(data->clk);
>>>>>
>>>>> if (!IS_ERR(data->regulator))
>>>>> --
>>>>> 1.7.9.5
>>>>>
>>>>> --
>>>>> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
>>>>> the body of a message to [email protected]
>>>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>>>> Please read the FAQ at http://www.tux.org/lkml/
>>>
>>>
>>>
>>> --
>>> Shine bright,
>>> (: Nav :)
>>> --
>>> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
>>> the body of a message to [email protected]
>>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
>
>
> --
> Shine bright,
> (: Nav :)
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> the body of a message to [email protected]
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The FALL interrupt related en, status bits are available at an offset of
16 on INTEN, INTSTAT registers and at an offset of
12 on INTCLEAR register.
This patch corrects the same for exyns5250 and exynos5440
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v1:
None
drivers/thermal/samsung/exynos_tmu.c | 2 +-
drivers/thermal/samsung/exynos_tmu.h | 2 ++
drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
4 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index ec01dfe..d201ed8 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -265,7 +265,7 @@ skip_calib_data:
data->base + reg->threshold_th1);
writel((reg->inten_rise_mask << reg->inten_rise_shift) |
- (reg->inten_fall_mask << reg->inten_fall_shift),
+ (reg->inten_fall_mask << reg->intclr_fall_shift),
data->base + reg->tmu_intclear);
/* if last threshold limit is also present */
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index b364c9e..7c6c34a 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -134,6 +134,7 @@ enum soc_type {
* @inten_fall3_shift: shift bits of falling 3 interrupt bits.
* @tmu_intstat: Register containing the interrupt status values.
* @tmu_intclear: Register for clearing the raised interrupt status.
+ * @intclr_fall_shift: shift bits for interrupt clear fall 0
* @emul_con: TMU emulation controller register.
* @emul_temp_shift: shift bits of emulation temperature.
* @emul_time_shift: shift bits of emulation time.
@@ -204,6 +205,7 @@ struct exynos_tmu_registers {
u32 tmu_intstat;
u32 tmu_intclear;
+ u32 intclr_fall_shift;
u32 emul_con;
u32 emul_temp_shift;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 9002499..23fea23 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
.emul_con = EXYNOS_EMUL_CON,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
.emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
@@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
.tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
+ .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
.tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
.emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index dc7feb5..8788a87 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -69,9 +69,10 @@
#define EXYNOS_TMU_RISE_INT_MASK 0x111
#define EXYNOS_TMU_RISE_INT_SHIFT 0
#define EXYNOS_TMU_FALL_INT_MASK 0x111
-#define EXYNOS_TMU_FALL_INT_SHIFT 12
+#define EXYNOS_TMU_FALL_INT_SHIFT 16
#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
+#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
#define EXYNOS_TMU_TRIP_MODE_MASK 0x7
#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
--
1.7.9.5
On Exynos5440 and Exynos5420 there are registers common
across the TMU channels.
To support that, we introduced a SHARED_MEMORY flag in the
driver and the 2nd set of register base and size are provided
in the "reg" property of the node.
As per Amit's suggestion, this patch changes the base_common
to base_second.
https://lkml.org/lkml/2013/8/1/38
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
.../devicetree/bindings/thermal/exynos-thermal.txt | 4 ++--
drivers/thermal/samsung/exynos_tmu.c | 10 +++++-----
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 284f530..116cca0 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -11,8 +11,8 @@
- reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
interrupt related then 2 set of register has to supplied. First set
- belongs to each instance of TMU and second set belongs to common TMU
- registers.
+ belongs to each instance of TMU and second set belongs to second set
+ of common TMU registers.
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index d201ed8..c56f7e5 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -41,7 +41,7 @@
* @id: identifier of the one instance of the TMU controller.
* @pdata: pointer to the tmu platform/configuration data
* @base: base address of the single instance of the TMU controller.
- * @base_common: base address of the common registers of the TMU controller.
+ * @base_second: base address of the common registers of the TMU controller.
* @irq: irq number of the TMU controller.
* @soc: id of the SOC type.
* @irq_work: pointer to the irq work structure.
@@ -56,7 +56,7 @@ struct exynos_tmu_data {
int id;
struct exynos_tmu_platform_data *pdata;
void __iomem *base;
- void __iomem *base_common;
+ void __iomem *base_second;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -297,7 +297,7 @@ skip_calib_data:
}
/*Clear the PMIN in the common TMU register*/
if (reg->tmu_pmin && !data->id)
- writel(0, data->base_common + reg->tmu_pmin);
+ writel(0, data->base_second + reg->tmu_pmin);
out:
clk_disable(data->clk);
mutex_unlock(&data->lock);
@@ -451,7 +451,7 @@ static void exynos_tmu_work(struct work_struct *work)
/* Find which sensor generated this interrupt */
if (reg->tmu_irqstatus) {
- val_type = readl(data->base_common + reg->tmu_irqstatus);
+ val_type = readl(data->base_second + reg->tmu_irqstatus);
if (!((val_type >> data->id) & 0x1))
goto out;
}
@@ -590,7 +590,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
return -ENODEV;
}
- data->base_common = devm_ioremap(&pdev->dev, res.start,
+ data->base_second = devm_ioremap(&pdev->dev, res.start,
resource_size(&res));
if (!data->base) {
dev_err(&pdev->dev, "Failed to ioremap memory\n");
--
1.7.9.5
This patch adds the neccessary register changes and arch information
to support Exynos5420 SoCs
Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
Note: The platform data structure will be handled properly once the driver
moves to complete device driver solution.
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v1:
1. modified the platform data structure in order to pass SHARED flag
for channels that need sharing of address space.
2. https://lkml.org/lkml/2013/8/1/38 is merged into this patch.
As the changes are minimum and can be added here.
drivers/thermal/samsung/exynos_tmu.c | 14 +++-
drivers/thermal/samsung/exynos_tmu.h | 1 +
drivers/thermal/samsung/exynos_tmu_data.c | 130 +++++++++++++++++++++++++++++
drivers/thermal/samsung/exynos_tmu_data.h | 7 ++
4 files changed, 150 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index c56f7e5..d57a4e2 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -186,7 +186,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
}
} else {
- trim_info = readl(data->base + reg->triminfo_data);
+ /* On exynos5420 the triminfo register is in the shared space */
+ if (data->base_second && (data->soc == SOC_ARCH_EXYNOS5420))
+ trim_info = readl(data->base_second +
+ reg->triminfo_data);
+ else
+ trim_info = readl(data->base + reg->triminfo_data);
}
data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
@@ -499,6 +504,10 @@ static const struct of_device_id exynos_tmu_match[] = {
.compatible = "samsung,exynos5440-tmu",
.data = (void *)EXYNOS5440_TMU_DRV_DATA,
},
+ {
+ .compatible = "samsung,exynos5420-tmu",
+ .data = (void *)EXYNOS5420_TMU_DRV_DATA,
+ },
{},
};
MODULE_DEVICE_TABLE(of, exynos_tmu_match);
@@ -637,7 +646,8 @@ static int exynos_tmu_probe(struct platform_device *pdev)
if (pdata->type == SOC_ARCH_EXYNOS ||
pdata->type == SOC_ARCH_EXYNOS4210 ||
- pdata->type == SOC_ARCH_EXYNOS5440)
+ pdata->type == SOC_ARCH_EXYNOS5440 ||
+ pdata->type == SOC_ARCH_EXYNOS5420)
data->soc = pdata->type;
else {
ret = -EINVAL;
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index 7c6c34a..d88a536 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -43,6 +43,7 @@ enum soc_type {
SOC_ARCH_EXYNOS4210 = 1,
SOC_ARCH_EXYNOS,
SOC_ARCH_EXYNOS5440,
+ SOC_ARCH_EXYNOS5420,
};
/**
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 23fea23..c3cdfbb 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -177,6 +177,136 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
};
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+static const struct exynos_tmu_registers exynos5420_tmu_registers = {
+ .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
+ .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
+ .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
+ .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
+ .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
+ .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
+ .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
+ .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
+ .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
+ .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+ .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
+ .tmu_status = EXYNOS_TMU_REG_STATUS,
+ .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
+ .threshold_th0 = EXYNOS_THD_TEMP_RISE,
+ .threshold_th1 = EXYNOS_THD_TEMP_FALL,
+ .tmu_inten = EXYNOS_TMU_REG_INTEN,
+ .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
+ .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
+ .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
+ .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
+ .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
+ .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
+ /* INTEN_RISE3 Not availble in exynos5420 */
+ .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
+ .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
+ .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
+ .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .emul_con = EXYNOS_EMUL_CON,
+ .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
+ .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
+ .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
+};
+
+#define EXYNOS5420_TMU_DATA \
+ .threshold_falling = 10, \
+ .trigger_levels[0] = 85, \
+ .trigger_levels[1] = 103, \
+ .trigger_levels[2] = 110, \
+ .trigger_levels[3] = 120, \
+ .trigger_enable[0] = true, \
+ .trigger_enable[1] = true, \
+ .trigger_enable[2] = true, \
+ .trigger_enable[3] = false, \
+ .trigger_type[0] = THROTTLE_ACTIVE, \
+ .trigger_type[1] = THROTTLE_ACTIVE, \
+ .trigger_type[2] = SW_TRIP, \
+ .trigger_type[3] = HW_TRIP, \
+ .max_trigger_level = 4, \
+ .gain = 8, \
+ .reference_voltage = 16, \
+ .noise_cancel_mode = 4, \
+ .cal_type = TYPE_ONE_POINT_TRIMMING, \
+ .efuse_value = 55, \
+ .min_efuse_value = 40, \
+ .max_efuse_value = 100, \
+ .first_point_trim = 25, \
+ .second_point_trim = 85, \
+ .default_temp_offset = 50, \
+ .freq_tab[0] = { \
+ .freq_clip_max = 800 * 1000, \
+ .temp_level = 85, \
+ }, \
+ .freq_tab[1] = { \
+ .freq_clip_max = 200 * 1000, \
+ .temp_level = 103, \
+ }, \
+ .freq_tab_count = 2, \
+ .type = SOC_ARCH_EXYNOS5420, \
+ .registers = &exynos5420_tmu_registers, \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
+ TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
+ TMU_SUPPORT_EMUL_TIME)
+
+#define EXYNOS5420_TMU_DATA_SHARED \
+ .threshold_falling = 10, \
+ .trigger_levels[0] = 85, \
+ .trigger_levels[1] = 103, \
+ .trigger_levels[2] = 110, \
+ .trigger_levels[3] = 120, \
+ .trigger_enable[0] = true, \
+ .trigger_enable[1] = true, \
+ .trigger_enable[2] = true, \
+ .trigger_enable[3] = false, \
+ .trigger_type[0] = THROTTLE_ACTIVE, \
+ .trigger_type[1] = THROTTLE_ACTIVE, \
+ .trigger_type[2] = SW_TRIP, \
+ .trigger_type[3] = HW_TRIP, \
+ .max_trigger_level = 4, \
+ .gain = 8, \
+ .reference_voltage = 16, \
+ .noise_cancel_mode = 4, \
+ .cal_type = TYPE_ONE_POINT_TRIMMING, \
+ .efuse_value = 55, \
+ .min_efuse_value = 40, \
+ .max_efuse_value = 100, \
+ .first_point_trim = 25, \
+ .second_point_trim = 85, \
+ .default_temp_offset = 50, \
+ .freq_tab[0] = { \
+ .freq_clip_max = 800 * 1000, \
+ .temp_level = 85, \
+ }, \
+ .freq_tab[1] = { \
+ .freq_clip_max = 200 * 1000, \
+ .temp_level = 103, \
+ }, \
+ .freq_tab_count = 2, \
+ .type = SOC_ARCH_EXYNOS5420, \
+ .registers = &exynos5420_tmu_registers, \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
+ TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
+ TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_SHARED_MEMORY)
+
+struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
+ .tmu_data = {
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ },
+ .tmu_count = 5,
+};
+#endif
+
#if defined(CONFIG_SOC_EXYNOS5440)
static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index 8788a87..3ce94cd 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -153,4 +153,11 @@ extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
#define EXYNOS5440_TMU_DRV_DATA (NULL)
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
+#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
+#else
+#define EXYNOS5420_TMU_DRV_DATA (NULL)
+#endif
+
#endif /*_EXYNOS_TMU_DATA_H*/
--
1.7.9.5
On Wed, Aug 28, 2013 at 11:15 AM, Naveen Krishna Chatradhi
<[email protected]> wrote:
> This patch adds the neccessary register changes and arch information
> to support Exynos5420 SoCs
> Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
For all patch in this series,
Acked-by: Amit Daniel Kachhap <[email protected]>.
A minor comment, please rename the flag SHARED_MEMORY to
MULTIPLE_MEMORY as this is more consistent.
Thanks,
Amit Daniel
> ---
> drivers/thermal/samsung/exynos_tmu.c | 4 ++
> drivers/thermal/samsung/exynos_tmu.h | 1 +
> drivers/thermal/samsung/exynos_tmu_data.c | 90 +++++++++++++++++++++++++++++
> drivers/thermal/samsung/exynos_tmu_data.h | 7 +++
> 4 files changed, 102 insertions(+)
>
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index d201ed8..bfdfbd6 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -499,6 +499,10 @@ static const struct of_device_id exynos_tmu_match[] = {
> .compatible = "samsung,exynos5440-tmu",
> .data = (void *)EXYNOS5440_TMU_DRV_DATA,
> },
> + {
> + .compatible = "samsung,exynos5420-tmu",
> + .data = (void *)EXYNOS5420_TMU_DRV_DATA,
> + },
> {},
> };
> MODULE_DEVICE_TABLE(of, exynos_tmu_match);
> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> index 7c6c34a..d88a536 100644
> --- a/drivers/thermal/samsung/exynos_tmu.h
> +++ b/drivers/thermal/samsung/exynos_tmu.h
> @@ -43,6 +43,7 @@ enum soc_type {
> SOC_ARCH_EXYNOS4210 = 1,
> SOC_ARCH_EXYNOS,
> SOC_ARCH_EXYNOS5440,
> + SOC_ARCH_EXYNOS5420,
> };
>
> /**
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> index 23fea23..5adbb36 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> @@ -177,6 +177,96 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
> };
> #endif
>
> +#if defined(CONFIG_SOC_EXYNOS5420)
> +static const struct exynos_tmu_registers exynos5420_tmu_registers = {
> + .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
> + .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
> + .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
> + .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
> + .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
> + .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
> + .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
> + .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
> + .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
> + .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
> + .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
> + .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
> + .tmu_status = EXYNOS_TMU_REG_STATUS,
> + .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
> + .threshold_th0 = EXYNOS_THD_TEMP_RISE,
> + .threshold_th1 = EXYNOS_THD_TEMP_FALL,
> + .tmu_inten = EXYNOS_TMU_REG_INTEN,
> + .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
> + .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
> + .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
> + .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
> + .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
> + .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
> + .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
> + /* INTEN_RISE3 Not availble in exynos5420 */
> + .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
> + .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> + .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> + .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> + .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
> + .emul_con = EXYNOS_EMUL_CON,
> + .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> + .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> + .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
> +};
> +
> +#define EXYNOS5420_TMU_DATA \
> + .threshold_falling = 10, \
> + .trigger_levels[0] = 85, \
> + .trigger_levels[1] = 103, \
> + .trigger_levels[2] = 110, \
> + .trigger_levels[3] = 120, \
> + .trigger_enable[0] = true, \
> + .trigger_enable[1] = true, \
> + .trigger_enable[2] = true, \
> + .trigger_enable[3] = false, \
> + .trigger_type[0] = THROTTLE_ACTIVE, \
> + .trigger_type[1] = THROTTLE_ACTIVE, \
> + .trigger_type[2] = SW_TRIP, \
> + .trigger_type[3] = HW_TRIP, \
> + .max_trigger_level = 4, \
> + .gain = 8, \
> + .reference_voltage = 16, \
> + .noise_cancel_mode = 4, \
> + .cal_type = TYPE_ONE_POINT_TRIMMING, \
> + .efuse_value = 55, \
> + .min_efuse_value = 40, \
> + .max_efuse_value = 100, \
> + .first_point_trim = 25, \
> + .second_point_trim = 85, \
> + .default_temp_offset = 50, \
> + .freq_tab[0] = { \
> + .freq_clip_max = 800 * 1000, \
> + .temp_level = 85, \
> + }, \
> + .freq_tab[1] = { \
> + .freq_clip_max = 200 * 1000, \
> + .temp_level = 103, \
> + }, \
> + .freq_tab_count = 2, \
> + .type = SOC_ARCH_EXYNOS5420, \
> + .registers = &exynos5420_tmu_registers, \
> + .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
> + TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
> + TMU_SUPPORT_EMUL_TIME)
> +
> +struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
> + .tmu_data = {
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA },
> + },
> + .tmu_count = 5,
> +};
> +#endif
> +
> #if defined(CONFIG_SOC_EXYNOS5440)
> static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> index 8788a87..3ce94cd 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> @@ -153,4 +153,11 @@ extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
> #define EXYNOS5440_TMU_DRV_DATA (NULL)
> #endif
>
> +#if defined(CONFIG_SOC_EXYNOS5420)
> +extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
> +#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
> +#else
> +#define EXYNOS5420_TMU_DRV_DATA (NULL)
> +#endif
> +
> #endif /*_EXYNOS_TMU_DATA_H*/
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
Hi,
On Wednesday, August 28, 2013 11:15:19 AM Naveen Krishna Chatradhi wrote:
> This patch adds code to handle the misplaced TRIMINFO register
> incase of Exynos5420.
>
> On Exynos5420 we have a TRIMINFO register being misplaced for
> TMU channels 2, 3 and 4
>
> TRIMINFO at 0x1006c000 contains data for TMU channel 3
> TRIMINFO at 0x100a0000 contains data for TMU channel 4
> TRIMINFO at 0x10068000 contains data for TMU channel 2
>
> The misplaced register address is passed through devicetree and
> map it seperately during probe.
> Also, adds the documentation under devicetree/bindings/thermal/
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> ---
> .../devicetree/bindings/thermal/exynos-thermal.txt | 21 +++++++++++++
> drivers/thermal/samsung/exynos_tmu.c | 32 +++++++++++++++++---
> 2 files changed, 49 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> index 284f530..e818473 100644
> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> @@ -7,12 +7,21 @@
> "samsung,exynos4210-tmu"
> "samsung,exynos5250-tmu"
> "samsung,exynos5440-tmu"
> + "samsung,exynos5420-tmu"
> - interrupt-parent : The phandle for the interrupt controller
> - reg : Address range of the thermal registers. For soc's which has multiple
> instances of TMU and some registers are shared across all TMU's like
> interrupt related then 2 set of register has to supplied. First set
> belongs to each instance of TMU and second set belongs to common TMU
> registers.
> +
> + ** NOTE FOR EXYNOS5420 **
> + TRIMINFO register is being misplaced for TMU channels 2, 3 and 4
> +
> + TERMINFO for TMU channel 2 is present in address space of TMU channel 3
> + TERMINFO for TMU channel 3 is present in address space of TMU channel 4
> + TERMINFO for TMU channel 4 is present in address space of TMU channel 2
> +
> - interrupts : Should contain interrupt for thermal system
> - clocks : The main clock for TMU device
> - clock-names : Thermal system clock name
> @@ -43,6 +52,18 @@ Example 2):
> clock-names = "tmu_apbif";
> };
>
> +Example 3): In case of Exynos5420 TMU channel 3
> +
> + /* tmu for CPU3 */
> + tmu@1006c000 {
> + compatible = "samsung,exynos5420-tmu";
> + /* 2nd reg is for the misplaced TRIMINFO register */
> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> + interrupts = <0 185 0>;
> + clocks = <&clock 318>;
> + clock-names = "tmu_apbif";
> + };
> +
> Note: For multi-instance tmu each instance should have an alias correctly
> numbered in "aliases" node.
>
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index bfdfbd6..f95844e 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -42,6 +42,7 @@
> * @pdata: pointer to the tmu platform/configuration data
> * @base: base address of the single instance of the TMU controller.
> * @base_common: base address of the common registers of the TMU controller.
> + * @triminfo_base: misplaced register base for TRIMINFO on Exynos5420 only
> * @irq: irq number of the TMU controller.
> * @soc: id of the SOC type.
> * @irq_work: pointer to the irq work structure.
> @@ -57,6 +58,7 @@ struct exynos_tmu_data {
> struct exynos_tmu_platform_data *pdata;
> void __iomem *base;
> void __iomem *base_common;
> + void __iomem *triminfo_base; /* Needed only Exynos5420 */
> int irq;
> enum soc_type soc;
> struct work_struct irq_work;
> @@ -186,7 +188,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
> }
> } else {
> - trim_info = readl(data->base + reg->triminfo_data);
> + /* On exynos5420 TRIMINFO is misplaced for some channels */
> + if (data->triminfo_base)
> + trim_info = readl(data->triminfo_base +
> + reg->triminfo_data);
> + else
> + trim_info = readl(data->base + reg->triminfo_data);
If you always set data->triminfo_base (to data->base for EXYNOS SoCs
different from EXYNOS420) you could simplify the code above.
> }
> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
> @@ -586,8 +593,17 @@ static int exynos_map_dt_data(struct platform_device *pdev)
> * Check if the TMU shares some registers and then try to map the
> * memory of common registers.
> */
> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
> + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) {
Please use a different flag for this quirk (i.e. TRIMINFO_QUIRK) instead
of overloading SHARED_MEMORY. Then you can do:
if (TMU_SUPPORTS(pdata, TRIMINFO_QUIRK) {
...
} else
data->triminfo_base = data->base;
> + /* For Exynos5420 The misplaced TERMINFO register address will
> + * be passed from device tree node.
> + *
> + * We cannot use devm_request_and_ioremap, as the base address
> + * over laps with the address space of the other TMU channel.
> + * Check Documentation for details
> + */
> + data->triminfo_base = of_iomap(pdev->dev.of_node, 1);
Shouldn't there be a check here (for EXYNOS5420) for of_iomap()
return value != NULL here so if somebody makes an error in device
tree description it gets caught instead of failing silently?
Please note that if you use the new features flag you wouldn't need
an extra check for EXYNOS5420.
> return 0;
> + }
>
> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
> dev_err(&pdev->dev, "failed to get Resource 1\n");
> @@ -632,12 +648,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
> data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
> if (IS_ERR(data->clk)) {
> dev_err(&pdev->dev, "Failed to get clock\n");
> - return PTR_ERR(data->clk);
> + ret = PTR_ERR(data->clk);
> + goto err_triminfo_base;
> }
>
> ret = clk_prepare(data->clk);
> if (ret)
> - return ret;
> + goto err_triminfo_base;
>
> if (pdata->type == SOC_ARCH_EXYNOS ||
> pdata->type == SOC_ARCH_EXYNOS4210 ||
> @@ -707,9 +724,13 @@ static int exynos_tmu_probe(struct platform_device *pdev)
> }
>
> return 0;
> +
> err_clk:
> clk_unprepare(data->clk);
> return ret;
> +err_triminfo_base:
> + if (data->triminfo_base)
> + iounmap(data->triminfo_base);
There is a return missing here and iounmap() is missing for err_clk.
I suspect that this code should look like:
err_clk:
clk_unprepare(data->clk);
err_triminfo_base:
if (data->triminfo_base)
iounmap(data->triminfo_base);
return ret;
> }
>
> static int exynos_tmu_remove(struct platform_device *pdev)
> @@ -720,6 +741,9 @@ static int exynos_tmu_remove(struct platform_device *pdev)
>
> exynos_unregister_thermal(data->reg_conf);
>
> + if (data->triminfo_base)
> + iounmap(data->triminfo_base);
> +
> clk_unprepare(data->clk);
It would be better to do clk_unprepare() first to keep consistency with
failure path in exynos_tmu_probe().
> if (!IS_ERR(data->regulator))
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
Hi,
On Wednesday, August 28, 2013 02:46:49 PM Naveen Krishna Chatradhi wrote:
> This patch adds the neccessary register changes and arch information
> to support Exynos5420 SoCs
> Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
>
> Note: The platform data structure will be handled properly once the driver
> moves to complete device driver solution.
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
OK, this is also an acceptable solution (though it seems to be worse
in terms of simplicity and long term maintainance). Anyway please ignore
my comments to v1, just remember to rename this flag (as already pointed
by out by Amit). TMU_SUPPORT_SHARED_MEMORY documentation in exynos_tmu.h
also requires an update.
> ---
> Changes since v1:
> 1. modified the platform data structure in order to pass SHARED flag
> for channels that need sharing of address space.
> 2. https://lkml.org/lkml/2013/8/1/38 is merged into this patch.
> As the changes are minimum and can be added here.
Documentation/devicetree/bindings/thermal/exynos-thermal.txt update got
lost and it is quite important now as second address servers multiple
purposes. Please fix it.
> drivers/thermal/samsung/exynos_tmu.c | 14 +++-
> drivers/thermal/samsung/exynos_tmu.h | 1 +
> drivers/thermal/samsung/exynos_tmu_data.c | 130 +++++++++++++++++++++++++++++
> drivers/thermal/samsung/exynos_tmu_data.h | 7 ++
> 4 files changed, 150 insertions(+), 2 deletions(-)
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
This patch adds the neccessary register changes and arch information
to support Exynos5420 SoCs
Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
Also updated the Documentation at
Documentation/devicetree/bindings/thermal/exynos-thermal.txt
Note: The platform data structure will be handled properly once the driver
moves to complete device driver solution.
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v1:
1. modified the platform data structure in order to pass SHARED flag
for channels that need sharing of address space.
2. https://lkml.org/lkml/2013/8/1/38 is merged into this patch.
As the changes are minimum and can be added here.
.../devicetree/bindings/thermal/exynos-thermal.txt | 39 ++++++
drivers/thermal/samsung/exynos_tmu.c | 14 ++-
drivers/thermal/samsung/exynos_tmu.h | 1 +
drivers/thermal/samsung/exynos_tmu_data.c | 130 ++++++++++++++++++++
drivers/thermal/samsung/exynos_tmu_data.h | 7 ++
5 files changed, 189 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 116cca0..d70f2a4 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -7,12 +7,23 @@
"samsung,exynos4210-tmu"
"samsung,exynos5250-tmu"
"samsung,exynos5440-tmu"
+ "samsung,exynos5420-tmu"
- interrupt-parent : The phandle for the interrupt controller
- reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
interrupt related then 2 set of register has to supplied. First set
belongs to each instance of TMU and second set belongs to second set
of common TMU registers.
+ NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
+ channels 2, 3 and 4
+
+ TRIMINFO at 0x1006c000 contains data for TMU channel 3
+ TRIMINFO at 0x100a0000 contains data for TMU channel 4
+ TRIMINFO at 0x10068000 contains data for TMU channel 2
+
+ The misplaced register address is passed through devicetree as the
+ second base
+
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
@@ -43,6 +54,34 @@ Example 2):
clock-names = "tmu_apbif";
};
+Example 3): (In case of Exynos5420)
+ /* tmu for CPU2 */
+ tmu@10068000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+ interrupts = <0 184 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
+ /* tmu for CPU3 */
+ tmu@1006c000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+ interrupts = <0 185 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
+ /* tmu for GPU */
+ tmu@100a0000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+ interrupts = <0 215 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
Note: For multi-instance tmu each instance should have an alias correctly
numbered in "aliases" node.
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index 3a55caf..6d34652 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -186,7 +186,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
}
} else {
- trim_info = readl(data->base + reg->triminfo_data);
+ /* On exynos5420 the triminfo register is in the shared space */
+ if (data->base_second && (data->soc == SOC_ARCH_EXYNOS5420))
+ trim_info = readl(data->base_second +
+ reg->triminfo_data);
+ else
+ trim_info = readl(data->base + reg->triminfo_data);
}
data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
@@ -499,6 +504,10 @@ static const struct of_device_id exynos_tmu_match[] = {
.compatible = "samsung,exynos5440-tmu",
.data = (void *)EXYNOS5440_TMU_DRV_DATA,
},
+ {
+ .compatible = "samsung,exynos5420-tmu",
+ .data = (void *)EXYNOS5420_TMU_DRV_DATA,
+ },
{},
};
MODULE_DEVICE_TABLE(of, exynos_tmu_match);
@@ -637,7 +646,8 @@ static int exynos_tmu_probe(struct platform_device *pdev)
if (pdata->type == SOC_ARCH_EXYNOS ||
pdata->type == SOC_ARCH_EXYNOS4210 ||
- pdata->type == SOC_ARCH_EXYNOS5440)
+ pdata->type == SOC_ARCH_EXYNOS5440 ||
+ pdata->type == SOC_ARCH_EXYNOS5420)
data->soc = pdata->type;
else {
ret = -EINVAL;
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index ebd2ec1..774ab03 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -43,6 +43,7 @@ enum soc_type {
SOC_ARCH_EXYNOS4210 = 1,
SOC_ARCH_EXYNOS,
SOC_ARCH_EXYNOS5440,
+ SOC_ARCH_EXYNOS5420,
};
/**
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 58570d0..a6d5cb5 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -177,6 +177,136 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
};
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+static const struct exynos_tmu_registers exynos5420_tmu_registers = {
+ .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
+ .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
+ .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
+ .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
+ .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
+ .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
+ .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
+ .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
+ .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
+ .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+ .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
+ .tmu_status = EXYNOS_TMU_REG_STATUS,
+ .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
+ .threshold_th0 = EXYNOS_THD_TEMP_RISE,
+ .threshold_th1 = EXYNOS_THD_TEMP_FALL,
+ .tmu_inten = EXYNOS_TMU_REG_INTEN,
+ .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
+ .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
+ .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
+ .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
+ .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
+ .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
+ /* INTEN_RISE3 Not availble in exynos5420 */
+ .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
+ .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
+ .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
+ .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .emul_con = EXYNOS_EMUL_CON,
+ .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
+ .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
+ .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
+};
+
+#define EXYNOS5420_TMU_DATA \
+ .threshold_falling = 10, \
+ .trigger_levels[0] = 85, \
+ .trigger_levels[1] = 103, \
+ .trigger_levels[2] = 110, \
+ .trigger_levels[3] = 120, \
+ .trigger_enable[0] = true, \
+ .trigger_enable[1] = true, \
+ .trigger_enable[2] = true, \
+ .trigger_enable[3] = false, \
+ .trigger_type[0] = THROTTLE_ACTIVE, \
+ .trigger_type[1] = THROTTLE_ACTIVE, \
+ .trigger_type[2] = SW_TRIP, \
+ .trigger_type[3] = HW_TRIP, \
+ .max_trigger_level = 4, \
+ .gain = 8, \
+ .reference_voltage = 16, \
+ .noise_cancel_mode = 4, \
+ .cal_type = TYPE_ONE_POINT_TRIMMING, \
+ .efuse_value = 55, \
+ .min_efuse_value = 40, \
+ .max_efuse_value = 100, \
+ .first_point_trim = 25, \
+ .second_point_trim = 85, \
+ .default_temp_offset = 50, \
+ .freq_tab[0] = { \
+ .freq_clip_max = 800 * 1000, \
+ .temp_level = 85, \
+ }, \
+ .freq_tab[1] = { \
+ .freq_clip_max = 200 * 1000, \
+ .temp_level = 103, \
+ }, \
+ .freq_tab_count = 2, \
+ .type = SOC_ARCH_EXYNOS5420, \
+ .registers = &exynos5420_tmu_registers, \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
+ TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
+ TMU_SUPPORT_EMUL_TIME)
+
+#define EXYNOS5420_TMU_DATA_SHARED \
+ .threshold_falling = 10, \
+ .trigger_levels[0] = 85, \
+ .trigger_levels[1] = 103, \
+ .trigger_levels[2] = 110, \
+ .trigger_levels[3] = 120, \
+ .trigger_enable[0] = true, \
+ .trigger_enable[1] = true, \
+ .trigger_enable[2] = true, \
+ .trigger_enable[3] = false, \
+ .trigger_type[0] = THROTTLE_ACTIVE, \
+ .trigger_type[1] = THROTTLE_ACTIVE, \
+ .trigger_type[2] = SW_TRIP, \
+ .trigger_type[3] = HW_TRIP, \
+ .max_trigger_level = 4, \
+ .gain = 8, \
+ .reference_voltage = 16, \
+ .noise_cancel_mode = 4, \
+ .cal_type = TYPE_ONE_POINT_TRIMMING, \
+ .efuse_value = 55, \
+ .min_efuse_value = 40, \
+ .max_efuse_value = 100, \
+ .first_point_trim = 25, \
+ .second_point_trim = 85, \
+ .default_temp_offset = 50, \
+ .freq_tab[0] = { \
+ .freq_clip_max = 800 * 1000, \
+ .temp_level = 85, \
+ }, \
+ .freq_tab[1] = { \
+ .freq_clip_max = 200 * 1000, \
+ .temp_level = 103, \
+ }, \
+ .freq_tab_count = 2, \
+ .type = SOC_ARCH_EXYNOS5420, \
+ .registers = &exynos5420_tmu_registers, \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
+ TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
+ TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_ADDRESS_MULTIPLE)
+
+struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
+ .tmu_data = {
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ },
+ .tmu_count = 5,
+};
+#endif
+
#if defined(CONFIG_SOC_EXYNOS5440)
static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index 8788a87..3ce94cd 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -153,4 +153,11 @@ extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
#define EXYNOS5440_TMU_DRV_DATA (NULL)
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
+#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
+#else
+#define EXYNOS5420_TMU_DRV_DATA (NULL)
+#endif
+
#endif /*_EXYNOS_TMU_DATA_H*/
--
1.7.9.5
On Exynos5440 and Exynos5420 there are registers common
across the TMU channels.
To support that, we introduced a ADDRESS_MULTIPLE flag in the
driver and the 2nd set of register base and size are provided
in the "reg" property of the node.
As per Amit's suggestion, this patch changes the base_common
to base_second and SHARED_MEMORY to ADDRESS_MULTIPLE.
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v2:
Changed the flag name from SHARED_MEMORY to ADDRESS_MULTIPLE.
https://lkml.org/lkml/2013/8/1/38
.../devicetree/bindings/thermal/exynos-thermal.txt | 4 ++--
drivers/thermal/samsung/exynos_tmu.c | 12 ++++++------
drivers/thermal/samsung/exynos_tmu.h | 4 ++--
drivers/thermal/samsung/exynos_tmu_data.c | 2 +-
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 284f530..116cca0 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -11,8 +11,8 @@
- reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
interrupt related then 2 set of register has to supplied. First set
- belongs to each instance of TMU and second set belongs to common TMU
- registers.
+ belongs to each instance of TMU and second set belongs to second set
+ of common TMU registers.
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index d201ed8..3a55caf 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -41,7 +41,7 @@
* @id: identifier of the one instance of the TMU controller.
* @pdata: pointer to the tmu platform/configuration data
* @base: base address of the single instance of the TMU controller.
- * @base_common: base address of the common registers of the TMU controller.
+ * @base_second: base address of the common registers of the TMU controller.
* @irq: irq number of the TMU controller.
* @soc: id of the SOC type.
* @irq_work: pointer to the irq work structure.
@@ -56,7 +56,7 @@ struct exynos_tmu_data {
int id;
struct exynos_tmu_platform_data *pdata;
void __iomem *base;
- void __iomem *base_common;
+ void __iomem *base_second;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -297,7 +297,7 @@ skip_calib_data:
}
/*Clear the PMIN in the common TMU register*/
if (reg->tmu_pmin && !data->id)
- writel(0, data->base_common + reg->tmu_pmin);
+ writel(0, data->base_second + reg->tmu_pmin);
out:
clk_disable(data->clk);
mutex_unlock(&data->lock);
@@ -451,7 +451,7 @@ static void exynos_tmu_work(struct work_struct *work)
/* Find which sensor generated this interrupt */
if (reg->tmu_irqstatus) {
- val_type = readl(data->base_common + reg->tmu_irqstatus);
+ val_type = readl(data->base_second + reg->tmu_irqstatus);
if (!((val_type >> data->id) & 0x1))
goto out;
}
@@ -582,7 +582,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
* Check if the TMU shares some registers and then try to map the
* memory of common registers.
*/
- if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
+ if (!TMU_SUPPORTS(pdata, ADDRESS_MULTIPLE))
return 0;
if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
@@ -590,7 +590,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
return -ENODEV;
}
- data->base_common = devm_ioremap(&pdev->dev, res.start,
+ data->base_second = devm_ioremap(&pdev->dev, res.start,
resource_size(&res));
if (!data->base) {
dev_err(&pdev->dev, "Failed to ioremap memory\n");
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index 7c6c34a..ebd2ec1 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -59,7 +59,7 @@ enum soc_type {
* state(active/idle) can be checked.
* TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
* sample time.
- * TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU
+ * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU
* sensors shares some common registers.
* TMU_SUPPORT - macro to compare the above features with the supplied.
*/
@@ -69,7 +69,7 @@ enum soc_type {
#define TMU_SUPPORT_FALLING_TRIP BIT(3)
#define TMU_SUPPORT_READY_STATUS BIT(4)
#define TMU_SUPPORT_EMUL_TIME BIT(5)
-#define TMU_SUPPORT_SHARED_MEMORY BIT(6)
+#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(6)
#define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b)
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 23fea23..58570d0 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -239,7 +239,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.type = SOC_ARCH_EXYNOS5440, \
.registers = &exynos5440_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
- TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY),
+ TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_ADDRESS_MULTIPLE),
struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
.tmu_data = {
--
1.7.9.5
The FALL interrupt related en, status bits are available at an offset of
16 on INTEN, INTSTAT registers and at an offset of
12 on INTCLEAR register.
This patch corrects the same for exyns5250 and exynos5440
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v1:
None
drivers/thermal/samsung/exynos_tmu.c | 2 +-
drivers/thermal/samsung/exynos_tmu.h | 2 ++
drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
4 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index ec01dfe..d201ed8 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -265,7 +265,7 @@ skip_calib_data:
data->base + reg->threshold_th1);
writel((reg->inten_rise_mask << reg->inten_rise_shift) |
- (reg->inten_fall_mask << reg->inten_fall_shift),
+ (reg->inten_fall_mask << reg->intclr_fall_shift),
data->base + reg->tmu_intclear);
/* if last threshold limit is also present */
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index b364c9e..7c6c34a 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -134,6 +134,7 @@ enum soc_type {
* @inten_fall3_shift: shift bits of falling 3 interrupt bits.
* @tmu_intstat: Register containing the interrupt status values.
* @tmu_intclear: Register for clearing the raised interrupt status.
+ * @intclr_fall_shift: shift bits for interrupt clear fall 0
* @emul_con: TMU emulation controller register.
* @emul_temp_shift: shift bits of emulation temperature.
* @emul_time_shift: shift bits of emulation time.
@@ -204,6 +205,7 @@ struct exynos_tmu_registers {
u32 tmu_intstat;
u32 tmu_intclear;
+ u32 intclr_fall_shift;
u32 emul_con;
u32 emul_temp_shift;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 9002499..23fea23 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
.emul_con = EXYNOS_EMUL_CON,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
.emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
@@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
.tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
+ .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
.tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
.emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index dc7feb5..8788a87 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -69,9 +69,10 @@
#define EXYNOS_TMU_RISE_INT_MASK 0x111
#define EXYNOS_TMU_RISE_INT_SHIFT 0
#define EXYNOS_TMU_FALL_INT_MASK 0x111
-#define EXYNOS_TMU_FALL_INT_SHIFT 12
+#define EXYNOS_TMU_FALL_INT_SHIFT 16
#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
+#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
#define EXYNOS_TMU_TRIP_MODE_MASK 0x7
#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
--
1.7.9.5
On Wed, Sep 4, 2013 at 9:53 AM, Naveen Krishna Chatradhi
<[email protected]> wrote:
> On Exynos5440 and Exynos5420 there are registers common
> across the TMU channels.
>
> To support that, we introduced a ADDRESS_MULTIPLE flag in the
> driver and the 2nd set of register base and size are provided
> in the "reg" property of the node.
>
> As per Amit's suggestion, this patch changes the base_common
> to base_second and SHARED_MEMORY to ADDRESS_MULTIPLE.
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
The changes look good. For all the 3 patches in the series,
Acked-by: Amit Daniel Kachhap <[email protected]>
Reviewed-by: Amit Daniel Kachhap<[email protected]>
Thanks,
Amit Daniel
> ---
> Changes since v2:
> Changed the flag name from SHARED_MEMORY to ADDRESS_MULTIPLE.
> https://lkml.org/lkml/2013/8/1/38
>
> .../devicetree/bindings/thermal/exynos-thermal.txt | 4 ++--
> drivers/thermal/samsung/exynos_tmu.c | 12 ++++++------
> drivers/thermal/samsung/exynos_tmu.h | 4 ++--
> drivers/thermal/samsung/exynos_tmu_data.c | 2 +-
> 4 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> index 284f530..116cca0 100644
> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> @@ -11,8 +11,8 @@
> - reg : Address range of the thermal registers. For soc's which has multiple
> instances of TMU and some registers are shared across all TMU's like
> interrupt related then 2 set of register has to supplied. First set
> - belongs to each instance of TMU and second set belongs to common TMU
> - registers.
> + belongs to each instance of TMU and second set belongs to second set
> + of common TMU registers.
> - interrupts : Should contain interrupt for thermal system
> - clocks : The main clock for TMU device
> - clock-names : Thermal system clock name
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index d201ed8..3a55caf 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -41,7 +41,7 @@
> * @id: identifier of the one instance of the TMU controller.
> * @pdata: pointer to the tmu platform/configuration data
> * @base: base address of the single instance of the TMU controller.
> - * @base_common: base address of the common registers of the TMU controller.
> + * @base_second: base address of the common registers of the TMU controller.
> * @irq: irq number of the TMU controller.
> * @soc: id of the SOC type.
> * @irq_work: pointer to the irq work structure.
> @@ -56,7 +56,7 @@ struct exynos_tmu_data {
> int id;
> struct exynos_tmu_platform_data *pdata;
> void __iomem *base;
> - void __iomem *base_common;
> + void __iomem *base_second;
> int irq;
> enum soc_type soc;
> struct work_struct irq_work;
> @@ -297,7 +297,7 @@ skip_calib_data:
> }
> /*Clear the PMIN in the common TMU register*/
> if (reg->tmu_pmin && !data->id)
> - writel(0, data->base_common + reg->tmu_pmin);
> + writel(0, data->base_second + reg->tmu_pmin);
> out:
> clk_disable(data->clk);
> mutex_unlock(&data->lock);
> @@ -451,7 +451,7 @@ static void exynos_tmu_work(struct work_struct *work)
>
> /* Find which sensor generated this interrupt */
> if (reg->tmu_irqstatus) {
> - val_type = readl(data->base_common + reg->tmu_irqstatus);
> + val_type = readl(data->base_second + reg->tmu_irqstatus);
> if (!((val_type >> data->id) & 0x1))
> goto out;
> }
> @@ -582,7 +582,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
> * Check if the TMU shares some registers and then try to map the
> * memory of common registers.
> */
> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
> + if (!TMU_SUPPORTS(pdata, ADDRESS_MULTIPLE))
> return 0;
>
> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
> @@ -590,7 +590,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
> return -ENODEV;
> }
>
> - data->base_common = devm_ioremap(&pdev->dev, res.start,
> + data->base_second = devm_ioremap(&pdev->dev, res.start,
> resource_size(&res));
> if (!data->base) {
> dev_err(&pdev->dev, "Failed to ioremap memory\n");
> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> index 7c6c34a..ebd2ec1 100644
> --- a/drivers/thermal/samsung/exynos_tmu.h
> +++ b/drivers/thermal/samsung/exynos_tmu.h
> @@ -59,7 +59,7 @@ enum soc_type {
> * state(active/idle) can be checked.
> * TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
> * sample time.
> - * TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU
> + * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU
> * sensors shares some common registers.
> * TMU_SUPPORT - macro to compare the above features with the supplied.
> */
> @@ -69,7 +69,7 @@ enum soc_type {
> #define TMU_SUPPORT_FALLING_TRIP BIT(3)
> #define TMU_SUPPORT_READY_STATUS BIT(4)
> #define TMU_SUPPORT_EMUL_TIME BIT(5)
> -#define TMU_SUPPORT_SHARED_MEMORY BIT(6)
> +#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(6)
>
> #define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b)
>
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> index 23fea23..58570d0 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> @@ -239,7 +239,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> .type = SOC_ARCH_EXYNOS5440, \
> .registers = &exynos5440_tmu_registers, \
> .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
> - TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY),
> + TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_ADDRESS_MULTIPLE),
>
> struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
> .tmu_data = {
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On 4 September 2013 09:53, Naveen Krishna Chatradhi
<[email protected]> wrote:
> This patch adds the neccessary register changes and arch information
> to support Exynos5420 SoCs
> Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
>
> Also updated the Documentation at
> Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>
> Note: The platform data structure will be handled properly once the driver
> moves to complete device driver solution.
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> ---
> Changes since v1:
> 1. modified the platform data structure in order to pass SHARED flag
> for channels that need sharing of address space.
> 2. https://lkml.org/lkml/2013/8/1/38 is merged into this patch.
> As the changes are minimum and can be added here.
>
> .../devicetree/bindings/thermal/exynos-thermal.txt | 39 ++++++
> drivers/thermal/samsung/exynos_tmu.c | 14 ++-
> drivers/thermal/samsung/exynos_tmu.h | 1 +
> drivers/thermal/samsung/exynos_tmu_data.c | 130 ++++++++++++++++++++
> drivers/thermal/samsung/exynos_tmu_data.h | 7 ++
> 5 files changed, 189 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> index 116cca0..d70f2a4 100644
> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> @@ -7,12 +7,23 @@
> "samsung,exynos4210-tmu"
> "samsung,exynos5250-tmu"
> "samsung,exynos5440-tmu"
> + "samsung,exynos5420-tmu"
> - interrupt-parent : The phandle for the interrupt controller
> - reg : Address range of the thermal registers. For soc's which has multiple
> instances of TMU and some registers are shared across all TMU's like
> interrupt related then 2 set of register has to supplied. First set
> belongs to each instance of TMU and second set belongs to second set
> of common TMU registers.
> + NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
> + channels 2, 3 and 4
> +
> + TRIMINFO at 0x1006c000 contains data for TMU channel 3
> + TRIMINFO at 0x100a0000 contains data for TMU channel 4
> + TRIMINFO at 0x10068000 contains data for TMU channel 2
> +
> + The misplaced register address is passed through devicetree as the
> + second base
> +
> - interrupts : Should contain interrupt for thermal system
> - clocks : The main clock for TMU device
> - clock-names : Thermal system clock name
> @@ -43,6 +54,34 @@ Example 2):
> clock-names = "tmu_apbif";
> };
>
> +Example 3): (In case of Exynos5420)
> + /* tmu for CPU2 */
> + tmu@10068000 {
> + compatible = "samsung,exynos5420-tmu";
> + reg = <0x10068000 0x100>, <0x1006c000 0x4>;
> + interrupts = <0 184 0>;
> + clocks = <&clock 318>;
> + clock-names = "tmu_apbif";
> + };
> +
> + /* tmu for CPU3 */
> + tmu@1006c000 {
> + compatible = "samsung,exynos5420-tmu";
> + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> + interrupts = <0 185 0>;
> + clocks = <&clock 318>;
> + clock-names = "tmu_apbif";
> + };
> +
> + /* tmu for GPU */
> + tmu@100a0000 {
> + compatible = "samsung,exynos5420-tmu";
> + reg = <0x100a0000 0x100>, <0x10068000 0x4>;
> + interrupts = <0 215 0>;
> + clocks = <&clock 318>;
> + clock-names = "tmu_apbif";
> + };
> +
> Note: For multi-instance tmu each instance should have an alias correctly
> numbered in "aliases" node.
>
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index 3a55caf..6d34652 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -186,7 +186,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
> EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
> }
> } else {
> - trim_info = readl(data->base + reg->triminfo_data);
> + /* On exynos5420 the triminfo register is in the shared space */
> + if (data->base_second && (data->soc == SOC_ARCH_EXYNOS5420))
> + trim_info = readl(data->base_second +
> + reg->triminfo_data);
> + else
> + trim_info = readl(data->base + reg->triminfo_data);
> }
> data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
> data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
> @@ -499,6 +504,10 @@ static const struct of_device_id exynos_tmu_match[] = {
> .compatible = "samsung,exynos5440-tmu",
> .data = (void *)EXYNOS5440_TMU_DRV_DATA,
> },
> + {
> + .compatible = "samsung,exynos5420-tmu",
> + .data = (void *)EXYNOS5420_TMU_DRV_DATA,
> + },
> {},
> };
> MODULE_DEVICE_TABLE(of, exynos_tmu_match);
> @@ -637,7 +646,8 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>
> if (pdata->type == SOC_ARCH_EXYNOS ||
> pdata->type == SOC_ARCH_EXYNOS4210 ||
> - pdata->type == SOC_ARCH_EXYNOS5440)
> + pdata->type == SOC_ARCH_EXYNOS5440 ||
> + pdata->type == SOC_ARCH_EXYNOS5420)
> data->soc = pdata->type;
> else {
> ret = -EINVAL;
> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> index ebd2ec1..774ab03 100644
> --- a/drivers/thermal/samsung/exynos_tmu.h
> +++ b/drivers/thermal/samsung/exynos_tmu.h
> @@ -43,6 +43,7 @@ enum soc_type {
> SOC_ARCH_EXYNOS4210 = 1,
> SOC_ARCH_EXYNOS,
> SOC_ARCH_EXYNOS5440,
> + SOC_ARCH_EXYNOS5420,
> };
>
> /**
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> index 58570d0..a6d5cb5 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> @@ -177,6 +177,136 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
> };
> #endif
>
> +#if defined(CONFIG_SOC_EXYNOS5420)
> +static const struct exynos_tmu_registers exynos5420_tmu_registers = {
> + .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
> + .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
> + .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
> + .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
> + .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
> + .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
> + .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
> + .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
> + .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
> + .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
> + .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
> + .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
> + .tmu_status = EXYNOS_TMU_REG_STATUS,
> + .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
> + .threshold_th0 = EXYNOS_THD_TEMP_RISE,
> + .threshold_th1 = EXYNOS_THD_TEMP_FALL,
> + .tmu_inten = EXYNOS_TMU_REG_INTEN,
> + .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
> + .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
> + .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
> + .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
> + .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
> + .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
> + .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
> + /* INTEN_RISE3 Not availble in exynos5420 */
> + .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
> + .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> + .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> + .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> + .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
> + .emul_con = EXYNOS_EMUL_CON,
> + .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> + .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> + .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
> +};
> +
> +#define EXYNOS5420_TMU_DATA \
> + .threshold_falling = 10, \
> + .trigger_levels[0] = 85, \
> + .trigger_levels[1] = 103, \
> + .trigger_levels[2] = 110, \
> + .trigger_levels[3] = 120, \
> + .trigger_enable[0] = true, \
> + .trigger_enable[1] = true, \
> + .trigger_enable[2] = true, \
> + .trigger_enable[3] = false, \
> + .trigger_type[0] = THROTTLE_ACTIVE, \
> + .trigger_type[1] = THROTTLE_ACTIVE, \
> + .trigger_type[2] = SW_TRIP, \
> + .trigger_type[3] = HW_TRIP, \
> + .max_trigger_level = 4, \
> + .gain = 8, \
> + .reference_voltage = 16, \
> + .noise_cancel_mode = 4, \
> + .cal_type = TYPE_ONE_POINT_TRIMMING, \
> + .efuse_value = 55, \
> + .min_efuse_value = 40, \
> + .max_efuse_value = 100, \
> + .first_point_trim = 25, \
> + .second_point_trim = 85, \
> + .default_temp_offset = 50, \
> + .freq_tab[0] = { \
> + .freq_clip_max = 800 * 1000, \
> + .temp_level = 85, \
> + }, \
> + .freq_tab[1] = { \
> + .freq_clip_max = 200 * 1000, \
> + .temp_level = 103, \
> + }, \
> + .freq_tab_count = 2, \
> + .type = SOC_ARCH_EXYNOS5420, \
> + .registers = &exynos5420_tmu_registers, \
> + .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
> + TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
> + TMU_SUPPORT_EMUL_TIME)
> +
> +#define EXYNOS5420_TMU_DATA_SHARED \
> + .threshold_falling = 10, \
> + .trigger_levels[0] = 85, \
> + .trigger_levels[1] = 103, \
> + .trigger_levels[2] = 110, \
> + .trigger_levels[3] = 120, \
> + .trigger_enable[0] = true, \
> + .trigger_enable[1] = true, \
> + .trigger_enable[2] = true, \
> + .trigger_enable[3] = false, \
> + .trigger_type[0] = THROTTLE_ACTIVE, \
> + .trigger_type[1] = THROTTLE_ACTIVE, \
> + .trigger_type[2] = SW_TRIP, \
> + .trigger_type[3] = HW_TRIP, \
> + .max_trigger_level = 4, \
> + .gain = 8, \
> + .reference_voltage = 16, \
> + .noise_cancel_mode = 4, \
> + .cal_type = TYPE_ONE_POINT_TRIMMING, \
> + .efuse_value = 55, \
> + .min_efuse_value = 40, \
> + .max_efuse_value = 100, \
> + .first_point_trim = 25, \
> + .second_point_trim = 85, \
> + .default_temp_offset = 50, \
> + .freq_tab[0] = { \
> + .freq_clip_max = 800 * 1000, \
> + .temp_level = 85, \
> + }, \
> + .freq_tab[1] = { \
> + .freq_clip_max = 200 * 1000, \
> + .temp_level = 103, \
> + }, \
> + .freq_tab_count = 2, \
> + .type = SOC_ARCH_EXYNOS5420, \
> + .registers = &exynos5420_tmu_registers, \
> + .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
> + TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
> + TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_ADDRESS_MULTIPLE)
> +
> +struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
> + .tmu_data = {
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA },
> + { EXYNOS5420_TMU_DATA_SHARED },
> + { EXYNOS5420_TMU_DATA_SHARED },
> + { EXYNOS5420_TMU_DATA_SHARED },
> + },
> + .tmu_count = 5,
> +};
> +#endif
> +
> #if defined(CONFIG_SOC_EXYNOS5440)
> static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> index 8788a87..3ce94cd 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> @@ -153,4 +153,11 @@ extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
> #define EXYNOS5440_TMU_DRV_DATA (NULL)
> #endif
>
> +#if defined(CONFIG_SOC_EXYNOS5420)
> +extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
> +#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
> +#else
> +#define EXYNOS5420_TMU_DRV_DATA (NULL)
> +#endif
> +
> #endif /*_EXYNOS_TMU_DATA_H*/
> --
> 1.7.9.5
Hello All,
Amit Daniel, has Acked these patches a while ago
Any other review comments or updates on this patch ??
>
Thanks & Regards,
--
Shine bright,
(: Nav :)
Hi,
I would like to see few minor cleanup changes, please see below:
On Thursday, October 03, 2013 05:31:42 PM Naveen Krishna Ch wrote:
> On 4 September 2013 09:53, Naveen Krishna Chatradhi
> <[email protected]> wrote:
> > This patch adds the neccessary register changes and arch information
> > to support Exynos5420 SoCs
> > Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
> >
> > Also updated the Documentation at
> > Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> >
> > Note: The platform data structure will be handled properly once the driver
> > moves to complete device driver solution.
> >
> > Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> > ---
> > Changes since v1:
> > 1. modified the platform data structure in order to pass SHARED flag
> > for channels that need sharing of address space.
> > 2. https://lkml.org/lkml/2013/8/1/38 is merged into this patch.
> > As the changes are minimum and can be added here.
> >
> > .../devicetree/bindings/thermal/exynos-thermal.txt | 39 ++++++
> > drivers/thermal/samsung/exynos_tmu.c | 14 ++-
> > drivers/thermal/samsung/exynos_tmu.h | 1 +
> > drivers/thermal/samsung/exynos_tmu_data.c | 130 ++++++++++++++++++++
> > drivers/thermal/samsung/exynos_tmu_data.h | 7 ++
> > 5 files changed, 189 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> > index 116cca0..d70f2a4 100644
> > --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> > +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> > @@ -7,12 +7,23 @@
> > "samsung,exynos4210-tmu"
> > "samsung,exynos5250-tmu"
> > "samsung,exynos5440-tmu"
> > + "samsung,exynos5420-tmu"
it should come before "samsung,exynos5440-tmu"
> > - interrupt-parent : The phandle for the interrupt controller
> > - reg : Address range of the thermal registers. For soc's which has multiple
> > instances of TMU and some registers are shared across all TMU's like
> > interrupt related then 2 set of register has to supplied. First set
> > belongs to each instance of TMU and second set belongs to second set
> > of common TMU registers.
> > + NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
> > + channels 2, 3 and 4
> > +
> > + TRIMINFO at 0x1006c000 contains data for TMU channel 3
> > + TRIMINFO at 0x100a0000 contains data for TMU channel 4
> > + TRIMINFO at 0x10068000 contains data for TMU channel 2
> > +
> > + The misplaced register address is passed through devicetree as the
> > + second base
> > +
> > - interrupts : Should contain interrupt for thermal system
> > - clocks : The main clock for TMU device
> > - clock-names : Thermal system clock name
> > @@ -43,6 +54,34 @@ Example 2):
> > clock-names = "tmu_apbif";
> > };
> >
> > +Example 3): (In case of Exynos5420)
> > + /* tmu for CPU2 */
> > + tmu@10068000 {
> > + compatible = "samsung,exynos5420-tmu";
> > + reg = <0x10068000 0x100>, <0x1006c000 0x4>;
> > + interrupts = <0 184 0>;
> > + clocks = <&clock 318>;
> > + clock-names = "tmu_apbif";
> > + };
> > +
> > + /* tmu for CPU3 */
> > + tmu@1006c000 {
> > + compatible = "samsung,exynos5420-tmu";
> > + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> > + interrupts = <0 185 0>;
> > + clocks = <&clock 318>;
> > + clock-names = "tmu_apbif";
> > + };
> > +
> > + /* tmu for GPU */
> > + tmu@100a0000 {
> > + compatible = "samsung,exynos5420-tmu";
> > + reg = <0x100a0000 0x100>, <0x10068000 0x4>;
> > + interrupts = <0 215 0>;
> > + clocks = <&clock 318>;
> > + clock-names = "tmu_apbif";
> > + };
> > +
> > Note: For multi-instance tmu each instance should have an alias correctly
> > numbered in "aliases" node.
> >
> > diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> > index 3a55caf..6d34652 100644
> > --- a/drivers/thermal/samsung/exynos_tmu.c
> > +++ b/drivers/thermal/samsung/exynos_tmu.c
> > @@ -186,7 +186,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
> > EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
> > }
> > } else {
> > - trim_info = readl(data->base + reg->triminfo_data);
> > + /* On exynos5420 the triminfo register is in the shared space */
> > + if (data->base_second && (data->soc == SOC_ARCH_EXYNOS5420))
> > + trim_info = readl(data->base_second +
> > + reg->triminfo_data);
> > + else
> > + trim_info = readl(data->base + reg->triminfo_data);
> > }
> > data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
> > data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
> > @@ -499,6 +504,10 @@ static const struct of_device_id exynos_tmu_match[] = {
> > .compatible = "samsung,exynos5440-tmu",
> > .data = (void *)EXYNOS5440_TMU_DRV_DATA,
> > },
> > + {
> > + .compatible = "samsung,exynos5420-tmu",
> > + .data = (void *)EXYNOS5420_TMU_DRV_DATA,
> > + },
it should come before 5440 entry
> > {},
> > };
> > MODULE_DEVICE_TABLE(of, exynos_tmu_match);
> > @@ -637,7 +646,8 @@ static int exynos_tmu_probe(struct platform_device *pdev)
> >
> > if (pdata->type == SOC_ARCH_EXYNOS ||
> > pdata->type == SOC_ARCH_EXYNOS4210 ||
> > - pdata->type == SOC_ARCH_EXYNOS5440)
> > + pdata->type == SOC_ARCH_EXYNOS5440 ||
> > + pdata->type == SOC_ARCH_EXYNOS5420)
please check for 5420 before 5440
> > data->soc = pdata->type;
> > else {
> > ret = -EINVAL;
> > diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> > index ebd2ec1..774ab03 100644
> > --- a/drivers/thermal/samsung/exynos_tmu.h
> > +++ b/drivers/thermal/samsung/exynos_tmu.h
> > @@ -43,6 +43,7 @@ enum soc_type {
> > SOC_ARCH_EXYNOS4210 = 1,
> > SOC_ARCH_EXYNOS,
> > SOC_ARCH_EXYNOS5440,
> > + SOC_ARCH_EXYNOS5420,
5420 should come before 5440
> > };
> >
> > /**
> > diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> > index 58570d0..a6d5cb5 100644
> > --- a/drivers/thermal/samsung/exynos_tmu_data.c
> > +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> > @@ -177,6 +177,136 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
> > };
> > #endif
> >
> > +#if defined(CONFIG_SOC_EXYNOS5420)
> > +static const struct exynos_tmu_registers exynos5420_tmu_registers = {
> > + .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
> > + .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
> > + .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
> > + .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
> > + .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
> > + .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
> > + .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
> > + .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
> > + .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
> > + .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
> > + .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
> > + .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
> > + .tmu_status = EXYNOS_TMU_REG_STATUS,
> > + .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
> > + .threshold_th0 = EXYNOS_THD_TEMP_RISE,
> > + .threshold_th1 = EXYNOS_THD_TEMP_FALL,
> > + .tmu_inten = EXYNOS_TMU_REG_INTEN,
> > + .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
> > + .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
> > + .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
> > + .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
> > + .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
> > + .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
> > + .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
> > + /* INTEN_RISE3 Not availble in exynos5420 */
> > + .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
> > + .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> > + .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> > + .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> > + .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
> > + .emul_con = EXYNOS_EMUL_CON,
> > + .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> > + .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> > + .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
> > +};
> > +
> > +#define EXYNOS5420_TMU_DATA \
> > + .threshold_falling = 10, \
> > + .trigger_levels[0] = 85, \
> > + .trigger_levels[1] = 103, \
> > + .trigger_levels[2] = 110, \
> > + .trigger_levels[3] = 120, \
> > + .trigger_enable[0] = true, \
> > + .trigger_enable[1] = true, \
> > + .trigger_enable[2] = true, \
> > + .trigger_enable[3] = false, \
> > + .trigger_type[0] = THROTTLE_ACTIVE, \
> > + .trigger_type[1] = THROTTLE_ACTIVE, \
> > + .trigger_type[2] = SW_TRIP, \
> > + .trigger_type[3] = HW_TRIP, \
> > + .max_trigger_level = 4, \
> > + .gain = 8, \
> > + .reference_voltage = 16, \
> > + .noise_cancel_mode = 4, \
> > + .cal_type = TYPE_ONE_POINT_TRIMMING, \
> > + .efuse_value = 55, \
> > + .min_efuse_value = 40, \
> > + .max_efuse_value = 100, \
> > + .first_point_trim = 25, \
> > + .second_point_trim = 85, \
> > + .default_temp_offset = 50, \
> > + .freq_tab[0] = { \
> > + .freq_clip_max = 800 * 1000, \
> > + .temp_level = 85, \
> > + }, \
> > + .freq_tab[1] = { \
> > + .freq_clip_max = 200 * 1000, \
> > + .temp_level = 103, \
> > + }, \
> > + .freq_tab_count = 2, \
> > + .type = SOC_ARCH_EXYNOS5420, \
> > + .registers = &exynos5420_tmu_registers, \
> > + .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
> > + TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
> > + TMU_SUPPORT_EMUL_TIME)
> > +
> > +#define EXYNOS5420_TMU_DATA_SHARED \
> > + .threshold_falling = 10, \
> > + .trigger_levels[0] = 85, \
> > + .trigger_levels[1] = 103, \
> > + .trigger_levels[2] = 110, \
> > + .trigger_levels[3] = 120, \
> > + .trigger_enable[0] = true, \
> > + .trigger_enable[1] = true, \
> > + .trigger_enable[2] = true, \
> > + .trigger_enable[3] = false, \
> > + .trigger_type[0] = THROTTLE_ACTIVE, \
> > + .trigger_type[1] = THROTTLE_ACTIVE, \
> > + .trigger_type[2] = SW_TRIP, \
> > + .trigger_type[3] = HW_TRIP, \
> > + .max_trigger_level = 4, \
> > + .gain = 8, \
> > + .reference_voltage = 16, \
> > + .noise_cancel_mode = 4, \
> > + .cal_type = TYPE_ONE_POINT_TRIMMING, \
> > + .efuse_value = 55, \
> > + .min_efuse_value = 40, \
> > + .max_efuse_value = 100, \
> > + .first_point_trim = 25, \
> > + .second_point_trim = 85, \
> > + .default_temp_offset = 50, \
> > + .freq_tab[0] = { \
> > + .freq_clip_max = 800 * 1000, \
> > + .temp_level = 85, \
> > + }, \
> > + .freq_tab[1] = { \
> > + .freq_clip_max = 200 * 1000, \
> > + .temp_level = 103, \
> > + }, \
> > + .freq_tab_count = 2, \
> > + .type = SOC_ARCH_EXYNOS5420, \
> > + .registers = &exynos5420_tmu_registers, \
> > + .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
> > + TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
> > + TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_ADDRESS_MULTIPLE)
EXYNOS5420_TMU_DATA and EXYNOS5420_TMU_DATA_SHARED are identical
besides .features content so to avoid code duplication please define
__EXYNOS5420_TMU_DATA with all shared entries and just do:
#define EXYNOS5420_TMU_DATA \
__EXYNOS5420_TMU_DATA \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
TMU_SUPPORT_EMUL_TIME)
#define EXYNOS5420_TMU_DATA_SHARED \
__EXYNOS5420_TMU_DATA \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_ADDRESS_MULTIPLE)
> > +struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
> > + .tmu_data = {
> > + { EXYNOS5420_TMU_DATA },
> > + { EXYNOS5420_TMU_DATA },
> > + { EXYNOS5420_TMU_DATA_SHARED },
> > + { EXYNOS5420_TMU_DATA_SHARED },
> > + { EXYNOS5420_TMU_DATA_SHARED },
> > + },
> > + .tmu_count = 5,
> > +};
> > +#endif
> > +
> > #if defined(CONFIG_SOC_EXYNOS5440)
> > static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> > .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
> > diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> > index 8788a87..3ce94cd 100644
> > --- a/drivers/thermal/samsung/exynos_tmu_data.h
> > +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> > @@ -153,4 +153,11 @@ extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
> > #define EXYNOS5440_TMU_DRV_DATA (NULL)
> > #endif
> >
> > +#if defined(CONFIG_SOC_EXYNOS5420)
> > +extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
> > +#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
> > +#else
> > +#define EXYNOS5420_TMU_DRV_DATA (NULL)
> > +#endif
this should come before 5440 entry
> > #endif /*_EXYNOS_TMU_DATA_H*/
> > --
> > 1.7.9.5
> Hello All,
>
> Amit Daniel, has Acked these patches a while ago
> Any other review comments or updates on this patch ??
> >
>
>
> Thanks & Regards,
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
Hello Bartlomiej,
On 3 October 2013 18:12, Bartlomiej Zolnierkiewicz
<[email protected]> wrote:
>
> Hi,
>
> I would like to see few minor cleanup changes, please see below:
Sure.
>
> On Thursday, October 03, 2013 05:31:42 PM Naveen Krishna Ch wrote:
>> On 4 September 2013 09:53, Naveen Krishna Chatradhi
>> <[email protected]> wrote:
>> > This patch adds the neccessary register changes and arch information
>> > to support Exynos5420 SoCs
>> > Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
>> >
>> > Also updated the Documentation at
>> > Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> >
>> > Note: The platform data structure will be handled properly once the driver
>> > moves to complete device driver solution.
>> >
>> > Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>> > ---
>> > Changes since v1:
>> > 1. modified the platform data structure in order to pass SHARED flag
>> > for channels that need sharing of address space.
>> > 2. https://lkml.org/lkml/2013/8/1/38 is merged into this patch.
>> > As the changes are minimum and can be added here.
>> >
>> > .../devicetree/bindings/thermal/exynos-thermal.txt | 39 ++++++
>> > drivers/thermal/samsung/exynos_tmu.c | 14 ++-
>> > drivers/thermal/samsung/exynos_tmu.h | 1 +
>> > drivers/thermal/samsung/exynos_tmu_data.c | 130 ++++++++++++++++++++
>> > drivers/thermal/samsung/exynos_tmu_data.h | 7 ++
>> > 5 files changed, 189 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> > index 116cca0..d70f2a4 100644
>> > --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> > +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
>> > @@ -7,12 +7,23 @@
>> > "samsung,exynos4210-tmu"
>> > "samsung,exynos5250-tmu"
>> > "samsung,exynos5440-tmu"
>> > + "samsung,exynos5420-tmu"
>
> it should come before "samsung,exynos5440-tmu"
Done
>
>> > - interrupt-parent : The phandle for the interrupt controller
>> > - reg : Address range of the thermal registers. For soc's which has multiple
>> > instances of TMU and some registers are shared across all TMU's like
>> > interrupt related then 2 set of register has to supplied. First set
>> > belongs to each instance of TMU and second set belongs to second set
>> > of common TMU registers.
>> > + NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
>> > + channels 2, 3 and 4
>> > +
>> > + TRIMINFO at 0x1006c000 contains data for TMU channel 3
>> > + TRIMINFO at 0x100a0000 contains data for TMU channel 4
>> > + TRIMINFO at 0x10068000 contains data for TMU channel 2
>> > +
>> > + The misplaced register address is passed through devicetree as the
>> > + second base
>> > +
>> > - interrupts : Should contain interrupt for thermal system
>> > - clocks : The main clock for TMU device
>> > - clock-names : Thermal system clock name
>> > @@ -43,6 +54,34 @@ Example 2):
>> > clock-names = "tmu_apbif";
>> > };
>> >
>> > +Example 3): (In case of Exynos5420)
>> > + /* tmu for CPU2 */
>> > + tmu@10068000 {
>> > + compatible = "samsung,exynos5420-tmu";
>> > + reg = <0x10068000 0x100>, <0x1006c000 0x4>;
>> > + interrupts = <0 184 0>;
>> > + clocks = <&clock 318>;
>> > + clock-names = "tmu_apbif";
>> > + };
>> > +
>> > + /* tmu for CPU3 */
>> > + tmu@1006c000 {
>> > + compatible = "samsung,exynos5420-tmu";
>> > + reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
>> > + interrupts = <0 185 0>;
>> > + clocks = <&clock 318>;
>> > + clock-names = "tmu_apbif";
>> > + };
>> > +
>> > + /* tmu for GPU */
>> > + tmu@100a0000 {
>> > + compatible = "samsung,exynos5420-tmu";
>> > + reg = <0x100a0000 0x100>, <0x10068000 0x4>;
>> > + interrupts = <0 215 0>;
>> > + clocks = <&clock 318>;
>> > + clock-names = "tmu_apbif";
>> > + };
>> > +
>> > Note: For multi-instance tmu each instance should have an alias correctly
>> > numbered in "aliases" node.
>> >
>> > diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>> > index 3a55caf..6d34652 100644
>> > --- a/drivers/thermal/samsung/exynos_tmu.c
>> > +++ b/drivers/thermal/samsung/exynos_tmu.c
>> > @@ -186,7 +186,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
>> > EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
>> > }
>> > } else {
>> > - trim_info = readl(data->base + reg->triminfo_data);
>> > + /* On exynos5420 the triminfo register is in the shared space */
>> > + if (data->base_second && (data->soc == SOC_ARCH_EXYNOS5420))
>> > + trim_info = readl(data->base_second +
>> > + reg->triminfo_data);
>> > + else
>> > + trim_info = readl(data->base + reg->triminfo_data);
>> > }
>> > data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
>> > data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
>> > @@ -499,6 +504,10 @@ static const struct of_device_id exynos_tmu_match[] = {
>> > .compatible = "samsung,exynos5440-tmu",
>> > .data = (void *)EXYNOS5440_TMU_DRV_DATA,
>> > },
>> > + {
>> > + .compatible = "samsung,exynos5420-tmu",
>> > + .data = (void *)EXYNOS5420_TMU_DRV_DATA,
>> > + },
>
> it should come before 5440 entry
Done
>
>> > {},
>> > };
>> > MODULE_DEVICE_TABLE(of, exynos_tmu_match);
>> > @@ -637,7 +646,8 @@ static int exynos_tmu_probe(struct platform_device *pdev)
>> >
>> > if (pdata->type == SOC_ARCH_EXYNOS ||
>> > pdata->type == SOC_ARCH_EXYNOS4210 ||
>> > - pdata->type == SOC_ARCH_EXYNOS5440)
>> > + pdata->type == SOC_ARCH_EXYNOS5440 ||
>> > + pdata->type == SOC_ARCH_EXYNOS5420)
>
> please check for 5420 before 5440
Done
>
>> > data->soc = pdata->type;
>> > else {
>> > ret = -EINVAL;
>> > diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
>> > index ebd2ec1..774ab03 100644
>> > --- a/drivers/thermal/samsung/exynos_tmu.h
>> > +++ b/drivers/thermal/samsung/exynos_tmu.h
>> > @@ -43,6 +43,7 @@ enum soc_type {
>> > SOC_ARCH_EXYNOS4210 = 1,
>> > SOC_ARCH_EXYNOS,
>> > SOC_ARCH_EXYNOS5440,
>> > + SOC_ARCH_EXYNOS5420,
>
> 5420 should come before 5440
Done
>
>> > };
>> >
>> > /**
>> > diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
>> > index 58570d0..a6d5cb5 100644
>> > --- a/drivers/thermal/samsung/exynos_tmu_data.c
>> > +++ b/drivers/thermal/samsung/exynos_tmu_data.c
>> > @@ -177,6 +177,136 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
>> > };
>> > #endif
>> >
>> > +#if defined(CONFIG_SOC_EXYNOS5420)
>> > +static const struct exynos_tmu_registers exynos5420_tmu_registers = {
>> > + .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
>> > + .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
>> > + .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
>> > + .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
>> > + .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
>> > + .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
>> > + .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
>> > + .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
>> > + .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
>> > + .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
>> > + .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
>> > + .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
>> > + .tmu_status = EXYNOS_TMU_REG_STATUS,
>> > + .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
>> > + .threshold_th0 = EXYNOS_THD_TEMP_RISE,
>> > + .threshold_th1 = EXYNOS_THD_TEMP_FALL,
>> > + .tmu_inten = EXYNOS_TMU_REG_INTEN,
>> > + .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
>> > + .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
>> > + .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
>> > + .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
>> > + .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
>> > + .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
>> > + .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
>> > + /* INTEN_RISE3 Not availble in exynos5420 */
>> > + .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
>> > + .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
>> > + .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
>> > + .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
>> > + .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
>> > + .emul_con = EXYNOS_EMUL_CON,
>> > + .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
>> > + .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
>> > + .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
>> > +};
>> > +
>> > +#define EXYNOS5420_TMU_DATA \
>> > + .threshold_falling = 10, \
>> > + .trigger_levels[0] = 85, \
>> > + .trigger_levels[1] = 103, \
>> > + .trigger_levels[2] = 110, \
>> > + .trigger_levels[3] = 120, \
>> > + .trigger_enable[0] = true, \
>> > + .trigger_enable[1] = true, \
>> > + .trigger_enable[2] = true, \
>> > + .trigger_enable[3] = false, \
>> > + .trigger_type[0] = THROTTLE_ACTIVE, \
>> > + .trigger_type[1] = THROTTLE_ACTIVE, \
>> > + .trigger_type[2] = SW_TRIP, \
>> > + .trigger_type[3] = HW_TRIP, \
>> > + .max_trigger_level = 4, \
>> > + .gain = 8, \
>> > + .reference_voltage = 16, \
>> > + .noise_cancel_mode = 4, \
>> > + .cal_type = TYPE_ONE_POINT_TRIMMING, \
>> > + .efuse_value = 55, \
>> > + .min_efuse_value = 40, \
>> > + .max_efuse_value = 100, \
>> > + .first_point_trim = 25, \
>> > + .second_point_trim = 85, \
>> > + .default_temp_offset = 50, \
>> > + .freq_tab[0] = { \
>> > + .freq_clip_max = 800 * 1000, \
>> > + .temp_level = 85, \
>> > + }, \
>> > + .freq_tab[1] = { \
>> > + .freq_clip_max = 200 * 1000, \
>> > + .temp_level = 103, \
>> > + }, \
>> > + .freq_tab_count = 2, \
>> > + .type = SOC_ARCH_EXYNOS5420, \
>> > + .registers = &exynos5420_tmu_registers, \
>> > + .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
>> > + TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
>> > + TMU_SUPPORT_EMUL_TIME)
>> > +
>> > +#define EXYNOS5420_TMU_DATA_SHARED \
>> > + .threshold_falling = 10, \
>> > + .trigger_levels[0] = 85, \
>> > + .trigger_levels[1] = 103, \
>> > + .trigger_levels[2] = 110, \
>> > + .trigger_levels[3] = 120, \
>> > + .trigger_enable[0] = true, \
>> > + .trigger_enable[1] = true, \
>> > + .trigger_enable[2] = true, \
>> > + .trigger_enable[3] = false, \
>> > + .trigger_type[0] = THROTTLE_ACTIVE, \
>> > + .trigger_type[1] = THROTTLE_ACTIVE, \
>> > + .trigger_type[2] = SW_TRIP, \
>> > + .trigger_type[3] = HW_TRIP, \
>> > + .max_trigger_level = 4, \
>> > + .gain = 8, \
>> > + .reference_voltage = 16, \
>> > + .noise_cancel_mode = 4, \
>> > + .cal_type = TYPE_ONE_POINT_TRIMMING, \
>> > + .efuse_value = 55, \
>> > + .min_efuse_value = 40, \
>> > + .max_efuse_value = 100, \
>> > + .first_point_trim = 25, \
>> > + .second_point_trim = 85, \
>> > + .default_temp_offset = 50, \
>> > + .freq_tab[0] = { \
>> > + .freq_clip_max = 800 * 1000, \
>> > + .temp_level = 85, \
>> > + }, \
>> > + .freq_tab[1] = { \
>> > + .freq_clip_max = 200 * 1000, \
>> > + .temp_level = 103, \
>> > + }, \
>> > + .freq_tab_count = 2, \
>> > + .type = SOC_ARCH_EXYNOS5420, \
>> > + .registers = &exynos5420_tmu_registers, \
>> > + .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
>> > + TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
>> > + TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_ADDRESS_MULTIPLE)
>
> EXYNOS5420_TMU_DATA and EXYNOS5420_TMU_DATA_SHARED are identical
> besides .features content so to avoid code duplication please define
> __EXYNOS5420_TMU_DATA with all shared entries and just do:
>
> #define EXYNOS5420_TMU_DATA \
> __EXYNOS5420_TMU_DATA \
> .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
> TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
> TMU_SUPPORT_EMUL_TIME)
>
> #define EXYNOS5420_TMU_DATA_SHARED \
> __EXYNOS5420_TMU_DATA \
> .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
> TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
> TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_ADDRESS_MULTIPLE)
yeah, It saves.
>
>> > +struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
>> > + .tmu_data = {
>> > + { EXYNOS5420_TMU_DATA },
>> > + { EXYNOS5420_TMU_DATA },
>> > + { EXYNOS5420_TMU_DATA_SHARED },
>> > + { EXYNOS5420_TMU_DATA_SHARED },
>> > + { EXYNOS5420_TMU_DATA_SHARED },
>> > + },
>> > + .tmu_count = 5,
>> > +};
>> > +#endif
>> > +
>> > #if defined(CONFIG_SOC_EXYNOS5440)
>> > static const struct exynos_tmu_registers exynos5440_tmu_registers = {
>> > .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
>> > diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
>> > index 8788a87..3ce94cd 100644
>> > --- a/drivers/thermal/samsung/exynos_tmu_data.h
>> > +++ b/drivers/thermal/samsung/exynos_tmu_data.h
>> > @@ -153,4 +153,11 @@ extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
>> > #define EXYNOS5440_TMU_DRV_DATA (NULL)
>> > #endif
>> >
>> > +#if defined(CONFIG_SOC_EXYNOS5420)
>> > +extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
>> > +#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
>> > +#else
>> > +#define EXYNOS5420_TMU_DRV_DATA (NULL)
>> > +#endif
>
> this should come before 5440 entry
Done
>
>> > #endif /*_EXYNOS_TMU_DATA_H*/
>> > --
>> > 1.7.9.5
>> Hello All,
>>
>> Amit Daniel, has Acked these patches a while ago
>> Any other review comments or updates on this patch ??
>> >
>>
>>
>> Thanks & Regards,
>
> Best regards,
Thanks for review and the suggestions. will post v4 right away.
> --
> Bartlomiej Zolnierkiewicz
> Samsung R&D Institute Poland
> Samsung Electronics
>
--
Shine bright,
(: Nav :)
The FALL interrupt related en, status bits are available at an offset of
16 on INTEN, INTSTAT registers and at an offset of
12 on INTCLEAR register.
This patch corrects the same for exyns5250 and exynos5440
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v1:
Changes since v2:
Changes since v3:
None
drivers/thermal/samsung/exynos_tmu.c | 2 +-
drivers/thermal/samsung/exynos_tmu.h | 2 ++
drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
4 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index b43afda..af69209 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -265,7 +265,7 @@ skip_calib_data:
data->base + reg->threshold_th1);
writel((reg->inten_rise_mask << reg->inten_rise_shift) |
- (reg->inten_fall_mask << reg->inten_fall_shift),
+ (reg->inten_fall_mask << reg->intclr_fall_shift),
data->base + reg->tmu_intclear);
/* if last threshold limit is also present */
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index b364c9e..7c6c34a 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -134,6 +134,7 @@ enum soc_type {
* @inten_fall3_shift: shift bits of falling 3 interrupt bits.
* @tmu_intstat: Register containing the interrupt status values.
* @tmu_intclear: Register for clearing the raised interrupt status.
+ * @intclr_fall_shift: shift bits for interrupt clear fall 0
* @emul_con: TMU emulation controller register.
* @emul_temp_shift: shift bits of emulation temperature.
* @emul_time_shift: shift bits of emulation time.
@@ -204,6 +205,7 @@ struct exynos_tmu_registers {
u32 tmu_intstat;
u32 tmu_intclear;
+ u32 intclr_fall_shift;
u32 emul_con;
u32 emul_temp_shift;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 9002499..23fea23 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
.emul_con = EXYNOS_EMUL_CON,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
.emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
@@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
.tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
+ .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
.tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
.emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index dc7feb5..8788a87 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -69,9 +69,10 @@
#define EXYNOS_TMU_RISE_INT_MASK 0x111
#define EXYNOS_TMU_RISE_INT_SHIFT 0
#define EXYNOS_TMU_FALL_INT_MASK 0x111
-#define EXYNOS_TMU_FALL_INT_SHIFT 12
+#define EXYNOS_TMU_FALL_INT_SHIFT 16
#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
+#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
#define EXYNOS_TMU_TRIP_MODE_MASK 0x7
#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
--
1.7.10.4
On Exynos5440 and Exynos5420 there are registers common
across the TMU channels.
To support that, we introduced a ADDRESS_MULTIPLE flag in the
driver and the 2nd set of register base and size are provided
in the "reg" property of the node.
As per Amit's suggestion, this patch changes the base_common
to base_second and SHARED_MEMORY to ADDRESS_MULTIPLE.
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v1:
None
Changes since v2:
Changed the flag name from SHARED_MEMORY to ADDRESS_MULTIPLE.
https://lkml.org/lkml/2013/8/1/38
Changes since v3:
None
.../devicetree/bindings/thermal/exynos-thermal.txt | 4 ++--
drivers/thermal/samsung/exynos_tmu.c | 12 ++++++------
drivers/thermal/samsung/exynos_tmu.h | 4 ++--
drivers/thermal/samsung/exynos_tmu_data.c | 2 +-
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 284f530..116cca0 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -11,8 +11,8 @@
- reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
interrupt related then 2 set of register has to supplied. First set
- belongs to each instance of TMU and second set belongs to common TMU
- registers.
+ belongs to each instance of TMU and second set belongs to second set
+ of common TMU registers.
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index af69209..40c4243 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -41,7 +41,7 @@
* @id: identifier of the one instance of the TMU controller.
* @pdata: pointer to the tmu platform/configuration data
* @base: base address of the single instance of the TMU controller.
- * @base_common: base address of the common registers of the TMU controller.
+ * @base_second: base address of the common registers of the TMU controller.
* @irq: irq number of the TMU controller.
* @soc: id of the SOC type.
* @irq_work: pointer to the irq work structure.
@@ -56,7 +56,7 @@ struct exynos_tmu_data {
int id;
struct exynos_tmu_platform_data *pdata;
void __iomem *base;
- void __iomem *base_common;
+ void __iomem *base_second;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -297,7 +297,7 @@ skip_calib_data:
}
/*Clear the PMIN in the common TMU register*/
if (reg->tmu_pmin && !data->id)
- writel(0, data->base_common + reg->tmu_pmin);
+ writel(0, data->base_second + reg->tmu_pmin);
out:
clk_disable(data->clk);
mutex_unlock(&data->lock);
@@ -451,7 +451,7 @@ static void exynos_tmu_work(struct work_struct *work)
/* Find which sensor generated this interrupt */
if (reg->tmu_irqstatus) {
- val_type = readl(data->base_common + reg->tmu_irqstatus);
+ val_type = readl(data->base_second + reg->tmu_irqstatus);
if (!((val_type >> data->id) & 0x1))
goto out;
}
@@ -576,7 +576,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
* Check if the TMU shares some registers and then try to map the
* memory of common registers.
*/
- if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
+ if (!TMU_SUPPORTS(pdata, ADDRESS_MULTIPLE))
return 0;
if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
@@ -584,7 +584,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
return -ENODEV;
}
- data->base_common = devm_ioremap(&pdev->dev, res.start,
+ data->base_second = devm_ioremap(&pdev->dev, res.start,
resource_size(&res));
if (!data->base_common) {
dev_err(&pdev->dev, "Failed to ioremap memory\n");
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index 7c6c34a..ebd2ec1 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -59,7 +59,7 @@ enum soc_type {
* state(active/idle) can be checked.
* TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
* sample time.
- * TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU
+ * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU
* sensors shares some common registers.
* TMU_SUPPORT - macro to compare the above features with the supplied.
*/
@@ -69,7 +69,7 @@ enum soc_type {
#define TMU_SUPPORT_FALLING_TRIP BIT(3)
#define TMU_SUPPORT_READY_STATUS BIT(4)
#define TMU_SUPPORT_EMUL_TIME BIT(5)
-#define TMU_SUPPORT_SHARED_MEMORY BIT(6)
+#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(6)
#define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b)
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 23fea23..58570d0 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -239,7 +239,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.type = SOC_ARCH_EXYNOS5440, \
.registers = &exynos5440_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
- TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY),
+ TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_ADDRESS_MULTIPLE),
struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
.tmu_data = {
--
1.7.10.4
This patch adds the neccessary register changes and arch information
to support Exynos5420 SoCs
Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
Also updated the Documentation at
Documentation/devicetree/bindings/thermal/exynos-thermal.txt
Note: The platform data structure will be handled properly once the driver
moves to complete device driver solution.
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
-Changes since v1:
1. modified the platform data structure in order to pass SHARED flag
for channels that need sharing of address space.
2. https://lkml.org/lkml/2013/8/1/38 is merged into this patch.
As the changes are minimum and can be added here.
Changes since v3:
a. Rearraged the code alphabetically, make exynso5420 come before exynso5440
b. Reduce code duplication in passing platform data by introducing a common macro
Bartlomiej Zolnierkiewicz Thanks for review and suggestions
---
.../devicetree/bindings/thermal/exynos-thermal.txt | 39 ++++++++
drivers/thermal/samsung/exynos_tmu.c | 12 ++-
drivers/thermal/samsung/exynos_tmu.h | 1 +
drivers/thermal/samsung/exynos_tmu_data.c | 99 ++++++++++++++++++++
drivers/thermal/samsung/exynos_tmu_data.h | 7 ++
5 files changed, 157 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 116cca0..c5f9a74 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -6,6 +6,7 @@
"samsung,exynos4412-tmu"
"samsung,exynos4210-tmu"
"samsung,exynos5250-tmu"
+ "samsung,exynos5420-tmu"
"samsung,exynos5440-tmu"
- interrupt-parent : The phandle for the interrupt controller
- reg : Address range of the thermal registers. For soc's which has multiple
@@ -13,6 +14,16 @@
interrupt related then 2 set of register has to supplied. First set
belongs to each instance of TMU and second set belongs to second set
of common TMU registers.
+ NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
+ channels 2, 3 and 4
+
+ TRIMINFO at 0x1006c000 contains data for TMU channel 3
+ TRIMINFO at 0x100a0000 contains data for TMU channel 4
+ TRIMINFO at 0x10068000 contains data for TMU channel 2
+
+ The misplaced register address is passed through devicetree as the
+ second base
+
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
@@ -43,6 +54,34 @@ Example 2):
clock-names = "tmu_apbif";
};
+Example 3): (In case of Exynos5420)
+ /* tmu for CPU2 */
+ tmu@10068000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+ interrupts = <0 184 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
+ /* tmu for CPU3 */
+ tmu@1006c000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+ interrupts = <0 185 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
+ /* tmu for GPU */
+ tmu@100a0000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+ interrupts = <0 215 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
Note: For multi-instance tmu each instance should have an alias correctly
numbered in "aliases" node.
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index 40c4243..852034f 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -186,7 +186,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
}
} else {
- trim_info = readl(data->base + reg->triminfo_data);
+ /* On exynos5420 the triminfo register is in the shared space */
+ if (data->base_second && (data->soc == SOC_ARCH_EXYNOS5420))
+ trim_info = readl(data->base_second +
+ reg->triminfo_data);
+ else
+ trim_info = readl(data->base + reg->triminfo_data);
}
data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
@@ -495,6 +500,10 @@ static const struct of_device_id exynos_tmu_match[] = {
.data = (void *)EXYNOS5250_TMU_DRV_DATA,
},
{
+ .compatible = "samsung,exynos5420-tmu",
+ .data = (void *)EXYNOS5420_TMU_DRV_DATA,
+ },
+ {
.compatible = "samsung,exynos5440-tmu",
.data = (void *)EXYNOS5440_TMU_DRV_DATA,
},
@@ -631,6 +640,7 @@ static int exynos_tmu_probe(struct platform_device *pdev)
if (pdata->type == SOC_ARCH_EXYNOS ||
pdata->type == SOC_ARCH_EXYNOS4210 ||
+ pdata->type == SOC_ARCH_EXYNOS5420 ||
pdata->type == SOC_ARCH_EXYNOS5440)
data->soc = pdata->type;
else {
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index ebd2ec1..c2f362f 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -42,6 +42,7 @@ enum calibration_mode {
enum soc_type {
SOC_ARCH_EXYNOS4210 = 1,
SOC_ARCH_EXYNOS,
+ SOC_ARCH_EXYNOS5420,
SOC_ARCH_EXYNOS5440,
};
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 58570d0..8610f12 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -177,6 +177,105 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
};
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+static const struct exynos_tmu_registers exynos5420_tmu_registers = {
+ .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
+ .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
+ .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
+ .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
+ .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
+ .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
+ .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
+ .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
+ .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
+ .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+ .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
+ .tmu_status = EXYNOS_TMU_REG_STATUS,
+ .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
+ .threshold_th0 = EXYNOS_THD_TEMP_RISE,
+ .threshold_th1 = EXYNOS_THD_TEMP_FALL,
+ .tmu_inten = EXYNOS_TMU_REG_INTEN,
+ .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
+ .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
+ .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
+ .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
+ .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
+ .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
+ /* INTEN_RISE3 Not availble in exynos5420 */
+ .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
+ .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
+ .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
+ .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .emul_con = EXYNOS_EMUL_CON,
+ .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
+ .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
+ .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
+};
+
+#define __EXYNOS5420_TMU_DATA \
+ .threshold_falling = 10, \
+ .trigger_levels[0] = 85, \
+ .trigger_levels[1] = 103, \
+ .trigger_levels[2] = 110, \
+ .trigger_levels[3] = 120, \
+ .trigger_enable[0] = true, \
+ .trigger_enable[1] = true, \
+ .trigger_enable[2] = true, \
+ .trigger_enable[3] = false, \
+ .trigger_type[0] = THROTTLE_ACTIVE, \
+ .trigger_type[1] = THROTTLE_ACTIVE, \
+ .trigger_type[2] = SW_TRIP, \
+ .trigger_type[3] = HW_TRIP, \
+ .max_trigger_level = 4, \
+ .gain = 8, \
+ .reference_voltage = 16, \
+ .noise_cancel_mode = 4, \
+ .cal_type = TYPE_ONE_POINT_TRIMMING, \
+ .efuse_value = 55, \
+ .min_efuse_value = 40, \
+ .max_efuse_value = 100, \
+ .first_point_trim = 25, \
+ .second_point_trim = 85, \
+ .default_temp_offset = 50, \
+ .freq_tab[0] = { \
+ .freq_clip_max = 800 * 1000, \
+ .temp_level = 85, \
+ }, \
+ .freq_tab[1] = { \
+ .freq_clip_max = 200 * 1000, \
+ .temp_level = 103, \
+ }, \
+ .freq_tab_count = 2, \
+ .type = SOC_ARCH_EXYNOS5420, \
+ .registers = &exynos5420_tmu_registers, \
+
+#define EXYNOS5420_TMU_DATA \
+ __EXYNOS5420_TMU_DATA \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
+ TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
+ TMU_SUPPORT_EMUL_TIME)
+
+#define EXYNOS5420_TMU_DATA_SHARED \
+ __EXYNOS5420_TMU_DATA \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
+ TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
+ TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_ADDRESS_MULTIPLE)
+
+struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
+ .tmu_data = {
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ },
+ .tmu_count = 5,
+};
+#endif
+
#if defined(CONFIG_SOC_EXYNOS5440)
static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index 8788a87..59e2f33 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -146,6 +146,13 @@ extern struct exynos_tmu_init_data const exynos5250_default_tmu_data;
#define EXYNOS5250_TMU_DRV_DATA (NULL)
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
+#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
+#else
+#define EXYNOS5420_TMU_DRV_DATA (NULL)
+#endif
+
#if defined(CONFIG_SOC_EXYNOS5440)
extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
#define EXYNOS5440_TMU_DRV_DATA (&exynos5440_default_tmu_data)
--
1.7.10.4
Hi,
All patches (#1-#3) look good to me, FWIW you can add:
Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]>
Please note that (at least) patch #3 conflicts with Lukasz's EXYNOS4412
fixup patchset:
https://lkml.org/lkml/2013/10/9/35
It is up to Eduardo to resolve this but it probably would be better to
merge EXYNOS4412 fixes first and then add EXYNOS5420 support. This would
require you to port patch #3 over Lukasz's patchset though.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On Wednesday, October 09, 2013 05:38:27 PM Naveen Krishna Chatradhi wrote:
> The FALL interrupt related en, status bits are available at an offset of
> 16 on INTEN, INTSTAT registers and at an offset of
> 12 on INTCLEAR register.
>
> This patch corrects the same for exyns5250 and exynos5440
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> ---
> Changes since v1:
> Changes since v2:
> Changes since v3:
> None
>
> drivers/thermal/samsung/exynos_tmu.c | 2 +-
> drivers/thermal/samsung/exynos_tmu.h | 2 ++
> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
> drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
> 4 files changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index b43afda..af69209 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -265,7 +265,7 @@ skip_calib_data:
> data->base + reg->threshold_th1);
>
> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
> - (reg->inten_fall_mask << reg->inten_fall_shift),
> + (reg->inten_fall_mask << reg->intclr_fall_shift),
> data->base + reg->tmu_intclear);
>
> /* if last threshold limit is also present */
> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> index b364c9e..7c6c34a 100644
> --- a/drivers/thermal/samsung/exynos_tmu.h
> +++ b/drivers/thermal/samsung/exynos_tmu.h
> @@ -134,6 +134,7 @@ enum soc_type {
> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
> * @tmu_intstat: Register containing the interrupt status values.
> * @tmu_intclear: Register for clearing the raised interrupt status.
> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
> * @emul_con: TMU emulation controller register.
> * @emul_temp_shift: shift bits of emulation temperature.
> * @emul_time_shift: shift bits of emulation time.
> @@ -204,6 +205,7 @@ struct exynos_tmu_registers {
> u32 tmu_intstat;
>
> u32 tmu_intclear;
> + u32 intclr_fall_shift;
>
> u32 emul_con;
> u32 emul_temp_shift;
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> index 9002499..23fea23 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> @@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> .emul_con = EXYNOS_EMUL_CON,
> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> @@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> index dc7feb5..8788a87 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> @@ -69,9 +69,10 @@
> #define EXYNOS_TMU_RISE_INT_MASK 0x111
> #define EXYNOS_TMU_RISE_INT_SHIFT 0
> #define EXYNOS_TMU_FALL_INT_MASK 0x111
> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
> +#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
Hi Naveen,
On 09-10-2013 10:03, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> All patches (#1-#3) look good to me, FWIW you can add:
>
> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]>
>
> Please note that (at least) patch #3 conflicts with Lukasz's EXYNOS4412
> fixup patchset:
>
> https://lkml.org/lkml/2013/10/9/35
>
> It is up to Eduardo to resolve this but it probably would be better to
> merge EXYNOS4412 fixes first and then add EXYNOS5420 support. This would
> require you to port patch #3 over Lukasz's patchset though.
My question is if this fix applies also to EXYNOS4412, as it is not
mentioned in the patch description and the change affects all supported
chip version deliberately. Has this change been validated on all
supported chip versions?
Amit, I saw you ack, but still, it is not clear how this change behaves
across supported hardware.
>
> Best regards,
> --
> Bartlomiej Zolnierkiewicz
> Samsung R&D Institute Poland
> Samsung Electronics
>
> On Wednesday, October 09, 2013 05:38:27 PM Naveen Krishna Chatradhi wrote:
>> The FALL interrupt related en, status bits are available at an offset of
>> 16 on INTEN, INTSTAT registers and at an offset of
>> 12 on INTCLEAR register.
>>
>> This patch corrects the same for exyns5250 and exynos5440
>>
>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>> ---
>> Changes since v1:
>> Changes since v2:
>> Changes since v3:
>> None
>>
>> drivers/thermal/samsung/exynos_tmu.c | 2 +-
>> drivers/thermal/samsung/exynos_tmu.h | 2 ++
>> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
>> drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
>> 4 files changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>> index b43afda..af69209 100644
>> --- a/drivers/thermal/samsung/exynos_tmu.c
>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>> @@ -265,7 +265,7 @@ skip_calib_data:
>> data->base + reg->threshold_th1);
>>
>> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
>> - (reg->inten_fall_mask << reg->inten_fall_shift),
>> + (reg->inten_fall_mask << reg->intclr_fall_shift),
>> data->base + reg->tmu_intclear);
>>
>> /* if last threshold limit is also present */
>> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
>> index b364c9e..7c6c34a 100644
>> --- a/drivers/thermal/samsung/exynos_tmu.h
>> +++ b/drivers/thermal/samsung/exynos_tmu.h
>> @@ -134,6 +134,7 @@ enum soc_type {
>> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
>> * @tmu_intstat: Register containing the interrupt status values.
>> * @tmu_intclear: Register for clearing the raised interrupt status.
>> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
>> * @emul_con: TMU emulation controller register.
>> * @emul_temp_shift: shift bits of emulation temperature.
>> * @emul_time_shift: shift bits of emulation time.
>> @@ -204,6 +205,7 @@ struct exynos_tmu_registers {
>> u32 tmu_intstat;
>>
>> u32 tmu_intclear;
>> + u32 intclr_fall_shift;
>>
>> u32 emul_con;
>> u32 emul_temp_shift;
>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
>> index 9002499..23fea23 100644
>> --- a/drivers/thermal/samsung/exynos_tmu_data.c
>> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
>> @@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
>> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
>> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
>> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
>> .emul_con = EXYNOS_EMUL_CON,
>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
>> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
>> @@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
>> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
>> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
>> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
>> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
>> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
>> index dc7feb5..8788a87 100644
>> --- a/drivers/thermal/samsung/exynos_tmu_data.h
>> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
>> @@ -69,9 +69,10 @@
>> #define EXYNOS_TMU_RISE_INT_MASK 0x111
>> #define EXYNOS_TMU_RISE_INT_SHIFT 0
>> #define EXYNOS_TMU_FALL_INT_MASK 0x111
>> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
>> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
>> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
>> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
>> +#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
>> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
>> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
>> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
>
>
>
--
You have got to be excited about what you are doing. (L. Lamport)
Eduardo Valentin
Hi,
On Friday, October 11, 2013 11:10:38 AM Eduardo Valentin wrote:
> Hi Naveen,
>
> On 09-10-2013 10:03, Bartlomiej Zolnierkiewicz wrote:
> >
> > Hi,
> >
> > All patches (#1-#3) look good to me, FWIW you can add:
> >
> > Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]>
> >
> > Please note that (at least) patch #3 conflicts with Lukasz's EXYNOS4412
> > fixup patchset:
> >
> > https://lkml.org/lkml/2013/10/9/35
> >
> > It is up to Eduardo to resolve this but it probably would be better to
> > merge EXYNOS4412 fixes first and then add EXYNOS5420 support. This would
> > require you to port patch #3 over Lukasz's patchset though.
>
> My question is if this fix applies also to EXYNOS4412, as it is not
> mentioned in the patch description and the change affects all supported
This patch doesn't affect EXYNOS4210 as exynos4210_tmu_registers struct
uses the default zero value for inten_fall_mask, inten_fall_shift and
intclr_fall_shift.
> chip version deliberately. Has this change been validated on all
> supported chip versions?
>
> Amit, I saw you ack, but still, it is not clear how this change behaves
> across supported hardware.
For EXYNOS4412 and EXYNOS5250 this patch doesn't cause any functionality
changes because while the patch changes inten_fall_shift usage to
intclr_fall_shift one in exynos_tmu_initialize() it defines
EXYNOS_TMU_CLEAR_FALL_INT_SHIFT to 12 (old EXYNOS_TMU_FALL_INT_SHIFT
value).
This patch only changes driver behavior for EXYNOS5440 on which the
used shift value changes from 4 to 12.
PS I've only noticed it now but after this patch inten_fall_shift becomes
unused and can be removed.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
> >
> > Best regards,
> > --
> > Bartlomiej Zolnierkiewicz
> > Samsung R&D Institute Poland
> > Samsung Electronics
> >
> > On Wednesday, October 09, 2013 05:38:27 PM Naveen Krishna Chatradhi wrote:
> >> The FALL interrupt related en, status bits are available at an offset of
> >> 16 on INTEN, INTSTAT registers and at an offset of
> >> 12 on INTCLEAR register.
> >>
> >> This patch corrects the same for exyns5250 and exynos5440
> >>
> >> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> >> ---
> >> Changes since v1:
> >> Changes since v2:
> >> Changes since v3:
> >> None
> >>
> >> drivers/thermal/samsung/exynos_tmu.c | 2 +-
> >> drivers/thermal/samsung/exynos_tmu.h | 2 ++
> >> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
> >> drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
> >> 4 files changed, 7 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> >> index b43afda..af69209 100644
> >> --- a/drivers/thermal/samsung/exynos_tmu.c
> >> +++ b/drivers/thermal/samsung/exynos_tmu.c
> >> @@ -265,7 +265,7 @@ skip_calib_data:
> >> data->base + reg->threshold_th1);
> >>
> >> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
> >> - (reg->inten_fall_mask << reg->inten_fall_shift),
> >> + (reg->inten_fall_mask << reg->intclr_fall_shift),
> >> data->base + reg->tmu_intclear);
> >>
> >> /* if last threshold limit is also present */
> >> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> >> index b364c9e..7c6c34a 100644
> >> --- a/drivers/thermal/samsung/exynos_tmu.h
> >> +++ b/drivers/thermal/samsung/exynos_tmu.h
> >> @@ -134,6 +134,7 @@ enum soc_type {
> >> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
> >> * @tmu_intstat: Register containing the interrupt status values.
> >> * @tmu_intclear: Register for clearing the raised interrupt status.
> >> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
> >> * @emul_con: TMU emulation controller register.
> >> * @emul_temp_shift: shift bits of emulation temperature.
> >> * @emul_time_shift: shift bits of emulation time.
> >> @@ -204,6 +205,7 @@ struct exynos_tmu_registers {
> >> u32 tmu_intstat;
> >>
> >> u32 tmu_intclear;
> >> + u32 intclr_fall_shift;
> >>
> >> u32 emul_con;
> >> u32 emul_temp_shift;
> >> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> >> index 9002499..23fea23 100644
> >> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> >> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> >> @@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
> >> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> >> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> >> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> >> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> >> .emul_con = EXYNOS_EMUL_CON,
> >> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> >> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> >> @@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> >> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
> >> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
> >> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
> >> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> >> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
> >> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
> >> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> >> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> >> index dc7feb5..8788a87 100644
> >> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> >> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> >> @@ -69,9 +69,10 @@
> >> #define EXYNOS_TMU_RISE_INT_MASK 0x111
> >> #define EXYNOS_TMU_RISE_INT_SHIFT 0
> >> #define EXYNOS_TMU_FALL_INT_MASK 0x111
> >> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
> >> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
> >> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
> >> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
> >> +#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
> >> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
> >> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
> >> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
On 09-10-2013 08:08, Naveen Krishna Chatradhi wrote:
> On Exynos5440 and Exynos5420 there are registers common
> across the TMU channels.
>
> To support that, we introduced a ADDRESS_MULTIPLE flag in the
> driver and the 2nd set of register base and size are provided
> in the "reg" property of the node.
>
> As per Amit's suggestion, this patch changes the base_common
> to base_second and SHARED_MEMORY to ADDRESS_MULTIPLE.
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> ---
> Changes since v1:
> None
> Changes since v2:
> Changed the flag name from SHARED_MEMORY to ADDRESS_MULTIPLE.
> https://lkml.org/lkml/2013/8/1/38
> Changes since v3:
> None
This patch generates build error:
CC [M] drivers/thermal/samsung/exynos_tmu.o
drivers/thermal/samsung/exynos_tmu.c: In function 'exynos_map_dt_data':
drivers/thermal/samsung/exynos_tmu.c:592:11: error: 'struct
exynos_tmu_data' has no member named 'base_common'
make[3]: *** [drivers/thermal/samsung/exynos_tmu.o] Error 1
make[2]: *** [drivers/thermal/samsung] Error 2
make[1]: *** [drivers/thermal] Error 2
make[1]: *** Waiting for unfinished jobs....
You've missed one occurrence while renaming the symbol:
diff --git a/drivers/thermal/samsung/exynos_tmu.c
b/drivers/thermal/samsung/exynos_tmu.c
index cd8dc12..ae80a87 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -589,7 +589,7 @@ static int exynos_map_dt_data(struct platform_device
*pdev)
data->base_second = devm_ioremap(&pdev->dev, res.start,
resource_size(&res));
- if (!data->base_common) {
+ if (!data->base_second) {
dev_err(&pdev->dev, "Failed to ioremap memory\n");
return -ENOMEM;
}
Please compile test your patch before submitting!
>
> .../devicetree/bindings/thermal/exynos-thermal.txt | 4 ++--
> drivers/thermal/samsung/exynos_tmu.c | 12 ++++++------
> drivers/thermal/samsung/exynos_tmu.h | 4 ++--
> drivers/thermal/samsung/exynos_tmu_data.c | 2 +-
> 4 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> index 284f530..116cca0 100644
> --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
> @@ -11,8 +11,8 @@
> - reg : Address range of the thermal registers. For soc's which has multiple
> instances of TMU and some registers are shared across all TMU's like
> interrupt related then 2 set of register has to supplied. First set
> - belongs to each instance of TMU and second set belongs to common TMU
> - registers.
> + belongs to each instance of TMU and second set belongs to second set
> + of common TMU registers.
> - interrupts : Should contain interrupt for thermal system
> - clocks : The main clock for TMU device
> - clock-names : Thermal system clock name
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index af69209..40c4243 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -41,7 +41,7 @@
> * @id: identifier of the one instance of the TMU controller.
> * @pdata: pointer to the tmu platform/configuration data
> * @base: base address of the single instance of the TMU controller.
> - * @base_common: base address of the common registers of the TMU controller.
> + * @base_second: base address of the common registers of the TMU controller.
> * @irq: irq number of the TMU controller.
> * @soc: id of the SOC type.
> * @irq_work: pointer to the irq work structure.
> @@ -56,7 +56,7 @@ struct exynos_tmu_data {
> int id;
> struct exynos_tmu_platform_data *pdata;
> void __iomem *base;
> - void __iomem *base_common;
> + void __iomem *base_second;
> int irq;
> enum soc_type soc;
> struct work_struct irq_work;
> @@ -297,7 +297,7 @@ skip_calib_data:
> }
> /*Clear the PMIN in the common TMU register*/
> if (reg->tmu_pmin && !data->id)
> - writel(0, data->base_common + reg->tmu_pmin);
> + writel(0, data->base_second + reg->tmu_pmin);
> out:
> clk_disable(data->clk);
> mutex_unlock(&data->lock);
> @@ -451,7 +451,7 @@ static void exynos_tmu_work(struct work_struct *work)
>
> /* Find which sensor generated this interrupt */
> if (reg->tmu_irqstatus) {
> - val_type = readl(data->base_common + reg->tmu_irqstatus);
> + val_type = readl(data->base_second + reg->tmu_irqstatus);
> if (!((val_type >> data->id) & 0x1))
> goto out;
> }
> @@ -576,7 +576,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
> * Check if the TMU shares some registers and then try to map the
> * memory of common registers.
> */
> - if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
> + if (!TMU_SUPPORTS(pdata, ADDRESS_MULTIPLE))
> return 0;
>
> if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
> @@ -584,7 +584,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
> return -ENODEV;
> }
>
> - data->base_common = devm_ioremap(&pdev->dev, res.start,
> + data->base_second = devm_ioremap(&pdev->dev, res.start,
> resource_size(&res));
> if (!data->base_common) {
> dev_err(&pdev->dev, "Failed to ioremap memory\n");
> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> index 7c6c34a..ebd2ec1 100644
> --- a/drivers/thermal/samsung/exynos_tmu.h
> +++ b/drivers/thermal/samsung/exynos_tmu.h
> @@ -59,7 +59,7 @@ enum soc_type {
> * state(active/idle) can be checked.
> * TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
> * sample time.
> - * TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU
> + * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU
> * sensors shares some common registers.
> * TMU_SUPPORT - macro to compare the above features with the supplied.
> */
> @@ -69,7 +69,7 @@ enum soc_type {
> #define TMU_SUPPORT_FALLING_TRIP BIT(3)
> #define TMU_SUPPORT_READY_STATUS BIT(4)
> #define TMU_SUPPORT_EMUL_TIME BIT(5)
> -#define TMU_SUPPORT_SHARED_MEMORY BIT(6)
> +#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(6)
>
> #define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b)
>
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> index 23fea23..58570d0 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> @@ -239,7 +239,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> .type = SOC_ARCH_EXYNOS5440, \
> .registers = &exynos5440_tmu_registers, \
> .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
> - TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY),
> + TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_ADDRESS_MULTIPLE),
>
> struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
> .tmu_data = {
>
--
You have got to be excited about what you are doing. (L. Lamport)
Eduardo Valentin
Naveen,
On 09-10-2013 10:03, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> All patches (#1-#3) look good to me, FWIW you can add:
>
> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]>
>
> Please note that (at least) patch #3 conflicts with Lukasz's EXYNOS4412
> fixup patchset:
>
> https://lkml.org/lkml/2013/10/9/35
>
> It is up to Eduardo to resolve this but it probably would be better to
> merge EXYNOS4412 fixes first and then add EXYNOS5420 support. This would
> require you to port patch #3 over Lukasz's patchset though.
>
Please rebase your patch set on top of Lukasz'. There are conflicts
while applying patch 3. Please also compile test it before posting,
check comment I made on patch 2.
> Best regards,
> --
> Bartlomiej Zolnierkiewicz
> Samsung R&D Institute Poland
> Samsung Electronics
>
> On Wednesday, October 09, 2013 05:38:27 PM Naveen Krishna Chatradhi wrote:
>> The FALL interrupt related en, status bits are available at an offset of
>> 16 on INTEN, INTSTAT registers and at an offset of
>> 12 on INTCLEAR register.
>>
>> This patch corrects the same for exyns5250 and exynos5440
>>
>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>> ---
>> Changes since v1:
>> Changes since v2:
>> Changes since v3:
>> None
>>
>> drivers/thermal/samsung/exynos_tmu.c | 2 +-
>> drivers/thermal/samsung/exynos_tmu.h | 2 ++
>> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
>> drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
>> 4 files changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>> index b43afda..af69209 100644
>> --- a/drivers/thermal/samsung/exynos_tmu.c
>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>> @@ -265,7 +265,7 @@ skip_calib_data:
>> data->base + reg->threshold_th1);
>>
>> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
>> - (reg->inten_fall_mask << reg->inten_fall_shift),
>> + (reg->inten_fall_mask << reg->intclr_fall_shift),
>> data->base + reg->tmu_intclear);
>>
>> /* if last threshold limit is also present */
>> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
>> index b364c9e..7c6c34a 100644
>> --- a/drivers/thermal/samsung/exynos_tmu.h
>> +++ b/drivers/thermal/samsung/exynos_tmu.h
>> @@ -134,6 +134,7 @@ enum soc_type {
>> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
>> * @tmu_intstat: Register containing the interrupt status values.
>> * @tmu_intclear: Register for clearing the raised interrupt status.
>> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
>> * @emul_con: TMU emulation controller register.
>> * @emul_temp_shift: shift bits of emulation temperature.
>> * @emul_time_shift: shift bits of emulation time.
>> @@ -204,6 +205,7 @@ struct exynos_tmu_registers {
>> u32 tmu_intstat;
>>
>> u32 tmu_intclear;
>> + u32 intclr_fall_shift;
>>
>> u32 emul_con;
>> u32 emul_temp_shift;
>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
>> index 9002499..23fea23 100644
>> --- a/drivers/thermal/samsung/exynos_tmu_data.c
>> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
>> @@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
>> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
>> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
>> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
>> .emul_con = EXYNOS_EMUL_CON,
>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
>> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
>> @@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
>> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
>> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
>> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
>> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
>> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
>> index dc7feb5..8788a87 100644
>> --- a/drivers/thermal/samsung/exynos_tmu_data.h
>> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
>> @@ -69,9 +69,10 @@
>> #define EXYNOS_TMU_RISE_INT_MASK 0x111
>> #define EXYNOS_TMU_RISE_INT_SHIFT 0
>> #define EXYNOS_TMU_FALL_INT_MASK 0x111
>> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
>> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
>> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
>> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
>> +#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
>> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
>> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
>> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
>
>
>
--
You have got to be excited about what you are doing. (L. Lamport)
Eduardo Valentin
On 11-10-2013 11:57, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Friday, October 11, 2013 11:10:38 AM Eduardo Valentin wrote:
>> Hi Naveen,
>>
>> On 09-10-2013 10:03, Bartlomiej Zolnierkiewicz wrote:
>>>
>>> Hi,
>>>
>>> All patches (#1-#3) look good to me, FWIW you can add:
>>>
>>> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]>
>>>
>>> Please note that (at least) patch #3 conflicts with Lukasz's EXYNOS4412
>>> fixup patchset:
>>>
>>> https://lkml.org/lkml/2013/10/9/35
>>>
>>> It is up to Eduardo to resolve this but it probably would be better to
>>> merge EXYNOS4412 fixes first and then add EXYNOS5420 support. This would
>>> require you to port patch #3 over Lukasz's patchset though.
>>
>> My question is if this fix applies also to EXYNOS4412, as it is not
>> mentioned in the patch description and the change affects all supported
>
> This patch doesn't affect EXYNOS4210 as exynos4210_tmu_registers struct
I was, at least for now, worried about 4412, as I mentioned above.
> uses the default zero value for inten_fall_mask, inten_fall_shift and
> intclr_fall_shift.
>
>> chip version deliberately. Has this change been validated on all
>> supported chip versions?
>>
>> Amit, I saw you ack, but still, it is not clear how this change behaves
>> across supported hardware.
>
> For EXYNOS4412 and EXYNOS5250 this patch doesn't cause any functionality
> changes because while the patch changes inten_fall_shift usage to
> intclr_fall_shift one in exynos_tmu_initialize() it defines
> EXYNOS_TMU_CLEAR_FALL_INT_SHIFT to 12 (old EXYNOS_TMU_FALL_INT_SHIFT
> value).
>
OK. Then the patch is about a symbol rename, right?
> This patch only changes driver behavior for EXYNOS5440 on which the
> used shift value changes from 4 to 12.
I see.
>
> PS I've only noticed it now but after this patch inten_fall_shift becomes
> unused and can be removed.
>
Then we should remove it.
> Best regards,
> --
> Bartlomiej Zolnierkiewicz
> Samsung R&D Institute Poland
> Samsung Electronics
>
>>>
>>> Best regards,
>>> --
>>> Bartlomiej Zolnierkiewicz
>>> Samsung R&D Institute Poland
>>> Samsung Electronics
>>>
>>> On Wednesday, October 09, 2013 05:38:27 PM Naveen Krishna Chatradhi wrote:
>>>> The FALL interrupt related en, status bits are available at an offset of
>>>> 16 on INTEN, INTSTAT registers and at an offset of
>>>> 12 on INTCLEAR register.
>>>>
>>>> This patch corrects the same for exyns5250 and exynos5440
>>>>
>>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>>>> ---
>>>> Changes since v1:
>>>> Changes since v2:
>>>> Changes since v3:
>>>> None
>>>>
>>>> drivers/thermal/samsung/exynos_tmu.c | 2 +-
>>>> drivers/thermal/samsung/exynos_tmu.h | 2 ++
>>>> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
>>>> drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
>>>> 4 files changed, 7 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>>>> index b43afda..af69209 100644
>>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>>>> @@ -265,7 +265,7 @@ skip_calib_data:
>>>> data->base + reg->threshold_th1);
>>>>
>>>> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
>>>> - (reg->inten_fall_mask << reg->inten_fall_shift),
>>>> + (reg->inten_fall_mask << reg->intclr_fall_shift),
>>>> data->base + reg->tmu_intclear);
>>>>
>>>> /* if last threshold limit is also present */
>>>> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
>>>> index b364c9e..7c6c34a 100644
>>>> --- a/drivers/thermal/samsung/exynos_tmu.h
>>>> +++ b/drivers/thermal/samsung/exynos_tmu.h
>>>> @@ -134,6 +134,7 @@ enum soc_type {
>>>> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
>>>> * @tmu_intstat: Register containing the interrupt status values.
>>>> * @tmu_intclear: Register for clearing the raised interrupt status.
>>>> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
>>>> * @emul_con: TMU emulation controller register.
>>>> * @emul_temp_shift: shift bits of emulation temperature.
>>>> * @emul_time_shift: shift bits of emulation time.
>>>> @@ -204,6 +205,7 @@ struct exynos_tmu_registers {
>>>> u32 tmu_intstat;
>>>>
>>>> u32 tmu_intclear;
>>>> + u32 intclr_fall_shift;
>>>>
>>>> u32 emul_con;
>>>> u32 emul_temp_shift;
>>>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
>>>> index 9002499..23fea23 100644
>>>> --- a/drivers/thermal/samsung/exynos_tmu_data.c
>>>> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
>>>> @@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
>>>> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
>>>> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
>>>> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
>>>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
>>>> .emul_con = EXYNOS_EMUL_CON,
>>>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
>>>> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
>>>> @@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
>>>> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
>>>> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
>>>> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
>>>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
>>>> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
>>>> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
>>>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
>>>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
>>>> index dc7feb5..8788a87 100644
>>>> --- a/drivers/thermal/samsung/exynos_tmu_data.h
>>>> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
>>>> @@ -69,9 +69,10 @@
>>>> #define EXYNOS_TMU_RISE_INT_MASK 0x111
>>>> #define EXYNOS_TMU_RISE_INT_SHIFT 0
>>>> #define EXYNOS_TMU_FALL_INT_MASK 0x111
>>>> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
>>>> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
>>>> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
>>>> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
>>>> +#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
>>>> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
>>>> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
>>>> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
>
>
>
--
You have got to be excited about what you are doing. (L. Lamport)
Eduardo Valentin
On Monday, October 14, 2013 10:18:03 AM Eduardo Valentin wrote:
> On 11-10-2013 11:57, Bartlomiej Zolnierkiewicz wrote:
> >
> > Hi,
> >
> > On Friday, October 11, 2013 11:10:38 AM Eduardo Valentin wrote:
> >> Hi Naveen,
> >>
> >> On 09-10-2013 10:03, Bartlomiej Zolnierkiewicz wrote:
> >>>
> >>> Hi,
> >>>
> >>> All patches (#1-#3) look good to me, FWIW you can add:
> >>>
> >>> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]>
> >>>
> >>> Please note that (at least) patch #3 conflicts with Lukasz's EXYNOS4412
> >>> fixup patchset:
> >>>
> >>> https://lkml.org/lkml/2013/10/9/35
> >>>
> >>> It is up to Eduardo to resolve this but it probably would be better to
> >>> merge EXYNOS4412 fixes first and then add EXYNOS5420 support. This would
> >>> require you to port patch #3 over Lukasz's patchset though.
> >>
> >> My question is if this fix applies also to EXYNOS4412, as it is not
> >> mentioned in the patch description and the change affects all supported
> >
> > This patch doesn't affect EXYNOS4210 as exynos4210_tmu_registers struct
>
> I was, at least for now, worried about 4412, as I mentioned above.
>
> > uses the default zero value for inten_fall_mask, inten_fall_shift and
> > intclr_fall_shift.
> >
> >> chip version deliberately. Has this change been validated on all
> >> supported chip versions?
> >>
> >> Amit, I saw you ack, but still, it is not clear how this change behaves
> >> across supported hardware.
> >
> > For EXYNOS4412 and EXYNOS5250 this patch doesn't cause any functionality
> > changes because while the patch changes inten_fall_shift usage to
> > intclr_fall_shift one in exynos_tmu_initialize() it defines
> > EXYNOS_TMU_CLEAR_FALL_INT_SHIFT to 12 (old EXYNOS_TMU_FALL_INT_SHIFT
> > value).
> >
>
> OK. Then the patch is about a symbol rename, right?
Yes and while doing so it also changes the define and the value used on
EXYNOS5440. I checked this change against the documentation today (please
see below).
> > This patch only changes driver behavior for EXYNOS5440 on which the
> > used shift value changes from 4 to 12.
>
> I see.
tmu_intstat and tmu_intclear refer to the same register on EXYNOS5440
(EXYNOS5440_TMU_S0_7_IRQ defined to 0x230) and the documentation that
I have says that the value 4 (which matches EXYNOS5440_TMU_FALL_INT_SHIFT
before the patch) should be used for the shift value. However the patch
doesn't define EXYNOS5440_TMU_CLEAR_FALL_INT_SHIFT and instead makes
the code use generic EXYNOS_TMU_CLEAR_FALL_INT_SHIFT (defined to value
12) also on EXYNOS5440. This doesn't seem correct.
Naveen, this issue needs to be either fixed or explained properly (if
the documentation is wrong) in the patch description. Please also put some
information about hardware that you've tested your patch on in the patch
description.
> >
> > PS I've only noticed it now but after this patch inten_fall_shift becomes
> > unused and can be removed.
> >
>
>
> Then we should remove it.
I completely agree.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
> > Best regards,
> > --
> > Bartlomiej Zolnierkiewicz
> > Samsung R&D Institute Poland
> > Samsung Electronics
> >
> >>>
> >>> Best regards,
> >>> --
> >>> Bartlomiej Zolnierkiewicz
> >>> Samsung R&D Institute Poland
> >>> Samsung Electronics
> >>>
> >>> On Wednesday, October 09, 2013 05:38:27 PM Naveen Krishna Chatradhi wrote:
> >>>> The FALL interrupt related en, status bits are available at an offset of
> >>>> 16 on INTEN, INTSTAT registers and at an offset of
> >>>> 12 on INTCLEAR register.
> >>>>
> >>>> This patch corrects the same for exyns5250 and exynos5440
> >>>>
> >>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> >>>> ---
> >>>> Changes since v1:
> >>>> Changes since v2:
> >>>> Changes since v3:
> >>>> None
> >>>>
> >>>> drivers/thermal/samsung/exynos_tmu.c | 2 +-
> >>>> drivers/thermal/samsung/exynos_tmu.h | 2 ++
> >>>> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
> >>>> drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
> >>>> 4 files changed, 7 insertions(+), 2 deletions(-)
> >>>>
> >>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> >>>> index b43afda..af69209 100644
> >>>> --- a/drivers/thermal/samsung/exynos_tmu.c
> >>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
> >>>> @@ -265,7 +265,7 @@ skip_calib_data:
> >>>> data->base + reg->threshold_th1);
> >>>>
> >>>> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
> >>>> - (reg->inten_fall_mask << reg->inten_fall_shift),
> >>>> + (reg->inten_fall_mask << reg->intclr_fall_shift),
> >>>> data->base + reg->tmu_intclear);
> >>>>
> >>>> /* if last threshold limit is also present */
> >>>> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> >>>> index b364c9e..7c6c34a 100644
> >>>> --- a/drivers/thermal/samsung/exynos_tmu.h
> >>>> +++ b/drivers/thermal/samsung/exynos_tmu.h
> >>>> @@ -134,6 +134,7 @@ enum soc_type {
> >>>> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
> >>>> * @tmu_intstat: Register containing the interrupt status values.
> >>>> * @tmu_intclear: Register for clearing the raised interrupt status.
> >>>> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
> >>>> * @emul_con: TMU emulation controller register.
> >>>> * @emul_temp_shift: shift bits of emulation temperature.
> >>>> * @emul_time_shift: shift bits of emulation time.
> >>>> @@ -204,6 +205,7 @@ struct exynos_tmu_registers {
> >>>> u32 tmu_intstat;
> >>>>
> >>>> u32 tmu_intclear;
> >>>> + u32 intclr_fall_shift;
> >>>>
> >>>> u32 emul_con;
> >>>> u32 emul_temp_shift;
> >>>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> >>>> index 9002499..23fea23 100644
> >>>> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> >>>> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> >>>> @@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
> >>>> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> >>>> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> >>>> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> >>>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> >>>> .emul_con = EXYNOS_EMUL_CON,
> >>>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> >>>> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> >>>> @@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> >>>> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
> >>>> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
> >>>> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
> >>>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
> >>>> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
> >>>> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
> >>>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> >>>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> >>>> index dc7feb5..8788a87 100644
> >>>> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> >>>> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> >>>> @@ -69,9 +69,10 @@
> >>>> #define EXYNOS_TMU_RISE_INT_MASK 0x111
> >>>> #define EXYNOS_TMU_RISE_INT_SHIFT 0
> >>>> #define EXYNOS_TMU_FALL_INT_MASK 0x111
> >>>> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
> >>>> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
> >>>> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
> >>>> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
> >>>> +#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
> >>>> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
> >>>> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
> >>>> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
On 14 October 2013 21:31, Bartlomiej Zolnierkiewicz
<[email protected]> wrote:
> On Monday, October 14, 2013 10:18:03 AM Eduardo Valentin wrote:
>> On 11-10-2013 11:57, Bartlomiej Zolnierkiewicz wrote:
>> >
>> > Hi,
>> >
>> > On Friday, October 11, 2013 11:10:38 AM Eduardo Valentin wrote:
>> >> Hi Naveen,
>> >>
>> >> On 09-10-2013 10:03, Bartlomiej Zolnierkiewicz wrote:
>> >>>
>> >>> Hi,
>> >>>
>> >>> All patches (#1-#3) look good to me, FWIW you can add:
>> >>>
>> >>> Reviewed-by: Bartlomiej Zolnierkiewicz <[email protected]>
>> >>>
>> >>> Please note that (at least) patch #3 conflicts with Lukasz's EXYNOS4412
>> >>> fixup patchset:
>> >>>
>> >>> https://lkml.org/lkml/2013/10/9/35
>> >>>
>> >>> It is up to Eduardo to resolve this but it probably would be better to
>> >>> merge EXYNOS4412 fixes first and then add EXYNOS5420 support. This would
>> >>> require you to port patch #3 over Lukasz's patchset though.
>> >>
>> >> My question is if this fix applies also to EXYNOS4412, as it is not
>> >> mentioned in the patch description and the change affects all supported
>> >
>> > This patch doesn't affect EXYNOS4210 as exynos4210_tmu_registers struct
>>
>> I was, at least for now, worried about 4412, as I mentioned above.
>>
>> > uses the default zero value for inten_fall_mask, inten_fall_shift and
>> > intclr_fall_shift.
>> >
>> >> chip version deliberately. Has this change been validated on all
>> >> supported chip versions?
>> >>
>> >> Amit, I saw you ack, but still, it is not clear how this change behaves
>> >> across supported hardware.
>> >
>> > For EXYNOS4412 and EXYNOS5250 this patch doesn't cause any functionality
>> > changes because while the patch changes inten_fall_shift usage to
>> > intclr_fall_shift one in exynos_tmu_initialize() it defines
>> > EXYNOS_TMU_CLEAR_FALL_INT_SHIFT to 12 (old EXYNOS_TMU_FALL_INT_SHIFT
>> > value).
>> >
>>
>> OK. Then the patch is about a symbol rename, right?
>
> Yes and while doing so it also changes the define and the value used on
> EXYNOS5440. I checked this change against the documentation today (please
> see below).
>
>> > This patch only changes driver behavior for EXYNOS5440 on which the
>> > used shift value changes from 4 to 12.
>>
>> I see.
>
> tmu_intstat and tmu_intclear refer to the same register on EXYNOS5440
> (EXYNOS5440_TMU_S0_7_IRQ defined to 0x230) and the documentation that
> I have says that the value 4 (which matches EXYNOS5440_TMU_FALL_INT_SHIFT
> before the patch) should be used for the shift value. However the patch
> doesn't define EXYNOS5440_TMU_CLEAR_FALL_INT_SHIFT and instead makes
> the code use generic EXYNOS_TMU_CLEAR_FALL_INT_SHIFT (defined to value
> 12) also on EXYNOS5440. This doesn't seem correct.
Right EXYNOS5440 User manual says TMU_S0-7_IRQEN register fields
RISE_IRQEN 3:0
FALL_IRQEN 7:4
Will make changes accordingly.
I've only tested on Exynos5250 and Exynos5420.
Depending on Amit for Exynos5440 as i don't hardware available.
>
> Naveen, this issue needs to be either fixed or explained properly (if
> the documentation is wrong) in the patch description. Please also put some
> information about hardware that you've tested your patch on in the patch
> description.
I've seen that the patches won't apply straight.
and there is a compilation warning introduced. Will fix both of them.
>
>> >
>> > PS I've only noticed it now but after this patch inten_fall_shift becomes
>> > unused and can be removed.
>> >
>>
>>
>> Then we should remove it.
>
> I completely agree.
>
> Best regards,
> --
> Bartlomiej Zolnierkiewicz
> Samsung R&D Institute Poland
> Samsung Electronics
>
>> > Best regards,
>> > --
>> > Bartlomiej Zolnierkiewicz
>> > Samsung R&D Institute Poland
>> > Samsung Electronics
>> >
>> >>>
>> >>> Best regards,
>> >>> --
>> >>> Bartlomiej Zolnierkiewicz
>> >>> Samsung R&D Institute Poland
>> >>> Samsung Electronics
>> >>>
>> >>> On Wednesday, October 09, 2013 05:38:27 PM Naveen Krishna Chatradhi wrote:
>> >>>> The FALL interrupt related en, status bits are available at an offset of
>> >>>> 16 on INTEN, INTSTAT registers and at an offset of
>> >>>> 12 on INTCLEAR register.
>> >>>>
>> >>>> This patch corrects the same for exyns5250 and exynos5440
>> >>>>
>> >>>> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
>> >>>> ---
>> >>>> Changes since v1:
>> >>>> Changes since v2:
>> >>>> Changes since v3:
>> >>>> None
>> >>>>
>> >>>> drivers/thermal/samsung/exynos_tmu.c | 2 +-
>> >>>> drivers/thermal/samsung/exynos_tmu.h | 2 ++
>> >>>> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
>> >>>> drivers/thermal/samsung/exynos_tmu_data.h | 3 ++-
>> >>>> 4 files changed, 7 insertions(+), 2 deletions(-)
>> >>>>
>> >>>> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
>> >>>> index b43afda..af69209 100644
>> >>>> --- a/drivers/thermal/samsung/exynos_tmu.c
>> >>>> +++ b/drivers/thermal/samsung/exynos_tmu.c
>> >>>> @@ -265,7 +265,7 @@ skip_calib_data:
>> >>>> data->base + reg->threshold_th1);
>> >>>>
>> >>>> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
>> >>>> - (reg->inten_fall_mask << reg->inten_fall_shift),
>> >>>> + (reg->inten_fall_mask << reg->intclr_fall_shift),
>> >>>> data->base + reg->tmu_intclear);
>> >>>>
>> >>>> /* if last threshold limit is also present */
>> >>>> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
>> >>>> index b364c9e..7c6c34a 100644
>> >>>> --- a/drivers/thermal/samsung/exynos_tmu.h
>> >>>> +++ b/drivers/thermal/samsung/exynos_tmu.h
>> >>>> @@ -134,6 +134,7 @@ enum soc_type {
>> >>>> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
>> >>>> * @tmu_intstat: Register containing the interrupt status values.
>> >>>> * @tmu_intclear: Register for clearing the raised interrupt status.
>> >>>> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
>> >>>> * @emul_con: TMU emulation controller register.
>> >>>> * @emul_temp_shift: shift bits of emulation temperature.
>> >>>> * @emul_time_shift: shift bits of emulation time.
>> >>>> @@ -204,6 +205,7 @@ struct exynos_tmu_registers {
>> >>>> u32 tmu_intstat;
>> >>>>
>> >>>> u32 tmu_intclear;
>> >>>> + u32 intclr_fall_shift;
>> >>>>
>> >>>> u32 emul_con;
>> >>>> u32 emul_temp_shift;
>> >>>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
>> >>>> index 9002499..23fea23 100644
>> >>>> --- a/drivers/thermal/samsung/exynos_tmu_data.c
>> >>>> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
>> >>>> @@ -122,6 +122,7 @@ static const struct exynos_tmu_registers exynos5250_tmu_registers = {
>> >>>> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
>> >>>> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
>> >>>> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
>> >>>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
>> >>>> .emul_con = EXYNOS_EMUL_CON,
>> >>>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
>> >>>> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
>> >>>> @@ -210,6 +211,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
>> >>>> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
>> >>>> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
>> >>>> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
>> >>>> + .intclr_fall_shift = EXYNOS_TMU_CLEAR_FALL_INT_SHIFT,
>> >>>> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
>> >>>> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
>> >>>> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
>> >>>> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
>> >>>> index dc7feb5..8788a87 100644
>> >>>> --- a/drivers/thermal/samsung/exynos_tmu_data.h
>> >>>> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
>> >>>> @@ -69,9 +69,10 @@
>> >>>> #define EXYNOS_TMU_RISE_INT_MASK 0x111
>> >>>> #define EXYNOS_TMU_RISE_INT_SHIFT 0
>> >>>> #define EXYNOS_TMU_FALL_INT_MASK 0x111
>> >>>> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
>> >>>> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
>> >>>> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
>> >>>> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
>> >>>> +#define EXYNOS_TMU_CLEAR_FALL_INT_SHIFT 12
>> >>>> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
>> >>>> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
>> >>>> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
>
--
Shine bright,
(: Nav :)
On Exynos5250, the FALL interrupt related en, status and clear bits are
available at an offset of
16 in INTEN, INTSTAT registers and at an offset of
12 in INTCLEAR register.
On Exynos5420, the FALL interrupt related en, status and clear bits are
available at an offset of
16 in INTEN, INTSTAT and INTCLEAR registers.
On Exynos5440,
the FALL_IRQEN bits are at an offset of 4
and the RISE_IRQEN bits are at an offset of 0
This patch introduces a new bit field intclr_fall_shift to handle the
offset for exyns5250 and exynos5440
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v1:
Changes since v2:
Changes since v3:
None
Changes since v4:
Correct the CLEAR_FALL_INT_SHIFT for Exynos5250/Exynos5440
Changes since v5:
Modify the commit message
drivers/thermal/samsung/exynos_tmu.c | 2 +-
drivers/thermal/samsung/exynos_tmu.h | 2 ++
drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
drivers/thermal/samsung/exynos_tmu_data.h | 4 +++-
4 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index 32f38b9..b2202fa 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -265,7 +265,7 @@ skip_calib_data:
data->base + reg->threshold_th1);
writel((reg->inten_rise_mask << reg->inten_rise_shift) |
- (reg->inten_fall_mask << reg->inten_fall_shift),
+ (reg->inten_fall_mask << reg->intclr_fall_shift),
data->base + reg->tmu_intclear);
/* if last threshold limit is also present */
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index 3fb6554..5f4fe6c 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -136,6 +136,7 @@ enum soc_type {
* @inten_fall3_shift: shift bits of falling 3 interrupt bits.
* @tmu_intstat: Register containing the interrupt status values.
* @tmu_intclear: Register for clearing the raised interrupt status.
+ * @intclr_fall_shift: shift bits for interrupt clear fall 0
* @emul_con: TMU emulation controller register.
* @emul_temp_shift: shift bits of emulation temperature.
* @emul_time_shift: shift bits of emulation time.
@@ -207,6 +208,7 @@ struct exynos_tmu_registers {
u32 tmu_intstat;
u32 tmu_intclear;
+ u32 intclr_fall_shift;
u32 emul_con;
u32 emul_temp_shift;
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 073c292..09a8a27 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -123,6 +123,7 @@ static const struct exynos_tmu_registers exynos4412_tmu_registers = {
.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS5250_TMU_CLEAR_FALL_INT_SHIFT,
.emul_con = EXYNOS_EMUL_CON,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
.emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
@@ -228,6 +229,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
.tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
.tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
+ .intclr_fall_shift = EXYNOS5440_TMU_CLEAR_FALL_INT_SHIFT,
.tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
.emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
.emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index a1ea19d..9c1e2c8 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -69,9 +69,11 @@
#define EXYNOS_TMU_RISE_INT_MASK 0x111
#define EXYNOS_TMU_RISE_INT_SHIFT 0
#define EXYNOS_TMU_FALL_INT_MASK 0x111
-#define EXYNOS_TMU_FALL_INT_SHIFT 12
+#define EXYNOS_TMU_FALL_INT_SHIFT 16
#define EXYNOS_TMU_CLEAR_RISE_INT 0x111
#define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
+#define EXYNOS5250_TMU_CLEAR_FALL_INT_SHIFT 12
+#define EXYNOS5440_TMU_CLEAR_FALL_INT_SHIFT 4
#define EXYNOS_TMU_TRIP_MODE_SHIFT 13
#define EXYNOS_TMU_TRIP_MODE_MASK 0x7
#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
--
1.7.10.4
On Exynos5440 and Exynos5420 there are registers common
across the TMU channels.
To support that, we introduced a ADDRESS_MULTIPLE flag in the
driver and the 2nd set of register base and size are provided
in the "reg" property of the node.
As per Amit's suggestion, this patch changes the base_common
to base_second and SHARED_MEMORY to ADDRESS_MULTIPLE.
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v1:
None
Changes since v2:
Changed the flag name from SHARED_MEMORY to ADDRESS_MULTIPLE.
https://lkml.org/lkml/2013/8/1/38
Changes since v3:
None
Changes since v4:
Corrected a compilation error, undeclared variable
Changes since v5:
None
.../devicetree/bindings/thermal/exynos-thermal.txt | 4 ++--
drivers/thermal/samsung/exynos_tmu.c | 14 +++++++-------
drivers/thermal/samsung/exynos_tmu.h | 4 ++--
drivers/thermal/samsung/exynos_tmu_data.c | 2 +-
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 284f530..116cca0 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -11,8 +11,8 @@
- reg : Address range of the thermal registers. For soc's which has multiple
instances of TMU and some registers are shared across all TMU's like
interrupt related then 2 set of register has to supplied. First set
- belongs to each instance of TMU and second set belongs to common TMU
- registers.
+ belongs to each instance of TMU and second set belongs to second set
+ of common TMU registers.
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index b2202fa..ae80a87 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -41,7 +41,7 @@
* @id: identifier of the one instance of the TMU controller.
* @pdata: pointer to the tmu platform/configuration data
* @base: base address of the single instance of the TMU controller.
- * @base_common: base address of the common registers of the TMU controller.
+ * @base_second: base address of the common registers of the TMU controller.
* @irq: irq number of the TMU controller.
* @soc: id of the SOC type.
* @irq_work: pointer to the irq work structure.
@@ -56,7 +56,7 @@ struct exynos_tmu_data {
int id;
struct exynos_tmu_platform_data *pdata;
void __iomem *base;
- void __iomem *base_common;
+ void __iomem *base_second;
int irq;
enum soc_type soc;
struct work_struct irq_work;
@@ -297,7 +297,7 @@ skip_calib_data:
}
/*Clear the PMIN in the common TMU register*/
if (reg->tmu_pmin && !data->id)
- writel(0, data->base_common + reg->tmu_pmin);
+ writel(0, data->base_second + reg->tmu_pmin);
out:
clk_disable(data->clk);
mutex_unlock(&data->lock);
@@ -454,7 +454,7 @@ static void exynos_tmu_work(struct work_struct *work)
/* Find which sensor generated this interrupt */
if (reg->tmu_irqstatus) {
- val_type = readl(data->base_common + reg->tmu_irqstatus);
+ val_type = readl(data->base_second + reg->tmu_irqstatus);
if (!((val_type >> data->id) & 0x1))
goto out;
}
@@ -579,7 +579,7 @@ static int exynos_map_dt_data(struct platform_device *pdev)
* Check if the TMU shares some registers and then try to map the
* memory of common registers.
*/
- if (!TMU_SUPPORTS(pdata, SHARED_MEMORY))
+ if (!TMU_SUPPORTS(pdata, ADDRESS_MULTIPLE))
return 0;
if (of_address_to_resource(pdev->dev.of_node, 1, &res)) {
@@ -587,9 +587,9 @@ static int exynos_map_dt_data(struct platform_device *pdev)
return -ENODEV;
}
- data->base_common = devm_ioremap(&pdev->dev, res.start,
+ data->base_second = devm_ioremap(&pdev->dev, res.start,
resource_size(&res));
- if (!data->base_common) {
+ if (!data->base_second) {
dev_err(&pdev->dev, "Failed to ioremap memory\n");
return -ENOMEM;
}
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index 5f4fe6c..d79264f 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -60,7 +60,7 @@ enum soc_type {
* state(active/idle) can be checked.
* TMU_SUPPORT_EMUL_TIME - This features allows to set next temp emulation
* sample time.
- * TMU_SUPPORT_SHARED_MEMORY - This feature tells that the different TMU
+ * TMU_SUPPORT_ADDRESS_MULTIPLE - This feature tells that the different TMU
* sensors shares some common registers.
* TMU_SUPPORT - macro to compare the above features with the supplied.
*/
@@ -70,7 +70,7 @@ enum soc_type {
#define TMU_SUPPORT_FALLING_TRIP BIT(3)
#define TMU_SUPPORT_READY_STATUS BIT(4)
#define TMU_SUPPORT_EMUL_TIME BIT(5)
-#define TMU_SUPPORT_SHARED_MEMORY BIT(6)
+#define TMU_SUPPORT_ADDRESS_MULTIPLE BIT(6)
#define TMU_SUPPORTS(a, b) (a->features & TMU_SUPPORT_ ## b)
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 09a8a27..3d9ade5 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -257,7 +257,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.type = SOC_ARCH_EXYNOS5440, \
.registers = &exynos5440_tmu_registers, \
.features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_FALLING_TRIP | \
- TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_SHARED_MEMORY),
+ TMU_SUPPORT_MULTI_INST | TMU_SUPPORT_ADDRESS_MULTIPLE),
struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
.tmu_data = {
--
1.7.10.4
This patch adds the neccessary register changes and arch information
to support Exynos5420 SoCs
Exynos5420 has 5 TMU channels one for each CPU 0, 1, 2 and 3 and GPU
Also updated the Documentation at
Documentation/devicetree/bindings/thermal/exynos-thermal.txt
Note: The platform data structure will be handled properly once the driver
moves to complete device driver solution.
Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
---
Changes since v1:
1. modified the platform data structure in order to pass SHARED flag
for channels that need sharing of address space.
2. https://lkml.org/lkml/2013/8/1/38 is merged into this patch.
As the changes are minimum and can be added here.
Changes since v3:
a. Rearraged the code alphabetically, make exynso5420 come before exynso5440
b. Reduce code duplication in passing platform data by introducing a common macro
Bartlomiej Zolnierkiewicz Thanks for review and suggestions
Changes since v4:
None
Changes since v5:
None
.../devicetree/bindings/thermal/exynos-thermal.txt | 39 ++++++++
drivers/thermal/samsung/exynos_tmu.c | 12 ++-
drivers/thermal/samsung/exynos_tmu.h | 1 +
drivers/thermal/samsung/exynos_tmu_data.c | 99 ++++++++++++++++++++
drivers/thermal/samsung/exynos_tmu_data.h | 7 ++
5 files changed, 157 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index 116cca0..c5f9a74 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -6,6 +6,7 @@
"samsung,exynos4412-tmu"
"samsung,exynos4210-tmu"
"samsung,exynos5250-tmu"
+ "samsung,exynos5420-tmu"
"samsung,exynos5440-tmu"
- interrupt-parent : The phandle for the interrupt controller
- reg : Address range of the thermal registers. For soc's which has multiple
@@ -13,6 +14,16 @@
interrupt related then 2 set of register has to supplied. First set
belongs to each instance of TMU and second set belongs to second set
of common TMU registers.
+ NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
+ channels 2, 3 and 4
+
+ TRIMINFO at 0x1006c000 contains data for TMU channel 3
+ TRIMINFO at 0x100a0000 contains data for TMU channel 4
+ TRIMINFO at 0x10068000 contains data for TMU channel 2
+
+ The misplaced register address is passed through devicetree as the
+ second base
+
- interrupts : Should contain interrupt for thermal system
- clocks : The main clock for TMU device
- clock-names : Thermal system clock name
@@ -43,6 +54,34 @@ Example 2):
clock-names = "tmu_apbif";
};
+Example 3): (In case of Exynos5420)
+ /* tmu for CPU2 */
+ tmu@10068000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+ interrupts = <0 184 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
+ /* tmu for CPU3 */
+ tmu@1006c000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+ interrupts = <0 185 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
+ /* tmu for GPU */
+ tmu@100a0000 {
+ compatible = "samsung,exynos5420-tmu";
+ reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+ interrupts = <0 215 0>;
+ clocks = <&clock 318>;
+ clock-names = "tmu_apbif";
+ };
+
Note: For multi-instance tmu each instance should have an alias correctly
numbered in "aliases" node.
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index ae80a87..b54825a 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -186,7 +186,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
}
} else {
- trim_info = readl(data->base + reg->triminfo_data);
+ /* On exynos5420 the triminfo register is in the shared space */
+ if (data->base_second && (data->soc == SOC_ARCH_EXYNOS5420))
+ trim_info = readl(data->base_second +
+ reg->triminfo_data);
+ else
+ trim_info = readl(data->base + reg->triminfo_data);
}
data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
@@ -498,6 +503,10 @@ static const struct of_device_id exynos_tmu_match[] = {
.data = (void *)EXYNOS5250_TMU_DRV_DATA,
},
{
+ .compatible = "samsung,exynos5420-tmu",
+ .data = (void *)EXYNOS5420_TMU_DRV_DATA,
+ },
+ {
.compatible = "samsung,exynos5440-tmu",
.data = (void *)EXYNOS5440_TMU_DRV_DATA,
},
@@ -635,6 +644,7 @@ static int exynos_tmu_probe(struct platform_device *pdev)
if (pdata->type == SOC_ARCH_EXYNOS4210 ||
pdata->type == SOC_ARCH_EXYNOS4412 ||
pdata->type == SOC_ARCH_EXYNOS5250 ||
+ pdata->type == SOC_ARCH_EXYNOS5420 ||
pdata->type == SOC_ARCH_EXYNOS5440)
data->soc = pdata->type;
else {
diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
index d79264f..4b9be23 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -43,6 +43,7 @@ enum soc_type {
SOC_ARCH_EXYNOS4210 = 1,
SOC_ARCH_EXYNOS4412,
SOC_ARCH_EXYNOS5250,
+ SOC_ARCH_EXYNOS5420,
SOC_ARCH_EXYNOS5440,
};
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
index 3d9ade5..7ad8248 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -195,6 +195,105 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
};
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+static const struct exynos_tmu_registers exynos5420_tmu_registers = {
+ .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
+ .triminfo_25_shift = EXYNOS_TRIMINFO_25_SHIFT,
+ .triminfo_85_shift = EXYNOS_TRIMINFO_85_SHIFT,
+ .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
+ .buf_vref_sel_shift = EXYNOS_TMU_REF_VOLTAGE_SHIFT,
+ .buf_vref_sel_mask = EXYNOS_TMU_REF_VOLTAGE_MASK,
+ .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
+ .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
+ .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
+ .buf_slope_sel_shift = EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT,
+ .buf_slope_sel_mask = EXYNOS_TMU_BUF_SLOPE_SEL_MASK,
+ .core_en_shift = EXYNOS_TMU_CORE_EN_SHIFT,
+ .tmu_status = EXYNOS_TMU_REG_STATUS,
+ .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
+ .threshold_th0 = EXYNOS_THD_TEMP_RISE,
+ .threshold_th1 = EXYNOS_THD_TEMP_FALL,
+ .tmu_inten = EXYNOS_TMU_REG_INTEN,
+ .inten_rise_mask = EXYNOS_TMU_RISE_INT_MASK,
+ .inten_rise_shift = EXYNOS_TMU_RISE_INT_SHIFT,
+ .inten_fall_mask = EXYNOS_TMU_FALL_INT_MASK,
+ .inten_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,
+ .inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,
+ .inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,
+ /* INTEN_RISE3 Not availble in exynos5420 */
+ .inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,
+ .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
+ .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
+ .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
+ .intclr_fall_shift = EXYNOS_TMU_FALL_INT_SHIFT,
+ .emul_con = EXYNOS_EMUL_CON,
+ .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
+ .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
+ .emul_time_mask = EXYNOS_EMUL_TIME_MASK,
+};
+
+#define __EXYNOS5420_TMU_DATA \
+ .threshold_falling = 10, \
+ .trigger_levels[0] = 85, \
+ .trigger_levels[1] = 103, \
+ .trigger_levels[2] = 110, \
+ .trigger_levels[3] = 120, \
+ .trigger_enable[0] = true, \
+ .trigger_enable[1] = true, \
+ .trigger_enable[2] = true, \
+ .trigger_enable[3] = false, \
+ .trigger_type[0] = THROTTLE_ACTIVE, \
+ .trigger_type[1] = THROTTLE_ACTIVE, \
+ .trigger_type[2] = SW_TRIP, \
+ .trigger_type[3] = HW_TRIP, \
+ .max_trigger_level = 4, \
+ .gain = 8, \
+ .reference_voltage = 16, \
+ .noise_cancel_mode = 4, \
+ .cal_type = TYPE_ONE_POINT_TRIMMING, \
+ .efuse_value = 55, \
+ .min_efuse_value = 40, \
+ .max_efuse_value = 100, \
+ .first_point_trim = 25, \
+ .second_point_trim = 85, \
+ .default_temp_offset = 50, \
+ .freq_tab[0] = { \
+ .freq_clip_max = 800 * 1000, \
+ .temp_level = 85, \
+ }, \
+ .freq_tab[1] = { \
+ .freq_clip_max = 200 * 1000, \
+ .temp_level = 103, \
+ }, \
+ .freq_tab_count = 2, \
+ .type = SOC_ARCH_EXYNOS5420, \
+ .registers = &exynos5420_tmu_registers, \
+
+#define EXYNOS5420_TMU_DATA \
+ __EXYNOS5420_TMU_DATA \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
+ TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
+ TMU_SUPPORT_EMUL_TIME)
+
+#define EXYNOS5420_TMU_DATA_SHARED \
+ __EXYNOS5420_TMU_DATA \
+ .features = (TMU_SUPPORT_EMULATION | TMU_SUPPORT_TRIM_RELOAD | \
+ TMU_SUPPORT_FALLING_TRIP | TMU_SUPPORT_READY_STATUS | \
+ TMU_SUPPORT_EMUL_TIME | TMU_SUPPORT_ADDRESS_MULTIPLE)
+
+struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
+ .tmu_data = {
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ { EXYNOS5420_TMU_DATA_SHARED },
+ },
+ .tmu_count = 5,
+};
+#endif
+
#if defined(CONFIG_SOC_EXYNOS5440)
static const struct exynos_tmu_registers exynos5440_tmu_registers = {
.triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
index 9c1e2c8..87ab693 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.h
+++ b/drivers/thermal/samsung/exynos_tmu_data.h
@@ -158,6 +158,13 @@ extern struct exynos_tmu_init_data const exynos5250_default_tmu_data;
#define EXYNOS5250_TMU_DRV_DATA (NULL)
#endif
+#if defined(CONFIG_SOC_EXYNOS5420)
+extern struct exynos_tmu_init_data const exynos5420_default_tmu_data;
+#define EXYNOS5420_TMU_DRV_DATA (&exynos5420_default_tmu_data)
+#else
+#define EXYNOS5420_TMU_DRV_DATA (NULL)
+#endif
+
#if defined(CONFIG_SOC_EXYNOS5440)
extern struct exynos_tmu_init_data const exynos5440_default_tmu_data;
#define EXYNOS5440_TMU_DRV_DATA (&exynos5440_default_tmu_data)
--
1.7.10.4
Hi Naveen,
On Thursday, October 17, 2013 08:41:13 AM Naveen Krishna Chatradhi wrote:
> On Exynos5250, the FALL interrupt related en, status and clear bits are
> available at an offset of
> 16 in INTEN, INTSTAT registers and at an offset of
> 12 in INTCLEAR register.
>
> On Exynos5420, the FALL interrupt related en, status and clear bits are
> available at an offset of
> 16 in INTEN, INTSTAT and INTCLEAR registers.
>
> On Exynos5440,
> the FALL_IRQEN bits are at an offset of 4
> and the RISE_IRQEN bits are at an offset of 0
>
> This patch introduces a new bit field intclr_fall_shift to handle the
> offset for exyns5250 and exynos5440
>
> Signed-off-by: Naveen Krishna Chatradhi <[email protected]>
> ---
> Changes since v1:
> Changes since v2:
> Changes since v3:
> None
> Changes since v4:
> Correct the CLEAR_FALL_INT_SHIFT for Exynos5250/Exynos5440
> Changes since v5:
> Modify the commit message
Thank you but v5 had more issues which are not fixed yet. Please see below.
> drivers/thermal/samsung/exynos_tmu.c | 2 +-
> drivers/thermal/samsung/exynos_tmu.h | 2 ++
> drivers/thermal/samsung/exynos_tmu_data.c | 2 ++
> drivers/thermal/samsung/exynos_tmu_data.h | 4 +++-
> 4 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
> index 32f38b9..b2202fa 100644
> --- a/drivers/thermal/samsung/exynos_tmu.c
> +++ b/drivers/thermal/samsung/exynos_tmu.c
> @@ -265,7 +265,7 @@ skip_calib_data:
> data->base + reg->threshold_th1);
>
> writel((reg->inten_rise_mask << reg->inten_rise_shift) |
> - (reg->inten_fall_mask << reg->inten_fall_shift),
> + (reg->inten_fall_mask << reg->intclr_fall_shift),
> data->base + reg->tmu_intclear);
>
> /* if last threshold limit is also present */
> diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h
> index 3fb6554..5f4fe6c 100644
> --- a/drivers/thermal/samsung/exynos_tmu.h
> +++ b/drivers/thermal/samsung/exynos_tmu.h
> @@ -136,6 +136,7 @@ enum soc_type {
> * @inten_fall3_shift: shift bits of falling 3 interrupt bits.
> * @tmu_intstat: Register containing the interrupt status values.
> * @tmu_intclear: Register for clearing the raised interrupt status.
> + * @intclr_fall_shift: shift bits for interrupt clear fall 0
> * @emul_con: TMU emulation controller register.
> * @emul_temp_shift: shift bits of emulation temperature.
> * @emul_time_shift: shift bits of emulation time.
> @@ -207,6 +208,7 @@ struct exynos_tmu_registers {
> u32 tmu_intstat;
>
> u32 tmu_intclear;
> + u32 intclr_fall_shift;
>
> u32 emul_con;
> u32 emul_temp_shift;
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c
> index 073c292..09a8a27 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.c
> +++ b/drivers/thermal/samsung/exynos_tmu_data.c
> @@ -123,6 +123,7 @@ static const struct exynos_tmu_registers exynos4412_tmu_registers = {
> .inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,
> .tmu_intstat = EXYNOS_TMU_REG_INTSTAT,
> .tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,
> + .intclr_fall_shift = EXYNOS5250_TMU_CLEAR_FALL_INT_SHIFT,
> .emul_con = EXYNOS_EMUL_CON,
> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> .emul_time_shift = EXYNOS_EMUL_TIME_SHIFT,
> @@ -228,6 +229,7 @@ static const struct exynos_tmu_registers exynos5440_tmu_registers = {
> .inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,
> .tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,
> .tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,
> + .intclr_fall_shift = EXYNOS5440_TMU_CLEAR_FALL_INT_SHIFT,
> .tmu_irqstatus = EXYNOS5440_TMU_IRQ_STATUS,
> .emul_con = EXYNOS5440_TMU_S0_7_DEBUG,
> .emul_temp_shift = EXYNOS_EMUL_DATA_SHIFT,
> diff --git a/drivers/thermal/samsung/exynos_tmu_data.h b/drivers/thermal/samsung/exynos_tmu_data.h
> index a1ea19d..9c1e2c8 100644
> --- a/drivers/thermal/samsung/exynos_tmu_data.h
> +++ b/drivers/thermal/samsung/exynos_tmu_data.h
> @@ -69,9 +69,11 @@
> #define EXYNOS_TMU_RISE_INT_MASK 0x111
> #define EXYNOS_TMU_RISE_INT_SHIFT 0
> #define EXYNOS_TMU_FALL_INT_MASK 0x111
> -#define EXYNOS_TMU_FALL_INT_SHIFT 12
> +#define EXYNOS_TMU_FALL_INT_SHIFT 16
> #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
> #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
> +#define EXYNOS5250_TMU_CLEAR_FALL_INT_SHIFT 12
The better name would be EXYNOS_TMU_CLEAR_FALL_INT_SHIFT because it is
also used on EXYNOS4412.
Also in patch #3 you should define EXYNOS5420_TMU_CLEAR_FALL_INT_SHIFT
instead of re-using EXYNOS_TMU_FALL_INT_SHIFT.
Finally please remove no longer used inten_fall_shift field and related
defines (EXYNOS_TMU_FALL_INT_MASK and EXYNOS5440_TMU_FALL_INT_MASK).
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
> +#define EXYNOS5440_TMU_CLEAR_FALL_INT_SHIFT 4
> #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
> #define EXYNOS_TMU_TRIP_MODE_MASK 0x7
> #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12