2024-02-05 21:31:59

by Brandon Brnich

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Subject: [PATCH v4 0/4] Add Support for Wave5 on TI Devices

This series is responsible for adding support for Wave5 driver[0]
across numerous TI K3 platforms.

[0]: https://lore.kernel.org/all/[email protected]/

Changes since v3:
=================

* Address Andrew's comments
- remove disabled by default on all platforms
- reorder addresses in 84s4 to be correctly sorted

Changes since v2:
=================

* Remove reference to k3 as requested
* Rebase on v6.8-rc2 where new bindings are present
* Remove am62a dts entry until hrtimer[1] patch gets merged

[1]: https://patchwork.kernel.org/project/linux-media/patch/[email protected]/

Changes since v1:
=================

* Remove sram parameters
- sram-size property not included in bindings. Without this, size
will default to 0 so no point in specifying until binding is added.
* Remove global CMA pools for each platform
- This is something that has been added in TI backport of driver
and does not yet have reliable support in upstream version.
- Removing for now with intention to add back once 48-bit
addressing is supported in upstream Wave5 driver.

Brandon Brnich (3):
arm64: dts: ti: k3-j784s4: Add Wave5 Video Encoder/Decoder Node
arm64: dts: ti: k3-am62p: Add Wave5 Video Encoder/Decoder Node
arm64: defconfig: Enable Wave5 Video Encoder/Decoder

Darren Etheridge (1):
arm64: dts: ti: k3-j721s2-main: Add Wave5 Video Encoder/Decoder Node

arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 9 +++++++++
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 9 +++++++++
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 18 ++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 2 ++
arch/arm64/configs/defconfig | 1 +
5 files changed, 39 insertions(+)

--
2.34.1



2024-02-05 21:32:00

by Brandon Brnich

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Subject: [PATCH v4 2/4] arm64: dts: ti: k3-j721s2-main: Add Wave5 Video Encoder/Decoder Node

From: Darren Etheridge <[email protected]>

Add the Chips and Media wave521cl video decoder/encoder node on J721S2.

Signed-off-by: Darren Etheridge <[email protected]>
Signed-off-by: Brandon Brnich <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index ea7f2b2ab165..df4cdbf94539 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -716,6 +716,15 @@ main_i2c6: i2c@2060000 {
status = "disabled";
};

+ vpu: video-codec@4210000 {
+ compatible = "ti,j721s2-wave521c", "cnm,wave521c";
+ reg = <0x00 0x4210000 0x00 0x10000>;
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 179 2>;
+ clock-names = "vcodec";
+ power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
+ };
+
main_sdhci0: mmc@4f80000 {
compatible = "ti,j721e-sdhci-8bit";
reg = <0x00 0x04f80000 0x00 0x1000>,
--
2.34.1


2024-02-05 21:32:59

by Brandon Brnich

[permalink] [raw]
Subject: [PATCH v4 4/4] arm64: defconfig: Enable Wave5 Video Encoder/Decoder

Enable Wave521c video decoder/encoder driver on all TI
K3 platforms that contain the IP.

Signed-off-by: Brandon Brnich <[email protected]>
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index e6cf3e5d63c3..6fe4f2da4aca 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -795,6 +795,7 @@ CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_CADENCE_CSI2RX=m
CONFIG_VIDEO_MEDIATEK_JPEG=m
CONFIG_VIDEO_MEDIATEK_VCODEC=m
+CONFIG_VIDEO_WAVE_VPU=m
CONFIG_VIDEO_IMX7_CSI=m
CONFIG_VIDEO_IMX_MIPI_CSIS=m
CONFIG_VIDEO_IMX8_ISI=m
--
2.34.1


2024-02-05 21:37:49

by Brandon Brnich

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Subject: [PATCH v4 1/4] arm64: dts: ti: k3-j784s4: Add Wave5 Video Encoder/Decoder Node

This patch adds support for the Wave521cl on the J784S4-evm.

Signed-off-by: Brandon Brnich <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 18 ++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 2 ++
2 files changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index f2b720ed1e4f..e628e748f215 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -662,6 +662,24 @@ main_i2c6: i2c@2060000 {
status = "disabled";
};

+ vpu0: video-codec@4210000 {
+ compatible = "ti,j721s2-wave521c", "cnm,wave521c";
+ reg = <0x00 0x4210000 0x00 0x10000>;
+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 241 2>;
+ clock-names = "vcodec";
+ power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
+ };
+
+ vpu1: video-codec@4220000 {
+ compatible = "ti,j721s2-wave521c", "cnm,wave521c";
+ reg = <0x00 0x4220000 0x00 0x10000>;
+ interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&k3_clks 242 2>;
+ clock-names = "vcodec";
+ power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
+ };
+
main_sdhci0: mmc@4f80000 {
compatible = "ti,j721e-sdhci-8bit";
reg = <0x00 0x04f80000 0x00 0x1000>,
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
index 4398c3a463e1..2f633721a0c6 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
@@ -235,6 +235,8 @@ cbass_main: bus@100000 {
ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */
<0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */
+ <0x00 0x04210000 0x00 0x04210000 0x00 0x00010000>, /* VPU0 */
+ <0x00 0x04220000 0x00 0x04220000 0x00 0x00010000>, /* VPU1 */
<0x00 0x0d000000 0x00 0x0d000000 0x00 0x01000000>, /* PCIe Core*/
<0x00 0x10000000 0x00 0x10000000 0x00 0x08000000>, /* PCIe0 DAT0 */
<0x00 0x18000000 0x00 0x18000000 0x00 0x08000000>, /* PCIe1 DAT0 */
--
2.34.1


2024-02-15 04:18:18

by Vignesh Raghavendra

[permalink] [raw]
Subject: Re: [PATCH v4 1/4] arm64: dts: ti: k3-j784s4: Add Wave5 Video Encoder/Decoder Node

Hi Brandon

On 06/02/24 01:17, Brandon Brnich wrote:
> This patch adds support for the Wave521cl on the J784S4-evm.
>
> Signed-off-by: Brandon Brnich <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 18 ++++++++++++++++++
> arch/arm64/boot/dts/ti/k3-j784s4.dtsi | 2 ++
> 2 files changed, 20 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index f2b720ed1e4f..e628e748f215 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -662,6 +662,24 @@ main_i2c6: i2c@2060000 {
> status = "disabled";
> };
>
> + vpu0: video-codec@4210000 {
> + compatible = "ti,j721s2-wave521c", "cnm,wave521c";
> + reg = <0x00 0x4210000 0x00 0x10000>;
> + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 241 2>;
> + clock-names = "vcodec";

Binding doesn't allow clock-names [0]

[0] Documentation/devicetree/bindings/media/cnm,wave521c.yaml

> + power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
> + };
> +
> + vpu1: video-codec@4220000 {
> + compatible = "ti,j721s2-wave521c", "cnm,wave521c";
> + reg = <0x00 0x4220000 0x00 0x10000>;
> + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&k3_clks 242 2>;
> + clock-names = "vcodec";
> + power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
> + };
> +
> main_sdhci0: mmc@4f80000 {
> compatible = "ti,j721e-sdhci-8bit";
> reg = <0x00 0x04f80000 0x00 0x1000>,
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> index 4398c3a463e1..2f633721a0c6 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4.dtsi
> @@ -235,6 +235,8 @@ cbass_main: bus@100000 {
> ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
> <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */
> <0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */
> + <0x00 0x04210000 0x00 0x04210000 0x00 0x00010000>, /* VPU0 */
> + <0x00 0x04220000 0x00 0x04220000 0x00 0x00010000>, /* VPU1 */
> <0x00 0x0d000000 0x00 0x0d000000 0x00 0x01000000>, /* PCIe Core*/
> <0x00 0x10000000 0x00 0x10000000 0x00 0x08000000>, /* PCIe0 DAT0 */
> <0x00 0x18000000 0x00 0x18000000 0x00 0x08000000>, /* PCIe1 DAT0 */

--
Regards
Vignesh