This patch set adds basic support for the Mediatek Cortex-A7 SoCs.
Support is quite basic, as the only components working up to now are the
timers and the low-level debug via UART.
The patch series is build against torvalds/master tree
Matthias Brugger (4):
clocksource: Add support for the Mediatek SoCs
dt-bindings: add mtk-timer bindings
arm: add basic support for Mediatek MT6589 boards
arm: mediatek: Add earlyprintk support for MT6589
.../bindings/timer/mediatek,mtk-timer.txt | 19 ++
.../devicetree/bindings/vendor-prefixes.txt | 1 +
arch/arm/Kconfig | 2 +
arch/arm/Kconfig.debug | 49 +++-
arch/arm/Makefile | 1 +
arch/arm/boot/dts/mtk6589.dtsi | 105 +++++++++
arch/arm/include/debug/mediatek.S | 38 +++
arch/arm/mach-mediatek/Kconfig | 14 ++
arch/arm/mach-mediatek/Makefile | 1 +
arch/arm/mach-mediatek/mediatek.c | 40 ++++
drivers/clocksource/Kconfig | 4 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/mtk_timer.c | 248 ++++++++++++++++++++
13 files changed, 521 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
create mode 100644 arch/arm/boot/dts/mtk6589.dtsi
create mode 100644 arch/arm/include/debug/mediatek.S
create mode 100644 arch/arm/mach-mediatek/Kconfig
create mode 100644 arch/arm/mach-mediatek/Makefile
create mode 100644 arch/arm/mach-mediatek/mediatek.c
create mode 100644 drivers/clocksource/mtk_timer.c
--
1.7.9.5
Add binding documentation for the General Porpose Timer driver of
the Mediatek SoCs.
Signed-off-by: Matthias Brugger <[email protected]>
---
.../bindings/timer/mediatek,mtk-timer.txt | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
new file mode 100644
index 0000000..db3c836
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
@@ -0,0 +1,19 @@
+Mediatek MT6598, MT6577 and MT6572 Timers
+---------------------------------------
+
+Required properties:
+- compatible: Should be "mediatek,mtk6589-timer"
+- reg: Should contain location and length for timers register.
+- clock-names : Must include the following entries:
+ "sysclk" (13 MHz system clock),
+ "rtcclk" (32 KHz RTC clock).
+
+Examples:
+
+ timer {
+ compatible = "mediatek,mtk6589-timer";
+ reg = <0x10008000 0x80>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&system_clk>, <&rtc-clk>;
+ clock-names = "sysclk", "rtcclk";
+ };
--
1.7.9.5
Signed-off-by: Matthias Brugger <[email protected]>
---
arch/arm/Kconfig.debug | 49 +++++++++++++++++++++++++++++++++++--
arch/arm/include/debug/mediatek.S | 38 ++++++++++++++++++++++++++++
2 files changed, 85 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/debug/mediatek.S
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 4a2fc0b..dc51495 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -797,6 +797,38 @@ choice
Say Y here if you want kernel low-level debugging support
on Ux500 based platforms.
+ config DEBUG_MTK6589_UART0
+ depends on ARCH_MEDIATEK
+ bool "Mediatek mt6589 UART0"
+ select DEBUG_UART_MEDIATEK
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Mediatek mt6589 based platforms.
+
+ config DEBUG_MTK6589_UART1
+ depends on ARCH_MEDIATEK
+ bool "Mediatek mt6589 UART1"
+ select DEBUG_UART_MEDIATEK
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Mediatek mt6589 based platforms.
+
+ config DEBUG_MTK6589_UART2
+ depends on ARCH_MEDIATEK
+ bool "Mediatek mt6589 UART2"
+ select DEBUG_UART_MEDIATEK
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Mediatek mt6589 based platforms.
+
+ config DEBUG_MTK6589_UART3
+ depends on ARCH_MEDIATEK
+ bool "Mediatek mt6589 UART3"
+ select DEBUG_UART_MEDIATEK
+ help
+ Say Y here if you want kernel low-level debugging support
+ on Mediatek mt6589 based platforms.
+
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
depends on ARCH_VEXPRESS && CPU_CP15_MMU
@@ -954,6 +986,10 @@ config DEBUG_MSM_UART
bool
depends on ARCH_MSM || ARCH_QCOM
+config DEBUG_UART_MEDIATEK
+ bool
+ depends on ARCH_MEDIATEK
+
config DEBUG_LL_INCLUDE
string
default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
@@ -971,6 +1007,7 @@ config DEBUG_LL_INCLUDE
DEBUG_IMX53_UART ||\
DEBUG_IMX6Q_UART || \
DEBUG_IMX6SL_UART
+ default "debug/mediatek.S" if DEBUG_UART_MEDIATEK
default "debug/msm.S" if DEBUG_MSM_UART
default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
@@ -1043,6 +1080,10 @@ config DEBUG_UART_PHYS
default 0xd0012000 if DEBUG_MVEBU_UART
default 0xd4017000 if DEBUG_MMP_UART2
default 0xd4018000 if DEBUG_MMP_UART3
+ default 0x11006000 if DEBUG_MTK6589_UART0
+ default 0x11007000 if DEBUG_MTK6589_UART1
+ default 0x11008000 if DEBUG_MTK6589_UART2
+ default 0x11009000 if DEBUG_MTK6589_UART3
default 0xe0000000 if ARCH_SPEAR13XX
default 0xf0000be0 if ARCH_EBSA110
default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE
@@ -1058,7 +1099,7 @@ config DEBUG_UART_PHYS
default 0xfffff700 if ARCH_IOP33X
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
DEBUG_LL_UART_EFM32 || \
- DEBUG_UART_8250 || DEBUG_UART_PL01X
+ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_UART_MEDIATEK
config DEBUG_UART_VIRT
hex "Virtual base address of debug UART"
@@ -1087,6 +1128,10 @@ config DEBUG_UART_VIRT
default 0xfe012000 if ARCH_ORION5X
default 0xfe017000 if DEBUG_MMP_UART2
default 0xfe018000 if DEBUG_MMP_UART3
+ default 0xF1006000 if DEBUG_MTK6589_UART0
+ default 0xF1007000 if DEBUG_MTK6589_UART1
+ default 0xF1008000 if DEBUG_MTK6589_UART2
+ default 0xF1009000 if DEBUG_MTK6589_UART3
default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART
default 0xfe230000 if DEBUG_PICOXCELL_UART
default 0xfe300000 if DEBUG_BCM_KONA_UART
@@ -1116,7 +1161,7 @@ config DEBUG_UART_VIRT
default 0xff003000 if DEBUG_U300_UART
default DEBUG_UART_PHYS if !MMU
depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
- DEBUG_UART_8250 || DEBUG_UART_PL01X
+ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_UART_MEDIATEK
config DEBUG_UART_8250_SHIFT
int "Register offset shift for the 8250 debug UART"
diff --git a/arch/arm/include/debug/mediatek.S b/arch/arm/include/debug/mediatek.S
new file mode 100644
index 0000000..98e8414
--- /dev/null
+++ b/arch/arm/include/debug/mediatek.S
@@ -0,0 +1,38 @@
+/*
+ * Low-level debug macro for Mediatek SoCs
+ *
+ * Copyright (c) 2014 MundoReader S.L.
+ * Author: Matthias Brugger <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include <linux/serial_reg.h>
+
+ .macro addruart, rp, rv, tmp
+ ldr \rp, =CONFIG_DEBUG_UART_PHYS
+ ldr \rv, =CONFIG_DEBUG_UART_VIRT
+ .endm
+
+ .macro senduart,rd,rx
+ strb \rd, [\rx, #0x0]
+ .endm
+
+ .macro waituart,rd,rx
+1001: ldr \rd, [\rx, #0x14]
+ tst \rd, #0x40
+ beq 1001b
+ .endm
+
+ .macro busyuart,rd,rx
+1002: ldr \rd, [\rx, #0x14]
+ tst \rd, #0x40
+ beq 1002b
+ .endm
--
1.7.9.5
This adds a generic devicetree board file and a dtsi for boards
based on the MT6589 SoCs from Mediatek.
Apart from the generic parts (gic, clocks) the only component
currently supported are the timers.
Signed-off-by: Matthias Brugger <[email protected]>
---
.../devicetree/bindings/vendor-prefixes.txt | 1 +
arch/arm/Kconfig | 2 +
arch/arm/Makefile | 1 +
arch/arm/boot/dts/mtk6589.dtsi | 105 ++++++++++++++++++++
arch/arm/mach-mediatek/Kconfig | 14 +++
arch/arm/mach-mediatek/Makefile | 1 +
arch/arm/mach-mediatek/mediatek.c | 40 ++++++++
7 files changed, 164 insertions(+)
create mode 100644 arch/arm/boot/dts/mtk6589.dtsi
create mode 100644 arch/arm/mach-mediatek/Kconfig
create mode 100644 arch/arm/mach-mediatek/Makefile
create mode 100644 arch/arm/mach-mediatek/mediatek.c
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 0f01c9b..af48801 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -67,6 +67,7 @@ linux Linux-specific binding
lsi LSI Corp. (LSI Logic)
marvell Marvell Technology Group Ltd.
maxim Maxim Integrated Products
+mediatek MediaTek Inc.
microchip Microchip Technology Inc.
mosaixtech Mosaix Technologies, Inc.
moxa Moxa
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5db05f6a..04d46ec 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -995,6 +995,8 @@ source "arch/arm/mach-mv78xx0/Kconfig"
source "arch/arm/mach-imx/Kconfig"
+source "arch/arm/mach-mediatek/Kconfig"
+
source "arch/arm/mach-mxs/Kconfig"
source "arch/arm/mach-netx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 41c1931..8ce9774 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -170,6 +170,7 @@ machine-$(CONFIG_ARCH_MSM) += msm
machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0
machine-$(CONFIG_ARCH_MVEBU) += mvebu
machine-$(CONFIG_ARCH_MXC) += imx
+machine-$(CONFIG_ARCH_MEDIATEK) += mediatek
machine-$(CONFIG_ARCH_MXS) += mxs
machine-$(CONFIG_ARCH_NETX) += netx
machine-$(CONFIG_ARCH_NOMADIK) += nomadik
diff --git a/arch/arm/boot/dts/mtk6589.dtsi b/arch/arm/boot/dts/mtk6589.dtsi
new file mode 100644
index 0000000..6dbb74f
--- /dev/null
+++ b/arch/arm/boot/dts/mtk6589.dtsi
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2014 MundoReader S.L.
+ * Author: Matthias Brugger <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "mediatek,mt6589";
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ next-level-cache = <&L2>;
+ reg = <0x0>;
+ };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ next-level-cache = <&L2>;
+ reg = <0x1>;
+ };
+ cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ next-level-cache = <&L2>;
+ reg = <0x2>;
+ };
+ cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ next-level-cache = <&L2>;
+ reg = <0x3>;
+ };
+
+ };
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ system_clk: system_clk {
+ compatible = "fixed-clock";
+ clock-frequency = <13000000>;
+ #clock-cells = <0>;
+ clock-output-names = "system_clk";
+ };
+
+ rtc_clk: rtc_clk {
+ compatible = "fixed-clock";
+ clock-frequency = <32000>;
+ #clock-cells = <0>;
+ clock-output-names = "rtc_clk";
+ };
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ clock-ranges;
+ ranges;
+
+ gic: interrupt-controller@10212000 {
+ compatible = "arm,cortex-a9-gic";
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ reg = <0x10211000 0x1000>,
+ <0x10212000 0x1000>;
+ };
+
+ L2: l2-cache-controller@1020e000 {
+ compatible = "arm,pl310-cache";
+ reg = <0x1020e000 0x1000>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
+ timer: timer@10008000 {
+ compatible = "mediatek,mtk6589-timer";
+ reg = <0x10008000 0x80>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&system_clk>, <&rtc_clk>;
+ clock-names = "sys_clk", "rtc_clk";
+ };
+ };
+};
diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
new file mode 100644
index 0000000..c0139ca
--- /dev/null
+++ b/arch/arm/mach-mediatek/Kconfig
@@ -0,0 +1,14 @@
+config ARCH_MEDIATEK
+ bool "Mediatek MT6589 SoC" if ARCH_MULTI_V7
+ select ARCH_REQUIRE_GPIOLIB
+ select ARM_GIC
+ select CACHE_L2X0
+ select HAVE_ARM_TWD if LOCAL_TIMERS
+ select HAVE_SMP
+ select LOCAL_TIMERS if SMP
+ select COMMON_CLK
+ select GENERIC_CLOCKEVENTS
+ select MTK_TIMER
+ select CLKSRC_MMIO
+ help
+ Support for Mediatek Cortex-A7 Quad-Core-SoC MT6589.
diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
new file mode 100644
index 0000000..43e619f
--- /dev/null
+++ b/arch/arm/mach-mediatek/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
new file mode 100644
index 0000000..f630403
--- /dev/null
+++ b/arch/arm/mach-mediatek/mediatek.c
@@ -0,0 +1,40 @@
+/*
+ * Device Tree support for Mediatek SoCs
+ *
+ * Copyright (c) 2014 MundoReader S.L.
+ * Author: Matthias Brugger <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <linux/irqchip.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/hardware/cache-l2x0.h>
+
+static void __init mediatek_dt_init(void)
+{
+ l2x0_of_init(0, ~0);
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char * const mediatek_board_dt_compat[] = {
+ "mediatek,mt6589",
+ NULL,
+};
+
+DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
+ .init_machine = mediatek_dt_init,
+ .dt_compat = mediatek_board_dt_compat,
+MACHINE_END
--
1.7.9.5
This patch adds a clock source and clock event for the timer found
on the Mediatek SoCs.
The Mediatek General Porpose Timer block provides five 32 bit timers and
one 64 bit timer.
Two 32 bit timers are used:
TIMER1: clock events supporting periodic and oneshot events
TIMER2: clock source configured as a free running counter
The General Porpose Timer block can be run with two clocks. A 13 MHz system
clock and the RTC clock running at 32 KHz. This implementation uses the system
clock.
Signed-off-by: Matthias Brugger <[email protected]>
---
drivers/clocksource/Kconfig | 4 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/mtk_timer.c | 248 +++++++++++++++++++++++++++++++++++++++
3 files changed, 253 insertions(+)
create mode 100644 drivers/clocksource/mtk_timer.c
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 96918e1..bb29321 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -144,6 +144,10 @@ config VF_PIT_TIMER
config SYS_SUPPORTS_SH_CMT
bool
+config MTK_TIMER
+ bool
+
+
config SYS_SUPPORTS_SH_MTU2
bool
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 98cb6c5..619d302 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o
obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o
obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o
obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o
+obj-$(CONFIG_MTK_TIMER) += mtk_timer.o
obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
new file mode 100644
index 0000000..bf901e3
--- /dev/null
+++ b/drivers/clocksource/mtk_timer.c
@@ -0,0 +1,248 @@
+/*
+ * Mediatek SoCs General-Purpose Timer handling.
+ *
+ * Copyright (C) 2014 Matthias Brugger
+ *
+ * Matthias Brugger <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/irqreturn.h>
+#include <linux/sched_clock.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#define GPT_IRQ_EN_REG 0x00
+#define GPT_IRQ_ENABLE(val) BIT(val-1)
+#define GPT_IRQ_ST_REG 0x04
+#define GPT_IRQ_ACK_REG 0x08
+#define GPT_IRQ_ACK(val) BIT(val-1)
+
+#define TIMER_CTRL_REG(val) (0x10 * val)
+#define TIMER_CTRL_OP(val) (((val) & 0x3) << 4)
+#define TIMER_CTRL_OP_ONESHOT (0)
+#define TIMER_CTRL_OP_REPEAT (1)
+#define TIMER_CTRL_OP_KEEPGO (2)
+#define TIMER_CTRL_OP_FREERUN (3)
+#define TIMER_CTRL_CLEAR (2)
+#define TIMER_CTRL_ENABLE (1)
+#define TIMER_CTRL_DISABLE (0)
+
+#define TIMER_CLK_REG(val) (0x04 + (0x10 * val))
+#define TIMER_CLK_SRC(val) (((val) & 0x1) << 4)
+#define TIMER_CLK_SRC_SYS13M (0)
+#define TIMER_CLK_SRC_RTC32K (1)
+#define TIMER_CLK_DIV1 (0x0)
+#define TIMER_CLK_DIV2 (0x1)
+#define TIMER_CLK_DIV3 (0x2)
+#define TIMER_CLK_DIV4 (0x3)
+#define TIMER_CLK_DIV5 (0x4)
+#define TIMER_CLK_DIV6 (0x5)
+#define TIMER_CLK_DIV7 (0x6)
+#define TIMER_CLK_DIV8 (0x7)
+#define TIMER_CLK_DIV9 (0x8)
+#define TIMER_CLK_DIV10 (0x9)
+#define TIMER_CLK_DIV11 (0xA)
+#define TIMER_CLK_DIV12 (0xB)
+#define TIMER_CLK_DIV13 (0xC)
+#define TIMER_CLK_DIV16 (0xD)
+#define TIMER_CLK_DIV32 (0xE)
+#define TIMER_CLK_DIV64 (0xF)
+
+#define TIMER_CNT_REG(val) (0x08 + (0x10 * val))
+#define TIMER_CMP_REG(val) (0x0C + (0x10 * val))
+
+#define GPT_CLK_EVT 1
+#define GPT_CLK_SRC 2
+
+static void __iomem *gpt_base;
+static u32 ticks_per_jiffy;
+
+static void mtk_clkevt_time_stop(u8 timer)
+{
+ u32 val = readl(gpt_base + TIMER_CTRL_REG(timer));
+ writel(val & ~TIMER_CTRL_ENABLE, gpt_base + TIMER_CTRL_REG(timer));
+}
+
+static void mtk_clkevt_time_setup(unsigned long delay, u8 timer)
+{
+ writel(delay, gpt_base + TIMER_CMP_REG(timer));
+}
+
+static void mtk_clkevt_time_start(bool periodic, u8 timer)
+{
+ u32 val;
+
+ /* Acknowledge interrupt */
+ writel(GPT_IRQ_ACK(timer), gpt_base + GPT_IRQ_ACK_REG);
+
+ val = readl(gpt_base + TIMER_CTRL_REG(timer));
+
+ /* Clear 2 bit timer operation mode field */
+ val &= ~TIMER_CTRL_OP(0x3);
+
+ if (periodic)
+ val |= TIMER_CTRL_OP(TIMER_CTRL_OP_REPEAT);
+ else
+ val |= TIMER_CTRL_OP(TIMER_CTRL_OP_ONESHOT);
+
+ writel(val | TIMER_CTRL_ENABLE | TIMER_CTRL_CLEAR,
+ gpt_base + TIMER_CTRL_REG(timer));
+}
+
+static void mtk_clkevt_mode(enum clock_event_mode mode,
+ struct clock_event_device *clk)
+{
+ mtk_clkevt_time_stop(GPT_CLK_EVT);
+
+ switch (mode) {
+ case CLOCK_EVT_MODE_PERIODIC:
+ mtk_clkevt_time_setup(ticks_per_jiffy, GPT_CLK_EVT);
+ mtk_clkevt_time_start(true, GPT_CLK_EVT);
+ break;
+ case CLOCK_EVT_MODE_ONESHOT:
+ mtk_clkevt_time_start(false, GPT_CLK_EVT);
+ break;
+ case CLOCK_EVT_MODE_UNUSED:
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ default:
+ /* No more interrupts will occur as source is disabled */
+ break;
+ }
+}
+
+static int mtk_clkevt_next_event(unsigned long evt,
+ struct clock_event_device *unused)
+{
+ mtk_clkevt_time_stop(GPT_CLK_EVT);
+ mtk_clkevt_time_setup(evt, GPT_CLK_EVT);
+ mtk_clkevt_time_start(false, GPT_CLK_EVT);
+
+ return 0;
+}
+
+static struct clock_event_device mtk_clockevent = {
+ .name = "mtk_tick",
+ .rating = 300,
+ .shift = 32,
+ .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
+ .set_mode = mtk_clkevt_mode,
+ .set_next_event = mtk_clkevt_next_event,
+};
+
+
+static irqreturn_t mtk_timer_interrupt(int irq, void *dev_id)
+{
+ struct clock_event_device *evt = (struct clock_event_device *)dev_id;
+
+ /* Acknowledge timer0 irq */
+ writel(GPT_IRQ_ACK(GPT_CLK_EVT), gpt_base + GPT_IRQ_ACK_REG);
+ evt->event_handler(evt);
+
+ return IRQ_HANDLED;
+}
+
+static void mtk_timer_global_reset(void)
+{
+ /* Disable all interrupts */
+ writel(0x0, gpt_base + GPT_IRQ_EN_REG);
+ /* Acknowledge all interrupts */
+ writel(0x3f, gpt_base + GPT_IRQ_ACK_REG);
+}
+
+static void mtk_timer_reset(u8 timer)
+{
+ writel(TIMER_CTRL_CLEAR | TIMER_CTRL_DISABLE,
+ gpt_base + TIMER_CTRL_REG(timer));
+ writel(0x0, gpt_base + TIMER_CMP_REG(timer));
+}
+
+static struct irqaction mtk_timer_irq = {
+ .name = "mtk_timer0",
+ .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
+ .handler = mtk_timer_interrupt,
+ .dev_id = &mtk_clockevent,
+};
+
+static u32 mtk_timer_sched_read(void)
+{
+ return readl(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC));
+}
+
+static void __init mtk_timer_init(struct device_node *node)
+{
+ unsigned long rate = 0;
+ struct clk *clk;
+ int ret, irq;
+ u32 val;
+
+ gpt_base = of_iomap(node, 0);
+ if (!gpt_base)
+ panic("Can't map registers");
+
+ irq = irq_of_parse_and_map(node, 0);
+ if (irq <= 0)
+ panic("Can't parse IRQ");
+
+ clk = of_clk_get_by_name(node, "sys_clk");
+ if (IS_ERR(clk))
+ panic("Can't get timer clock");
+ clk_prepare_enable(clk);
+
+ rate = clk_get_rate(clk);
+
+ mtk_timer_global_reset();
+
+ /* Configure clock source */
+ mtk_timer_reset(GPT_CLK_SRC);
+
+ writel(TIMER_CLK_SRC(TIMER_CLK_SRC_SYS13M) | TIMER_CLK_DIV1,
+ gpt_base + TIMER_CLK_REG(GPT_CLK_SRC));
+
+ writel(TIMER_CTRL_OP(TIMER_CTRL_OP_FREERUN) | TIMER_CTRL_ENABLE,
+ gpt_base + TIMER_CTRL_REG(GPT_CLK_SRC));
+
+ clocksource_mmio_init(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), node->name,
+ rate, 300, 32, clocksource_mmio_readl_up);
+
+ ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
+
+ /* Configure clock event */
+ mtk_timer_reset(GPT_CLK_EVT);
+
+ writel(TIMER_CLK_SRC(TIMER_CLK_SRC_SYS13M) | TIMER_CLK_DIV1,
+ gpt_base + TIMER_CLK_REG(GPT_CLK_EVT));
+ writel(0, gpt_base + TIMER_CMP_REG(GPT_CLK_EVT));
+
+ writel(TIMER_CTRL_OP(TIMER_CTRL_OP_REPEAT) | TIMER_CTRL_ENABLE,
+ gpt_base + TIMER_CTRL_REG(GPT_CLK_EVT));
+
+ ret = setup_irq(irq, &mtk_timer_irq);
+ if (ret)
+ pr_warn("failed to setup irq %d\n", irq);
+
+ /* Enable timer0 interrupt */
+ val = readl(gpt_base + GPT_IRQ_EN_REG);
+ writel(val | GPT_IRQ_ENABLE(GPT_CLK_EVT), gpt_base + GPT_IRQ_EN_REG);
+
+ mtk_clockevent.cpumask = cpumask_of(0);
+
+ clockevents_config_and_register(&mtk_clockevent, rate, 0x3,
+ 0xffffffff);
+}
+CLOCKSOURCE_OF_DECLARE(mtk_mt6589, "mediatek,mtk6589-timer", mtk_timer_init);
+
--
1.7.9.5
Hi Matthias,
On 09/04/2014 19:45, Matthias Brugger wrote:
> This adds a generic devicetree board file and a dtsi for boards
> based on the MT6589 SoCs from Mediatek.
>
> Apart from the generic parts (gic, clocks) the only component
> currently supported are the timers.
>
> Signed-off-by: Matthias Brugger <[email protected]>
> ---
> .../devicetree/bindings/vendor-prefixes.txt | 1 +
> arch/arm/Kconfig | 2 +
> arch/arm/Makefile | 1 +
> arch/arm/boot/dts/mtk6589.dtsi | 105 ++++++++++++++++++++
> arch/arm/mach-mediatek/Kconfig | 14 +++
> arch/arm/mach-mediatek/Makefile | 1 +
> arch/arm/mach-mediatek/mediatek.c | 40 ++++++++
> 7 files changed, 164 insertions(+)
> create mode 100644 arch/arm/boot/dts/mtk6589.dtsi
> create mode 100644 arch/arm/mach-mediatek/Kconfig
> create mode 100644 arch/arm/mach-mediatek/Makefile
> create mode 100644 arch/arm/mach-mediatek/mediatek.c
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
> index 0f01c9b..af48801 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
> @@ -67,6 +67,7 @@ linux Linux-specific binding
> lsi LSI Corp. (LSI Logic)
> marvell Marvell Technology Group Ltd.
> maxim Maxim Integrated Products
> +mediatek MediaTek Inc.
> microchip Microchip Technology Inc.
> mosaixtech Mosaix Technologies, Inc.
> moxa Moxa
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 5db05f6a..04d46ec 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -995,6 +995,8 @@ source "arch/arm/mach-mv78xx0/Kconfig"
>
> source "arch/arm/mach-imx/Kconfig"
>
> +source "arch/arm/mach-mediatek/Kconfig"
> +
> source "arch/arm/mach-mxs/Kconfig"
>
> source "arch/arm/mach-netx/Kconfig"
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 41c1931..8ce9774 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -170,6 +170,7 @@ machine-$(CONFIG_ARCH_MSM) += msm
> machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0
> machine-$(CONFIG_ARCH_MVEBU) += mvebu
> machine-$(CONFIG_ARCH_MXC) += imx
> +machine-$(CONFIG_ARCH_MEDIATEK) += mediatek
> machine-$(CONFIG_ARCH_MXS) += mxs
> machine-$(CONFIG_ARCH_NETX) += netx
> machine-$(CONFIG_ARCH_NOMADIK) += nomadik
> diff --git a/arch/arm/boot/dts/mtk6589.dtsi b/arch/arm/boot/dts/mtk6589.dtsi
> new file mode 100644
> index 0000000..6dbb74f
> --- /dev/null
> +++ b/arch/arm/boot/dts/mtk6589.dtsi
> @@ -0,0 +1,105 @@
> +/*
> + * Copyright (c) 2014 MundoReader S.L.
> + * Author: Matthias Brugger <[email protected]>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include "skeleton.dtsi"
> +
> +/ {
> + compatible = "mediatek,mt6589";
> + interrupt-parent = <&gic>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + next-level-cache = <&L2>;
> + reg = <0x0>;
> + };
> + cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + next-level-cache = <&L2>;
> + reg = <0x1>;
> + };
> + cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + next-level-cache = <&L2>;
> + reg = <0x2>;
> + };
> + cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + next-level-cache = <&L2>;
> + reg = <0x3>;
> + };
> +
> + };
> +
> + clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + system_clk: system_clk {
> + compatible = "fixed-clock";
> + clock-frequency = <13000000>;
> + #clock-cells = <0>;
> + clock-output-names = "system_clk";
> + };
Is it really a fixed clock without any parent, or do you
declare it as a fixed clock because you don't have any clock
common framework support yet?
> +
> + rtc_clk: rtc_clk {
> + compatible = "fixed-clock";
> + clock-frequency = <32000>;
> + #clock-cells = <0>;
> + clock-output-names = "rtc_clk";
> + };
> + };
> +
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "simple-bus";
> + clock-ranges;
> + ranges;
> +
> + gic: interrupt-controller@10212000 {
> + compatible = "arm,cortex-a9-gic";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + reg = <0x10211000 0x1000>,
> + <0x10212000 0x1000>;
> + };
> +
> + L2: l2-cache-controller@1020e000 {
> + compatible = "arm,pl310-cache";
> + reg = <0x1020e000 0x1000>;
> + cache-unified;
> + cache-level = <2>;
> + };
> +
> + timer: timer@10008000 {
> + compatible = "mediatek,mtk6589-timer";
> + reg = <0x10008000 0x80>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&system_clk>, <&rtc_clk>;
> + clock-names = "sys_clk", "rtc_clk";
> + };
> + };
> +};
> diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
> new file mode 100644
> index 0000000..c0139ca
> --- /dev/null
> +++ b/arch/arm/mach-mediatek/Kconfig
> @@ -0,0 +1,14 @@
> +config ARCH_MEDIATEK
> + bool "Mediatek MT6589 SoC" if ARCH_MULTI_V7
> + select ARCH_REQUIRE_GPIOLIB
> + select ARM_GIC
> + select CACHE_L2X0
> + select HAVE_ARM_TWD if LOCAL_TIMERS
LOCAL_TIMERS no longer exist
> + select HAVE_SMP
> + select LOCAL_TIMERS if SMP
ditto
so what about this instead:
select HAVE_ARM_TWD if SMP
The rest of this patch looks good.
Thanks,
Gregory
> + select COMMON_CLK
> + select GENERIC_CLOCKEVENTS
> + select MTK_TIMER
> + select CLKSRC_MMIO
> + help
> + Support for Mediatek Cortex-A7 Quad-Core-SoC MT6589.
> diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
> new file mode 100644
> index 0000000..43e619f
> --- /dev/null
> +++ b/arch/arm/mach-mediatek/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
> diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
> new file mode 100644
> index 0000000..f630403
> --- /dev/null
> +++ b/arch/arm/mach-mediatek/mediatek.c
> @@ -0,0 +1,40 @@
> +/*
> + * Device Tree support for Mediatek SoCs
> + *
> + * Copyright (c) 2014 MundoReader S.L.
> + * Author: Matthias Brugger <[email protected]>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/of_platform.h>
> +#include <linux/irqchip.h>
> +#include <asm/mach/arch.h>
> +#include <asm/mach/map.h>
> +#include <asm/hardware/cache-l2x0.h>
> +
> +static void __init mediatek_dt_init(void)
> +{
> + l2x0_of_init(0, ~0);
> + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> +}
> +
> +static const char * const mediatek_board_dt_compat[] = {
> + "mediatek,mt6589",
> + NULL,
> +};
> +
> +DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
> + .init_machine = mediatek_dt_init,
> + .dt_compat = mediatek_board_dt_compat,
> +MACHINE_END
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi Matthias,
On 09/04/2014 19:45, Matthias Brugger wrote:
> Signed-off-by: Matthias Brugger <[email protected]>
> ---
> arch/arm/Kconfig.debug | 49 +++++++++++++++++++++++++++++++++++--
> arch/arm/include/debug/mediatek.S | 38 ++++++++++++++++++++++++++++
> 2 files changed, 85 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/include/debug/mediatek.S
>
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
> index 4a2fc0b..dc51495 100644
> --- a/arch/arm/Kconfig.debug
> +++ b/arch/arm/Kconfig.debug
> @@ -797,6 +797,38 @@ choice
> Say Y here if you want kernel low-level debugging support
> on Ux500 based platforms.
>
> + config DEBUG_MTK6589_UART0
> + depends on ARCH_MEDIATEK
> + bool "Mediatek mt6589 UART0"
> + select DEBUG_UART_MEDIATEK
> + help
> + Say Y here if you want kernel low-level debugging support
> + on Mediatek mt6589 based platforms.
> +
> + config DEBUG_MTK6589_UART1
> + depends on ARCH_MEDIATEK
> + bool "Mediatek mt6589 UART1"
> + select DEBUG_UART_MEDIATEK
> + help
> + Say Y here if you want kernel low-level debugging support
> + on Mediatek mt6589 based platforms.
> +
> + config DEBUG_MTK6589_UART2
> + depends on ARCH_MEDIATEK
> + bool "Mediatek mt6589 UART2"
> + select DEBUG_UART_MEDIATEK
> + help
> + Say Y here if you want kernel low-level debugging support
> + on Mediatek mt6589 based platforms.
> +
> + config DEBUG_MTK6589_UART3
> + depends on ARCH_MEDIATEK
> + bool "Mediatek mt6589 UART3"
> + select DEBUG_UART_MEDIATEK
> + help
> + Say Y here if you want kernel low-level debugging support
> + on Mediatek mt6589 based platforms.
> +
> config DEBUG_VEXPRESS_UART0_DETECT
> bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
> depends on ARCH_VEXPRESS && CPU_CP15_MMU
> @@ -954,6 +986,10 @@ config DEBUG_MSM_UART
> bool
> depends on ARCH_MSM || ARCH_QCOM
>
> +config DEBUG_UART_MEDIATEK
> + bool
> + depends on ARCH_MEDIATEK
> +
> config DEBUG_LL_INCLUDE
> string
> default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
> @@ -971,6 +1007,7 @@ config DEBUG_LL_INCLUDE
> DEBUG_IMX53_UART ||\
> DEBUG_IMX6Q_UART || \
> DEBUG_IMX6SL_UART
> + default "debug/mediatek.S" if DEBUG_UART_MEDIATEK
> default "debug/msm.S" if DEBUG_MSM_UART
> default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
> default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
> @@ -1043,6 +1080,10 @@ config DEBUG_UART_PHYS
> default 0xd0012000 if DEBUG_MVEBU_UART
> default 0xd4017000 if DEBUG_MMP_UART2
> default 0xd4018000 if DEBUG_MMP_UART3
it seems that this symbol are sorted by address so your symbols
should go just after the line
default 0x101fb000 if DEBUG_NOMADIK_UART
> + default 0x11006000 if DEBUG_MTK6589_UART0
> + default 0x11007000 if DEBUG_MTK6589_UART1
> + default 0x11008000 if DEBUG_MTK6589_UART2
> + default 0x11009000 if DEBUG_MTK6589_UART3
> default 0xe0000000 if ARCH_SPEAR13XX
> default 0xf0000be0 if ARCH_EBSA110
> default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE
> @@ -1058,7 +1099,7 @@ config DEBUG_UART_PHYS
> default 0xfffff700 if ARCH_IOP33X
> depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
> DEBUG_LL_UART_EFM32 || \
> - DEBUG_UART_8250 || DEBUG_UART_PL01X
> + DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_UART_MEDIATEK
>
> config DEBUG_UART_VIRT
> hex "Virtual base address of debug UART"
> @@ -1087,6 +1128,10 @@ config DEBUG_UART_VIRT
> default 0xfe012000 if ARCH_ORION5X
> default 0xfe017000 if DEBUG_MMP_UART2
> default 0xfe018000 if DEBUG_MMP_UART3
> + default 0xF1006000 if DEBUG_MTK6589_UART0
> + default 0xF1007000 if DEBUG_MTK6589_UART1
> + default 0xF1008000 if DEBUG_MTK6589_UART2
> + default 0xF1009000 if DEBUG_MTK6589_UART3
> default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART
> default 0xfe230000 if DEBUG_PICOXCELL_UART
> default 0xfe300000 if DEBUG_BCM_KONA_UART
> @@ -1116,7 +1161,7 @@ config DEBUG_UART_VIRT
> default 0xff003000 if DEBUG_U300_UART
> default DEBUG_UART_PHYS if !MMU
> depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \
> - DEBUG_UART_8250 || DEBUG_UART_PL01X
> + DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_UART_MEDIATEK
>
> config DEBUG_UART_8250_SHIFT
> int "Register offset shift for the 8250 debug UART"
> diff --git a/arch/arm/include/debug/mediatek.S b/arch/arm/include/debug/mediatek.S
> new file mode 100644
> index 0000000..98e8414
> --- /dev/null
> +++ b/arch/arm/include/debug/mediatek.S
> @@ -0,0 +1,38 @@
> +/*
> + * Low-level debug macro for Mediatek SoCs
> + *
> + * Copyright (c) 2014 MundoReader S.L.
> + * Author: Matthias Brugger <[email protected]>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +#include <linux/serial_reg.h>
> +
> + .macro addruart, rp, rv, tmp
> + ldr \rp, =CONFIG_DEBUG_UART_PHYS
> + ldr \rv, =CONFIG_DEBUG_UART_VIRT
> + .endm
> +
> + .macro senduart,rd,rx
> + strb \rd, [\rx, #0x0]
What about using a #define instead of numerical value?
> + .endm
> +
> + .macro waituart,rd,rx
> +1001: ldr \rd, [\rx, #0x14]
ditto
> + tst \rd, #0x40
ditto
> + beq 1001b
> + .endm
> +
> + .macro busyuart,rd,rx
> +1002: ldr \rd, [\rx, #0x14]
ditto
> + tst \rd, #0x40
ditto
> + beq 1002b
> + .endm
>
This file looks very similar to arch/arm/include/debug/pl01x.S,
the only difference is the value of some register offsets.
Should it be possible to make it configurable and then use the
same file?
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi Matthias,
On 09/04/2014 19:45, Matthias Brugger wrote:
> Add binding documentation for the General Porpose Timer driver of
> the Mediatek SoCs.
>
> Signed-off-by: Matthias Brugger <[email protected]>
> ---
> .../bindings/timer/mediatek,mtk-timer.txt | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
>
> diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
> new file mode 100644
> index 0000000..db3c836
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
> @@ -0,0 +1,19 @@
> +Mediatek MT6598, MT6577 and MT6572 Timers
> +---------------------------------------
> +
> +Required properties:
> +- compatible: Should be "mediatek,mtk6589-timer"
> +- reg: Should contain location and length for timers register.
> +- clock-names : Must include the following entries:
> + "sysclk" (13 MHz system clock),
> + "rtcclk" (32 KHz RTC clock).
It would be better to make the clocks mandatory and not their name
Thanks,
Gregory
> +
> +Examples:
> +
> + timer {
> + compatible = "mediatek,mtk6589-timer";
> + reg = <0x10008000 0x80>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&system_clk>, <&rtc-clk>;
> + clock-names = "sysclk", "rtcclk";
> + };
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
On 04/09, Matthias Brugger wrote:
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index 96918e1..bb29321 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -144,6 +144,10 @@ config VF_PIT_TIMER
> config SYS_SUPPORTS_SH_CMT
> bool
>
> +config MTK_TIMER
> + bool
> +
> +
Why two newlines?
> diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
> new file mode 100644
> index 0000000..bf901e3
> --- /dev/null
> +++ b/drivers/clocksource/mtk_timer.c
> @@ -0,0 +1,248 @@
> +
> +#include <linux/clk.h>
> +#include <linux/clockchips.h>
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/irqreturn.h>
> +#include <linux/sched_clock.h>
Were you planning on registering a sched_clock source?
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +
[...]
> +
> +static struct clock_event_device mtk_clockevent = {
> + .name = "mtk_tick",
> + .rating = 300,
> + .shift = 32,
This is unnecessary as it's handled by
clockevents_config_and_register().
> + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
> + .set_mode = mtk_clkevt_mode,
> + .set_next_event = mtk_clkevt_next_event,
> +};
> +
> +
> +static irqreturn_t mtk_timer_interrupt(int irq, void *dev_id)
> +{
> + struct clock_event_device *evt = (struct clock_event_device *)dev_id;
Unnecessary cast from void.
> +
> + /* Acknowledge timer0 irq */
> + writel(GPT_IRQ_ACK(GPT_CLK_EVT), gpt_base + GPT_IRQ_ACK_REG);
> + evt->event_handler(evt);
> +
> + return IRQ_HANDLED;
> +}
> +
[...]
> +
> +static struct irqaction mtk_timer_irq = {
> + .name = "mtk_timer0",
> + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
IRQF_DISABLED is a nop. Remove it.
> + .handler = mtk_timer_interrupt,
> + .dev_id = &mtk_clockevent,
> +};
> +
> +static u32 mtk_timer_sched_read(void)
> +{
> + return readl(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC));
> +}
This is unused unless you register a sched_clock source.
> +
> +static void __init mtk_timer_init(struct device_node *node)
> +{
> + unsigned long rate = 0;
> + struct clk *clk;
> + int ret, irq;
> + u32 val;
> +
> + gpt_base = of_iomap(node, 0);
> + if (!gpt_base)
> + panic("Can't map registers");
> +
> + irq = irq_of_parse_and_map(node, 0);
> + if (irq <= 0)
> + panic("Can't parse IRQ");
> +
> + clk = of_clk_get_by_name(node, "sys_clk");
> + if (IS_ERR(clk))
> + panic("Can't get timer clock");
> + clk_prepare_enable(clk);
> +
> + rate = clk_get_rate(clk);
> +
> + mtk_timer_global_reset();
> +
> + /* Configure clock source */
> + mtk_timer_reset(GPT_CLK_SRC);
> +
> + writel(TIMER_CLK_SRC(TIMER_CLK_SRC_SYS13M) | TIMER_CLK_DIV1,
> + gpt_base + TIMER_CLK_REG(GPT_CLK_SRC));
> +
> + writel(TIMER_CTRL_OP(TIMER_CTRL_OP_FREERUN) | TIMER_CTRL_ENABLE,
> + gpt_base + TIMER_CTRL_REG(GPT_CLK_SRC));
> +
> + clocksource_mmio_init(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), node->name,
> + rate, 300, 32, clocksource_mmio_readl_up);
> +
> + ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
> +
> + /* Configure clock event */
> + mtk_timer_reset(GPT_CLK_EVT);
> +
> + writel(TIMER_CLK_SRC(TIMER_CLK_SRC_SYS13M) | TIMER_CLK_DIV1,
> + gpt_base + TIMER_CLK_REG(GPT_CLK_EVT));
> + writel(0, gpt_base + TIMER_CMP_REG(GPT_CLK_EVT));
> +
> + writel(TIMER_CTRL_OP(TIMER_CTRL_OP_REPEAT) | TIMER_CTRL_ENABLE,
> + gpt_base + TIMER_CTRL_REG(GPT_CLK_EVT));
> +
> + ret = setup_irq(irq, &mtk_timer_irq);
Most clocksource drivers use request_irq() nowadays. Can you use
that?
> + if (ret)
> + pr_warn("failed to setup irq %d\n", irq);
> +
> + /* Enable timer0 interrupt */
> + val = readl(gpt_base + GPT_IRQ_EN_REG);
> + writel(val | GPT_IRQ_ENABLE(GPT_CLK_EVT), gpt_base + GPT_IRQ_EN_REG);
> +
> + mtk_clockevent.cpumask = cpumask_of(0);
Is it possible for this timer to be used on SMP hardware? If so,
this should probably be cpu_all_mask. Please assign the .irq
member here as well.
> +
> + clockevents_config_and_register(&mtk_clockevent, rate, 0x3,
> + 0xffffffff);
> +}
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
Hi Matthias,
On 09/04/2014 19:45, Matthias Brugger wrote:
> This patch adds a clock source and clock event for the timer found
> on the Mediatek SoCs.
>
> The Mediatek General Porpose Timer block provides five 32 bit timers and
> one 64 bit timer.
>
> Two 32 bit timers are used:
> TIMER1: clock events supporting periodic and oneshot events
> TIMER2: clock source configured as a free running counter
>
> The General Porpose Timer block can be run with two clocks. A 13 MHz system
> clock and the RTC clock running at 32 KHz. This implementation uses the system
> clock.
>
> Signed-off-by: Matthias Brugger <[email protected]>
> ---
> drivers/clocksource/Kconfig | 4 +
> drivers/clocksource/Makefile | 1 +
> drivers/clocksource/mtk_timer.c | 248 +++++++++++++++++++++++++++++++++++++++
> 3 files changed, 253 insertions(+)
> create mode 100644 drivers/clocksource/mtk_timer.c
>
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index 96918e1..bb29321 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -144,6 +144,10 @@ config VF_PIT_TIMER
> config SYS_SUPPORTS_SH_CMT
> bool
>
> +config MTK_TIMER
> + bool
> +
> +
> config SYS_SUPPORTS_SH_MTU2
> bool
>
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index 98cb6c5..619d302 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -33,6 +33,7 @@ obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o
> obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o
> obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o
> obj-$(CONFIG_CLKSRC_QCOM) += qcom-timer.o
> +obj-$(CONFIG_MTK_TIMER) += mtk_timer.o
>
> obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
> obj-$(CONFIG_ARM_GLOBAL_TIMER) += arm_global_timer.o
> diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
> new file mode 100644
> index 0000000..bf901e3
> --- /dev/null
> +++ b/drivers/clocksource/mtk_timer.c
> @@ -0,0 +1,248 @@
> +/*
> + * Mediatek SoCs General-Purpose Timer handling.
> + *
> + * Copyright (C) 2014 Matthias Brugger
> + *
> + * Matthias Brugger <[email protected]>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clockchips.h>
> +#include <linux/interrupt.h>
> +#include <linux/irq.h>
> +#include <linux/irqreturn.h>
> +#include <linux/sched_clock.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +
> +#define GPT_IRQ_EN_REG 0x00
> +#define GPT_IRQ_ENABLE(val) BIT(val-1)
> +#define GPT_IRQ_ST_REG 0x04
> +#define GPT_IRQ_ACK_REG 0x08
> +#define GPT_IRQ_ACK(val) BIT(val-1)
> +
> +#define TIMER_CTRL_REG(val) (0x10 * val)
> +#define TIMER_CTRL_OP(val) (((val) & 0x3) << 4)
> +#define TIMER_CTRL_OP_ONESHOT (0)
> +#define TIMER_CTRL_OP_REPEAT (1)
> +#define TIMER_CTRL_OP_KEEPGO (2)
> +#define TIMER_CTRL_OP_FREERUN (3)
> +#define TIMER_CTRL_CLEAR (2)
> +#define TIMER_CTRL_ENABLE (1)
> +#define TIMER_CTRL_DISABLE (0)
> +
> +#define TIMER_CLK_REG(val) (0x04 + (0x10 * val))
> +#define TIMER_CLK_SRC(val) (((val) & 0x1) << 4)
> +#define TIMER_CLK_SRC_SYS13M (0)
> +#define TIMER_CLK_SRC_RTC32K (1)
> +#define TIMER_CLK_DIV1 (0x0)
> +#define TIMER_CLK_DIV2 (0x1)
> +#define TIMER_CLK_DIV3 (0x2)
> +#define TIMER_CLK_DIV4 (0x3)
> +#define TIMER_CLK_DIV5 (0x4)
> +#define TIMER_CLK_DIV6 (0x5)
> +#define TIMER_CLK_DIV7 (0x6)
> +#define TIMER_CLK_DIV8 (0x7)
> +#define TIMER_CLK_DIV9 (0x8)
> +#define TIMER_CLK_DIV10 (0x9)
> +#define TIMER_CLK_DIV11 (0xA)
> +#define TIMER_CLK_DIV12 (0xB)
> +#define TIMER_CLK_DIV13 (0xC)
> +#define TIMER_CLK_DIV16 (0xD)
> +#define TIMER_CLK_DIV32 (0xE)
> +#define TIMER_CLK_DIV64 (0xF)
> +
> +#define TIMER_CNT_REG(val) (0x08 + (0x10 * val))
> +#define TIMER_CMP_REG(val) (0x0C + (0x10 * val))
> +
> +#define GPT_CLK_EVT 1
> +#define GPT_CLK_SRC 2
> +
> +static void __iomem *gpt_base;
> +static u32 ticks_per_jiffy;
> +
> +static void mtk_clkevt_time_stop(u8 timer)
> +{
> + u32 val = readl(gpt_base + TIMER_CTRL_REG(timer));
> + writel(val & ~TIMER_CTRL_ENABLE, gpt_base + TIMER_CTRL_REG(timer));
> +}
> +
> +static void mtk_clkevt_time_setup(unsigned long delay, u8 timer)
> +{
> + writel(delay, gpt_base + TIMER_CMP_REG(timer));
> +}
> +
> +static void mtk_clkevt_time_start(bool periodic, u8 timer)
> +{
> + u32 val;
> +
> + /* Acknowledge interrupt */
> + writel(GPT_IRQ_ACK(timer), gpt_base + GPT_IRQ_ACK_REG);
> +
> + val = readl(gpt_base + TIMER_CTRL_REG(timer));
> +
> + /* Clear 2 bit timer operation mode field */
> + val &= ~TIMER_CTRL_OP(0x3);
> +
> + if (periodic)
> + val |= TIMER_CTRL_OP(TIMER_CTRL_OP_REPEAT);
> + else
> + val |= TIMER_CTRL_OP(TIMER_CTRL_OP_ONESHOT);
> +
> + writel(val | TIMER_CTRL_ENABLE | TIMER_CTRL_CLEAR,
> + gpt_base + TIMER_CTRL_REG(timer));
> +}
> +
> +static void mtk_clkevt_mode(enum clock_event_mode mode,
> + struct clock_event_device *clk)
> +{
> + mtk_clkevt_time_stop(GPT_CLK_EVT);
> +
> + switch (mode) {
> + case CLOCK_EVT_MODE_PERIODIC:
> + mtk_clkevt_time_setup(ticks_per_jiffy, GPT_CLK_EVT);
> + mtk_clkevt_time_start(true, GPT_CLK_EVT);
> + break;
> + case CLOCK_EVT_MODE_ONESHOT:
> + mtk_clkevt_time_start(false, GPT_CLK_EVT);
> + break;
> + case CLOCK_EVT_MODE_UNUSED:
> + case CLOCK_EVT_MODE_SHUTDOWN:
> + default:
> + /* No more interrupts will occur as source is disabled */
> + break;
> + }
> +}
> +
> +static int mtk_clkevt_next_event(unsigned long evt,
> + struct clock_event_device *unused)
> +{
> + mtk_clkevt_time_stop(GPT_CLK_EVT);
> + mtk_clkevt_time_setup(evt, GPT_CLK_EVT);
> + mtk_clkevt_time_start(false, GPT_CLK_EVT);
> +
> + return 0;
> +}
> +
> +static struct clock_event_device mtk_clockevent = {
> + .name = "mtk_tick",
> + .rating = 300,
> + .shift = 32,
> + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
> + .set_mode = mtk_clkevt_mode,
> + .set_next_event = mtk_clkevt_next_event,
> +};
> +
> +
> +static irqreturn_t mtk_timer_interrupt(int irq, void *dev_id)
> +{
> + struct clock_event_device *evt = (struct clock_event_device *)dev_id;
> +
> + /* Acknowledge timer0 irq */
> + writel(GPT_IRQ_ACK(GPT_CLK_EVT), gpt_base + GPT_IRQ_ACK_REG);
> + evt->event_handler(evt);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static void mtk_timer_global_reset(void)
> +{
> + /* Disable all interrupts */
> + writel(0x0, gpt_base + GPT_IRQ_EN_REG);
> + /* Acknowledge all interrupts */
> + writel(0x3f, gpt_base + GPT_IRQ_ACK_REG);
> +}
> +
> +static void mtk_timer_reset(u8 timer)
> +{
> + writel(TIMER_CTRL_CLEAR | TIMER_CTRL_DISABLE,
> + gpt_base + TIMER_CTRL_REG(timer));
> + writel(0x0, gpt_base + TIMER_CMP_REG(timer));
> +}
> +
> +static struct irqaction mtk_timer_irq = {
> + .name = "mtk_timer0",
> + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
> + .handler = mtk_timer_interrupt,
> + .dev_id = &mtk_clockevent,
> +};
> +
> +static u32 mtk_timer_sched_read(void)
> +{
> + return readl(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC));
> +}
> +
> +static void __init mtk_timer_init(struct device_node *node)
> +{
> + unsigned long rate = 0;
> + struct clk *clk;
> + int ret, irq;
> + u32 val;
> +
> + gpt_base = of_iomap(node, 0);
What about using of_address_to_resource()? Then you will be
able to use request_mem_region() before calling ioremap().
> + if (!gpt_base)
> + panic("Can't map registers");
> +
> + irq = irq_of_parse_and_map(node, 0);
> + if (irq <= 0)
> + panic("Can't parse IRQ");
> +
> + clk = of_clk_get_by_name(node, "sys_clk");
We try to avoid to used named clock. You should use
of_clk_get(np, 0) here.
Thanks,
Gregory
> + if (IS_ERR(clk))
> + panic("Can't get timer clock");
> + clk_prepare_enable(clk);
> +
> + rate = clk_get_rate(clk);
> +
> + mtk_timer_global_reset();
> +
> + /* Configure clock source */
> + mtk_timer_reset(GPT_CLK_SRC);
> +
> + writel(TIMER_CLK_SRC(TIMER_CLK_SRC_SYS13M) | TIMER_CLK_DIV1,
> + gpt_base + TIMER_CLK_REG(GPT_CLK_SRC));
> +
> + writel(TIMER_CTRL_OP(TIMER_CTRL_OP_FREERUN) | TIMER_CTRL_ENABLE,
> + gpt_base + TIMER_CTRL_REG(GPT_CLK_SRC));
> +
> + clocksource_mmio_init(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), node->name,
> + rate, 300, 32, clocksource_mmio_readl_up);
> +
> + ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
> +
> + /* Configure clock event */
> + mtk_timer_reset(GPT_CLK_EVT);
> +
> + writel(TIMER_CLK_SRC(TIMER_CLK_SRC_SYS13M) | TIMER_CLK_DIV1,
> + gpt_base + TIMER_CLK_REG(GPT_CLK_EVT));
> + writel(0, gpt_base + TIMER_CMP_REG(GPT_CLK_EVT));
> +
> + writel(TIMER_CTRL_OP(TIMER_CTRL_OP_REPEAT) | TIMER_CTRL_ENABLE,
> + gpt_base + TIMER_CTRL_REG(GPT_CLK_EVT));
> +
> + ret = setup_irq(irq, &mtk_timer_irq);
> + if (ret)
> + pr_warn("failed to setup irq %d\n", irq);
> +
> + /* Enable timer0 interrupt */
> + val = readl(gpt_base + GPT_IRQ_EN_REG);
> + writel(val | GPT_IRQ_ENABLE(GPT_CLK_EVT), gpt_base + GPT_IRQ_EN_REG);
> +
> + mtk_clockevent.cpumask = cpumask_of(0);
> +
> + clockevents_config_and_register(&mtk_clockevent, rate, 0x3,
> + 0xffffffff);
> +}
> +CLOCKSOURCE_OF_DECLARE(mtk_mt6589, "mediatek,mtk6589-timer", mtk_timer_init);
> +
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
On Wed, Apr 9, 2014 at 2:45 PM, Matthias Brugger <[email protected]> wrote:
> Signed-off-by: Matthias Brugger <[email protected]>
> ---
> arch/arm/Kconfig.debug | 49 +++++++++++++++++++++++++++++++++++--
> arch/arm/include/debug/mediatek.S | 38 ++++++++++++++++++++++++++++
> 2 files changed, 85 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/include/debug/mediatek.S
>
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
> index 4a2fc0b..dc51495 100644
> --- a/arch/arm/Kconfig.debug
> +++ b/arch/arm/Kconfig.debug
> @@ -797,6 +797,38 @@ choice
> Say Y here if you want kernel low-level debugging support
> on Ux500 based platforms.
>
> + config DEBUG_MTK6589_UART0
> + depends on ARCH_MEDIATEK
> + bool "Mediatek mt6589 UART0"
> + select DEBUG_UART_MEDIATEK
> + help
> + Say Y here if you want kernel low-level debugging support
> + on Mediatek mt6589 based platforms.
> +
> + config DEBUG_MTK6589_UART1
> + depends on ARCH_MEDIATEK
> + bool "Mediatek mt6589 UART1"
> + select DEBUG_UART_MEDIATEK
> + help
> + Say Y here if you want kernel low-level debugging support
> + on Mediatek mt6589 based platforms.
> +
> + config DEBUG_MTK6589_UART2
> + depends on ARCH_MEDIATEK
> + bool "Mediatek mt6589 UART2"
> + select DEBUG_UART_MEDIATEK
> + help
> + Say Y here if you want kernel low-level debugging support
> + on Mediatek mt6589 based platforms.
> +
> + config DEBUG_MTK6589_UART3
> + depends on ARCH_MEDIATEK
> + bool "Mediatek mt6589 UART3"
> + select DEBUG_UART_MEDIATEK
> + help
> + Say Y here if you want kernel low-level debugging support
> + on Mediatek mt6589 based platforms.
> +
Do you really need all uarts defined? Only define what you have boards using.
Also, you have no uarts defined in your dts. Please add them there
(and any necessary serial driver) before adding debug functionality.
Otherwise, you can't actually boot a multi-platform kernel with this
series.
On Wed, Apr 9, 2014 at 2:45 PM, Matthias Brugger <[email protected]> wrote:
> This adds a generic devicetree board file and a dtsi for boards
> based on the MT6589 SoCs from Mediatek.
>
> Apart from the generic parts (gic, clocks) the only component
> currently supported are the timers.
>
> Signed-off-by: Matthias Brugger <[email protected]>
> ---
> .../devicetree/bindings/vendor-prefixes.txt | 1 +
> arch/arm/Kconfig | 2 +
> arch/arm/Makefile | 1 +
> arch/arm/boot/dts/mtk6589.dtsi | 105 ++++++++++++++++++++
Please add an actual board so your dts file can actually be built.
> arch/arm/mach-mediatek/Kconfig | 14 +++
> arch/arm/mach-mediatek/Makefile | 1 +
> arch/arm/mach-mediatek/mediatek.c | 40 ++++++++
> 7 files changed, 164 insertions(+)
> create mode 100644 arch/arm/boot/dts/mtk6589.dtsi
> create mode 100644 arch/arm/mach-mediatek/Kconfig
> create mode 100644 arch/arm/mach-mediatek/Makefile
> create mode 100644 arch/arm/mach-mediatek/mediatek.c
>
> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
> index 0f01c9b..af48801 100644
> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
> @@ -67,6 +67,7 @@ linux Linux-specific binding
> lsi LSI Corp. (LSI Logic)
> marvell Marvell Technology Group Ltd.
> maxim Maxim Integrated Products
> +mediatek MediaTek Inc.
> microchip Microchip Technology Inc.
> mosaixtech Mosaix Technologies, Inc.
> moxa Moxa
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 5db05f6a..04d46ec 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -995,6 +995,8 @@ source "arch/arm/mach-mv78xx0/Kconfig"
>
> source "arch/arm/mach-imx/Kconfig"
>
> +source "arch/arm/mach-mediatek/Kconfig"
> +
> source "arch/arm/mach-mxs/Kconfig"
>
> source "arch/arm/mach-netx/Kconfig"
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 41c1931..8ce9774 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -170,6 +170,7 @@ machine-$(CONFIG_ARCH_MSM) += msm
> machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0
> machine-$(CONFIG_ARCH_MVEBU) += mvebu
> machine-$(CONFIG_ARCH_MXC) += imx
> +machine-$(CONFIG_ARCH_MEDIATEK) += mediatek
> machine-$(CONFIG_ARCH_MXS) += mxs
> machine-$(CONFIG_ARCH_NETX) += netx
> machine-$(CONFIG_ARCH_NOMADIK) += nomadik
> diff --git a/arch/arm/boot/dts/mtk6589.dtsi b/arch/arm/boot/dts/mtk6589.dtsi
> new file mode 100644
> index 0000000..6dbb74f
> --- /dev/null
> +++ b/arch/arm/boot/dts/mtk6589.dtsi
> @@ -0,0 +1,105 @@
> +/*
> + * Copyright (c) 2014 MundoReader S.L.
> + * Author: Matthias Brugger <[email protected]>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include "skeleton.dtsi"
> +
> +/ {
> + compatible = "mediatek,mt6589";
Please document this compatible property.
> + interrupt-parent = <&gic>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + next-level-cache = <&L2>;
> + reg = <0x0>;
> + };
> + cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + next-level-cache = <&L2>;
> + reg = <0x1>;
> + };
> + cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + next-level-cache = <&L2>;
> + reg = <0x2>;
> + };
> + cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a7";
> + next-level-cache = <&L2>;
> + reg = <0x3>;
> + };
> +
> + };
> +
> + clocks {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + system_clk: system_clk {
> + compatible = "fixed-clock";
> + clock-frequency = <13000000>;
> + #clock-cells = <0>;
> + clock-output-names = "system_clk";
> + };
> +
> + rtc_clk: rtc_clk {
> + compatible = "fixed-clock";
> + clock-frequency = <32000>;
> + #clock-cells = <0>;
> + clock-output-names = "rtc_clk";
> + };
> + };
> +
> + soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "simple-bus";
> + clock-ranges;
> + ranges;
> +
> + gic: interrupt-controller@10212000 {
> + compatible = "arm,cortex-a9-gic";
A7 is GICv2. You are missing the various virtualization extension properties.
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + reg = <0x10211000 0x1000>,
> + <0x10212000 0x1000>;
> + };
> +
> + L2: l2-cache-controller@1020e000 {
> + compatible = "arm,pl310-cache";
Really? An A7 normally has a built-in L2, not a PL310.
> + reg = <0x1020e000 0x1000>;
> + cache-unified;
> + cache-level = <2>;
> + };
> +
> + timer: timer@10008000 {
> + compatible = "mediatek,mtk6589-timer";
> + reg = <0x10008000 0x80>;
> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&system_clk>, <&rtc_clk>;
> + clock-names = "sys_clk", "rtc_clk";
> + };
> + };
> +};
> diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
> new file mode 100644
> index 0000000..c0139ca
> --- /dev/null
> +++ b/arch/arm/mach-mediatek/Kconfig
> @@ -0,0 +1,14 @@
> +config ARCH_MEDIATEK
> + bool "Mediatek MT6589 SoC" if ARCH_MULTI_V7
> + select ARCH_REQUIRE_GPIOLIB
Then where is your GPIO driver?
> + select ARM_GIC
> + select CACHE_L2X0
> + select HAVE_ARM_TWD if LOCAL_TIMERS
> + select HAVE_SMP
Not needed now (going into 3.15).
> + select LOCAL_TIMERS if SMP
> + select COMMON_CLK
ditto
> + select GENERIC_CLOCKEVENTS
ditto
> + select MTK_TIMER
> + select CLKSRC_MMIO
This belongs with your timer kconfig
Hi,
On Wed, Apr 9, 2014 at 12:45 PM, Matthias Brugger
<[email protected]> wrote:
> This patch adds a clock source and clock event for the timer found
> on the Mediatek SoCs.
>
> The Mediatek General Porpose Timer block provides five 32 bit timers and
> one 64 bit timer.
>
> Two 32 bit timers are used:
> TIMER1: clock events supporting periodic and oneshot events
> TIMER2: clock source configured as a free running counter
>
> The General Porpose Timer block can be run with two clocks. A 13 MHz system
> clock and the RTC clock running at 32 KHz. This implementation uses the system
> clock.
Hm, are you planning on using these on the Cortex-A7-based and newer
SoCs? On those, the arm generic timers should be available, and you
might be better off just using those there.
Of course, you'll still need these for the A9-based platforms, so the
driver might very well be needed anyway. Some of the earlier patches
seem to be for A7-based systems so I'm not sure what you're primarily
working on here. :)
-Olof
On Wednesday 09 April 2014 21:45:35 Matthias Brugger wrote:
> This adds a generic devicetree board file and a dtsi for boards
> based on the MT6589 SoCs from Mediatek.
>
> Apart from the generic parts (gic, clocks) the only component
> currently supported are the timers.
>
> Signed-off-by: Matthias Brugger <[email protected]>
Hi Matthias,
First of all, I'm really glad to see this get started, thanks for looking
into these!
Do you know how similar the MT6589 is to the later chips like MT65x2
and MT6588? What are the on-chip devices like, is it mostly licensed
IP blocks from designware and others that we already have drivers for,
or all new drivers?
> +#include <asm/hardware/cache-l2x0.h>
> +
> +static void __init mediatek_dt_init(void)
> +{
> + l2x0_of_init(0, ~0);
> + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> +}
I hope that with all the cleanup work that Russell has done in the
past few weeks, we can manage to kill off the call to l2x0_of_init()
here and have it done by core architecture code instead. That would
let you have an empty machine file, unless you have other things you
will need to add in the future.
Arnd
2014-04-09 23:39 GMT+02:00 Rob Herring <[email protected]>:
> On Wed, Apr 9, 2014 at 2:45 PM, Matthias Brugger <[email protected]> wrote:
>> Signed-off-by: Matthias Brugger <[email protected]>
>> ---
>> arch/arm/Kconfig.debug | 49 +++++++++++++++++++++++++++++++++++--
>> arch/arm/include/debug/mediatek.S | 38 ++++++++++++++++++++++++++++
>> 2 files changed, 85 insertions(+), 2 deletions(-)
>> create mode 100644 arch/arm/include/debug/mediatek.S
>>
>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
>> index 4a2fc0b..dc51495 100644
>> --- a/arch/arm/Kconfig.debug
>> +++ b/arch/arm/Kconfig.debug
>> @@ -797,6 +797,38 @@ choice
>> Say Y here if you want kernel low-level debugging support
>> on Ux500 based platforms.
>>
>> + config DEBUG_MTK6589_UART0
>> + depends on ARCH_MEDIATEK
>> + bool "Mediatek mt6589 UART0"
>> + select DEBUG_UART_MEDIATEK
>> + help
>> + Say Y here if you want kernel low-level debugging support
>> + on Mediatek mt6589 based platforms.
>> +
>> + config DEBUG_MTK6589_UART1
>> + depends on ARCH_MEDIATEK
>> + bool "Mediatek mt6589 UART1"
>> + select DEBUG_UART_MEDIATEK
>> + help
>> + Say Y here if you want kernel low-level debugging support
>> + on Mediatek mt6589 based platforms.
>> +
>> + config DEBUG_MTK6589_UART2
>> + depends on ARCH_MEDIATEK
>> + bool "Mediatek mt6589 UART2"
>> + select DEBUG_UART_MEDIATEK
>> + help
>> + Say Y here if you want kernel low-level debugging support
>> + on Mediatek mt6589 based platforms.
>> +
>> + config DEBUG_MTK6589_UART3
>> + depends on ARCH_MEDIATEK
>> + bool "Mediatek mt6589 UART3"
>> + select DEBUG_UART_MEDIATEK
>> + help
>> + Say Y here if you want kernel low-level debugging support
>> + on Mediatek mt6589 based platforms.
>> +
>
> Do you really need all uarts defined? Only define what you have boards using.
>
> Also, you have no uarts defined in your dts. Please add them there
> (and any necessary serial driver) before adding debug functionality.
> Otherwise, you can't actually boot a multi-platform kernel with this
> series.
Up to now, there no serial driver exists. Should I skip this patch and
re-submit it when the serial driver is integrated?
--
motzblog.wordpress.com
2014-04-09 22:26 GMT+02:00 Gregory CLEMENT <[email protected]>:
> Hi Matthias,
>
> On 09/04/2014 19:45, Matthias Brugger wrote:
>> This adds a generic devicetree board file and a dtsi for boards
>> based on the MT6589 SoCs from Mediatek.
>>
>> Apart from the generic parts (gic, clocks) the only component
>> currently supported are the timers.
>>
>> Signed-off-by: Matthias Brugger <[email protected]>
>> ---
>> .../devicetree/bindings/vendor-prefixes.txt | 1 +
>> arch/arm/Kconfig | 2 +
>> arch/arm/Makefile | 1 +
>> arch/arm/boot/dts/mtk6589.dtsi | 105 ++++++++++++++++++++
>> arch/arm/mach-mediatek/Kconfig | 14 +++
>> arch/arm/mach-mediatek/Makefile | 1 +
>> arch/arm/mach-mediatek/mediatek.c | 40 ++++++++
>> 7 files changed, 164 insertions(+)
>> create mode 100644 arch/arm/boot/dts/mtk6589.dtsi
>> create mode 100644 arch/arm/mach-mediatek/Kconfig
>> create mode 100644 arch/arm/mach-mediatek/Makefile
>> create mode 100644 arch/arm/mach-mediatek/mediatek.c
>>
>> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
>> index 0f01c9b..af48801 100644
>> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
>> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
>> @@ -67,6 +67,7 @@ linux Linux-specific binding
>> lsi LSI Corp. (LSI Logic)
>> marvell Marvell Technology Group Ltd.
>> maxim Maxim Integrated Products
>> +mediatek MediaTek Inc.
>> microchip Microchip Technology Inc.
>> mosaixtech Mosaix Technologies, Inc.
>> moxa Moxa
>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>> index 5db05f6a..04d46ec 100644
>> --- a/arch/arm/Kconfig
>> +++ b/arch/arm/Kconfig
>> @@ -995,6 +995,8 @@ source "arch/arm/mach-mv78xx0/Kconfig"
>>
>> source "arch/arm/mach-imx/Kconfig"
>>
>> +source "arch/arm/mach-mediatek/Kconfig"
>> +
>> source "arch/arm/mach-mxs/Kconfig"
>>
>> source "arch/arm/mach-netx/Kconfig"
>> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
>> index 41c1931..8ce9774 100644
>> --- a/arch/arm/Makefile
>> +++ b/arch/arm/Makefile
>> @@ -170,6 +170,7 @@ machine-$(CONFIG_ARCH_MSM) += msm
>> machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0
>> machine-$(CONFIG_ARCH_MVEBU) += mvebu
>> machine-$(CONFIG_ARCH_MXC) += imx
>> +machine-$(CONFIG_ARCH_MEDIATEK) += mediatek
>> machine-$(CONFIG_ARCH_MXS) += mxs
>> machine-$(CONFIG_ARCH_NETX) += netx
>> machine-$(CONFIG_ARCH_NOMADIK) += nomadik
>> diff --git a/arch/arm/boot/dts/mtk6589.dtsi b/arch/arm/boot/dts/mtk6589.dtsi
>> new file mode 100644
>> index 0000000..6dbb74f
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/mtk6589.dtsi
>> @@ -0,0 +1,105 @@
>> +/*
>> + * Copyright (c) 2014 MundoReader S.L.
>> + * Author: Matthias Brugger <[email protected]>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include "skeleton.dtsi"
>> +
>> +/ {
>> + compatible = "mediatek,mt6589";
>> + interrupt-parent = <&gic>;
>> +
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + cpu@0 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a7";
>> + next-level-cache = <&L2>;
>> + reg = <0x0>;
>> + };
>> + cpu@1 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a7";
>> + next-level-cache = <&L2>;
>> + reg = <0x1>;
>> + };
>> + cpu@2 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a7";
>> + next-level-cache = <&L2>;
>> + reg = <0x2>;
>> + };
>> + cpu@3 {
>> + device_type = "cpu";
>> + compatible = "arm,cortex-a7";
>> + next-level-cache = <&L2>;
>> + reg = <0x3>;
>> + };
>> +
>> + };
>> +
>> + clocks {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + ranges;
>> +
>> + system_clk: system_clk {
>> + compatible = "fixed-clock";
>> + clock-frequency = <13000000>;
>> + #clock-cells = <0>;
>> + clock-output-names = "system_clk";
>> + };
>
> Is it really a fixed clock without any parent, or do you
> declare it as a fixed clock because you don't have any clock
> common framework support yet?
I don't have any common clock framework support yet.
>
>> +
>> + rtc_clk: rtc_clk {
>> + compatible = "fixed-clock";
>> + clock-frequency = <32000>;
>> + #clock-cells = <0>;
>> + clock-output-names = "rtc_clk";
>> + };
>> + };
>> +
>> + soc {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "simple-bus";
>> + clock-ranges;
>> + ranges;
>> +
>> + gic: interrupt-controller@10212000 {
>> + compatible = "arm,cortex-a9-gic";
>> + interrupt-controller;
>> + #interrupt-cells = <3>;
>> + reg = <0x10211000 0x1000>,
>> + <0x10212000 0x1000>;
>> + };
>> +
>> + L2: l2-cache-controller@1020e000 {
>> + compatible = "arm,pl310-cache";
>> + reg = <0x1020e000 0x1000>;
>> + cache-unified;
>> + cache-level = <2>;
>> + };
>> +
>> + timer: timer@10008000 {
>> + compatible = "mediatek,mtk6589-timer";
>> + reg = <0x10008000 0x80>;
>> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
>> + clocks = <&system_clk>, <&rtc_clk>;
>> + clock-names = "sys_clk", "rtc_clk";
>> + };
>> + };
>> +};
>> diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
>> new file mode 100644
>> index 0000000..c0139ca
>> --- /dev/null
>> +++ b/arch/arm/mach-mediatek/Kconfig
>> @@ -0,0 +1,14 @@
>> +config ARCH_MEDIATEK
>> + bool "Mediatek MT6589 SoC" if ARCH_MULTI_V7
>> + select ARCH_REQUIRE_GPIOLIB
>> + select ARM_GIC
>> + select CACHE_L2X0
>> + select HAVE_ARM_TWD if LOCAL_TIMERS
>
> LOCAL_TIMERS no longer exist
>
>> + select HAVE_SMP
>> + select LOCAL_TIMERS if SMP
> ditto
>
> so what about this instead:
>
> select HAVE_ARM_TWD if SMP
>
>
> The rest of this patch looks good.
>
> Thanks,
>
> Gregory
>
>> + select COMMON_CLK
>> + select GENERIC_CLOCKEVENTS
>> + select MTK_TIMER
>> + select CLKSRC_MMIO
>> + help
>> + Support for Mediatek Cortex-A7 Quad-Core-SoC MT6589.
>> diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
>> new file mode 100644
>> index 0000000..43e619f
>> --- /dev/null
>> +++ b/arch/arm/mach-mediatek/Makefile
>> @@ -0,0 +1 @@
>> +obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
>> diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
>> new file mode 100644
>> index 0000000..f630403
>> --- /dev/null
>> +++ b/arch/arm/mach-mediatek/mediatek.c
>> @@ -0,0 +1,40 @@
>> +/*
>> + * Device Tree support for Mediatek SoCs
>> + *
>> + * Copyright (c) 2014 MundoReader S.L.
>> + * Author: Matthias Brugger <[email protected]>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include <linux/kernel.h>
>> +#include <linux/init.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/irqchip.h>
>> +#include <asm/mach/arch.h>
>> +#include <asm/mach/map.h>
>> +#include <asm/hardware/cache-l2x0.h>
>> +
>> +static void __init mediatek_dt_init(void)
>> +{
>> + l2x0_of_init(0, ~0);
>> + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
>> +}
>> +
>> +static const char * const mediatek_board_dt_compat[] = {
>> + "mediatek,mt6589",
>> + NULL,
>> +};
>> +
>> +DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
>> + .init_machine = mediatek_dt_init,
>> + .dt_compat = mediatek_board_dt_compat,
>> +MACHINE_END
>>
>
>
> --
> Gregory Clement, Free Electrons
> Kernel, drivers, real-time and embedded Linux
> development, consulting, training and support.
> http://free-electrons.com
--
motzblog.wordpress.com
On 10/04/2014 08:29, Matthias Brugger wrote:
> 2014-04-09 22:26 GMT+02:00 Gregory CLEMENT <[email protected]>:
>> Hi Matthias,
>>
>> On 09/04/2014 19:45, Matthias Brugger wrote:
>>> This adds a generic devicetree board file and a dtsi for boards
>>> based on the MT6589 SoCs from Mediatek.
>>>
>>> Apart from the generic parts (gic, clocks) the only component
>>> currently supported are the timers.
>>>
>>> Signed-off-by: Matthias Brugger <[email protected]>
>>> ---
>>> .../devicetree/bindings/vendor-prefixes.txt | 1 +
>>> arch/arm/Kconfig | 2 +
>>> arch/arm/Makefile | 1 +
>>> arch/arm/boot/dts/mtk6589.dtsi | 105 ++++++++++++++++++++
>>> arch/arm/mach-mediatek/Kconfig | 14 +++
>>> arch/arm/mach-mediatek/Makefile | 1 +
>>> arch/arm/mach-mediatek/mediatek.c | 40 ++++++++
>>> 7 files changed, 164 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/mtk6589.dtsi
>>> create mode 100644 arch/arm/mach-mediatek/Kconfig
>>> create mode 100644 arch/arm/mach-mediatek/Makefile
>>> create mode 100644 arch/arm/mach-mediatek/mediatek.c
>>>
>>> diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
>>> index 0f01c9b..af48801 100644
>>> --- a/Documentation/devicetree/bindings/vendor-prefixes.txt
>>> +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
>>> @@ -67,6 +67,7 @@ linux Linux-specific binding
>>> lsi LSI Corp. (LSI Logic)
>>> marvell Marvell Technology Group Ltd.
>>> maxim Maxim Integrated Products
>>> +mediatek MediaTek Inc.
>>> microchip Microchip Technology Inc.
>>> mosaixtech Mosaix Technologies, Inc.
>>> moxa Moxa
>>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>>> index 5db05f6a..04d46ec 100644
>>> --- a/arch/arm/Kconfig
>>> +++ b/arch/arm/Kconfig
>>> @@ -995,6 +995,8 @@ source "arch/arm/mach-mv78xx0/Kconfig"
>>>
>>> source "arch/arm/mach-imx/Kconfig"
>>>
>>> +source "arch/arm/mach-mediatek/Kconfig"
>>> +
>>> source "arch/arm/mach-mxs/Kconfig"
>>>
>>> source "arch/arm/mach-netx/Kconfig"
>>> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
>>> index 41c1931..8ce9774 100644
>>> --- a/arch/arm/Makefile
>>> +++ b/arch/arm/Makefile
>>> @@ -170,6 +170,7 @@ machine-$(CONFIG_ARCH_MSM) += msm
>>> machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0
>>> machine-$(CONFIG_ARCH_MVEBU) += mvebu
>>> machine-$(CONFIG_ARCH_MXC) += imx
>>> +machine-$(CONFIG_ARCH_MEDIATEK) += mediatek
>>> machine-$(CONFIG_ARCH_MXS) += mxs
>>> machine-$(CONFIG_ARCH_NETX) += netx
>>> machine-$(CONFIG_ARCH_NOMADIK) += nomadik
>>> diff --git a/arch/arm/boot/dts/mtk6589.dtsi b/arch/arm/boot/dts/mtk6589.dtsi
>>> new file mode 100644
>>> index 0000000..6dbb74f
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/mtk6589.dtsi
>>> @@ -0,0 +1,105 @@
>>> +/*
>>> + * Copyright (c) 2014 MundoReader S.L.
>>> + * Author: Matthias Brugger <[email protected]>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License as published by
>>> + * the Free Software Foundation; either version 2 of the License, or
>>> + * (at your option) any later version.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> + * GNU General Public License for more details.
>>> + */
>>> +
>>> +#include <dt-bindings/interrupt-controller/irq.h>
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +#include "skeleton.dtsi"
>>> +
>>> +/ {
>>> + compatible = "mediatek,mt6589";
>>> + interrupt-parent = <&gic>;
>>> +
>>> + cpus {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + cpu@0 {
>>> + device_type = "cpu";
>>> + compatible = "arm,cortex-a7";
>>> + next-level-cache = <&L2>;
>>> + reg = <0x0>;
>>> + };
>>> + cpu@1 {
>>> + device_type = "cpu";
>>> + compatible = "arm,cortex-a7";
>>> + next-level-cache = <&L2>;
>>> + reg = <0x1>;
>>> + };
>>> + cpu@2 {
>>> + device_type = "cpu";
>>> + compatible = "arm,cortex-a7";
>>> + next-level-cache = <&L2>;
>>> + reg = <0x2>;
>>> + };
>>> + cpu@3 {
>>> + device_type = "cpu";
>>> + compatible = "arm,cortex-a7";
>>> + next-level-cache = <&L2>;
>>> + reg = <0x3>;
>>> + };
>>> +
>>> + };
>>> +
>>> + clocks {
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + ranges;
>>> +
>>> + system_clk: system_clk {
>>> + compatible = "fixed-clock";
>>> + clock-frequency = <13000000>;
>>> + #clock-cells = <0>;
>>> + clock-output-names = "system_clk";
>>> + };
>>
>> Is it really a fixed clock without any parent, or do you
>> declare it as a fixed clock because you don't have any clock
>> common framework support yet?
>
> I don't have any common clock framework support yet.
So maybe you should provide one (even a very simple one).
Pretending a clock is a fixed clock and ignoring its parents
will be problematic when you will add the common clock framework
support because the device tree is supposed to be stable and you won't
be able to change it then.
Thanks,
Gregory
>
>>
>>> +
>>> + rtc_clk: rtc_clk {
>>> + compatible = "fixed-clock";
>>> + clock-frequency = <32000>;
>>> + #clock-cells = <0>;
>>> + clock-output-names = "rtc_clk";
>>> + };
>>> + };
>>> +
>>> + soc {
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + compatible = "simple-bus";
>>> + clock-ranges;
>>> + ranges;
>>> +
>>> + gic: interrupt-controller@10212000 {
>>> + compatible = "arm,cortex-a9-gic";
>>> + interrupt-controller;
>>> + #interrupt-cells = <3>;
>>> + reg = <0x10211000 0x1000>,
>>> + <0x10212000 0x1000>;
>>> + };
>>> +
>>> + L2: l2-cache-controller@1020e000 {
>>> + compatible = "arm,pl310-cache";
>>> + reg = <0x1020e000 0x1000>;
>>> + cache-unified;
>>> + cache-level = <2>;
>>> + };
>>> +
>>> + timer: timer@10008000 {
>>> + compatible = "mediatek,mtk6589-timer";
>>> + reg = <0x10008000 0x80>;
>>> + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
>>> + clocks = <&system_clk>, <&rtc_clk>;
>>> + clock-names = "sys_clk", "rtc_clk";
>>> + };
>>> + };
>>> +};
>>> diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
>>> new file mode 100644
>>> index 0000000..c0139ca
>>> --- /dev/null
>>> +++ b/arch/arm/mach-mediatek/Kconfig
>>> @@ -0,0 +1,14 @@
>>> +config ARCH_MEDIATEK
>>> + bool "Mediatek MT6589 SoC" if ARCH_MULTI_V7
>>> + select ARCH_REQUIRE_GPIOLIB
>>> + select ARM_GIC
>>> + select CACHE_L2X0
>>> + select HAVE_ARM_TWD if LOCAL_TIMERS
>>
>> LOCAL_TIMERS no longer exist
>>
>>> + select HAVE_SMP
>>> + select LOCAL_TIMERS if SMP
>> ditto
>>
>> so what about this instead:
>>
>> select HAVE_ARM_TWD if SMP
>>
>>
>> The rest of this patch looks good.
>>
>> Thanks,
>>
>> Gregory
>>
>>> + select COMMON_CLK
>>> + select GENERIC_CLOCKEVENTS
>>> + select MTK_TIMER
>>> + select CLKSRC_MMIO
>>> + help
>>> + Support for Mediatek Cortex-A7 Quad-Core-SoC MT6589.
>>> diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile
>>> new file mode 100644
>>> index 0000000..43e619f
>>> --- /dev/null
>>> +++ b/arch/arm/mach-mediatek/Makefile
>>> @@ -0,0 +1 @@
>>> +obj-$(CONFIG_ARCH_MEDIATEK) += mediatek.o
>>> diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c
>>> new file mode 100644
>>> index 0000000..f630403
>>> --- /dev/null
>>> +++ b/arch/arm/mach-mediatek/mediatek.c
>>> @@ -0,0 +1,40 @@
>>> +/*
>>> + * Device Tree support for Mediatek SoCs
>>> + *
>>> + * Copyright (c) 2014 MundoReader S.L.
>>> + * Author: Matthias Brugger <[email protected]>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License as published by
>>> + * the Free Software Foundation; either version 2 of the License, or
>>> + * (at your option) any later version.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> + * GNU General Public License for more details.
>>> + */
>>> +
>>> +#include <linux/kernel.h>
>>> +#include <linux/init.h>
>>> +#include <linux/of_platform.h>
>>> +#include <linux/irqchip.h>
>>> +#include <asm/mach/arch.h>
>>> +#include <asm/mach/map.h>
>>> +#include <asm/hardware/cache-l2x0.h>
>>> +
>>> +static void __init mediatek_dt_init(void)
>>> +{
>>> + l2x0_of_init(0, ~0);
>>> + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
>>> +}
>>> +
>>> +static const char * const mediatek_board_dt_compat[] = {
>>> + "mediatek,mt6589",
>>> + NULL,
>>> +};
>>> +
>>> +DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
>>> + .init_machine = mediatek_dt_init,
>>> + .dt_compat = mediatek_board_dt_compat,
>>> +MACHINE_END
>>>
>>
>>
>> --
>> Gregory Clement, Free Electrons
>> Kernel, drivers, real-time and embedded Linux
>> development, consulting, training and support.
>> http://free-electrons.com
>
>
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
A couple of things on top of Rob's comments:
On Wed, Apr 09 2014 at 10:50:33 pm BST, Rob Herring <[email protected]> wrote:
> On Wed, Apr 9, 2014 at 2:45 PM, Matthias Brugger <[email protected]> wrote:
>> This adds a generic devicetree board file and a dtsi for boards
>> based on the MT6589 SoCs from Mediatek.
>>
>> Apart from the generic parts (gic, clocks) the only component
>> currently supported are the timers.
>>
>> Signed-off-by: Matthias Brugger <[email protected]>
[...]
>> diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig
>> new file mode 100644
>> index 0000000..c0139ca
>> --- /dev/null
>> +++ b/arch/arm/mach-mediatek/Kconfig
>> @@ -0,0 +1,14 @@
>> +config ARCH_MEDIATEK
>> + bool "Mediatek MT6589 SoC" if ARCH_MULTI_V7
>> + select ARCH_REQUIRE_GPIOLIB
>
> Then where is your GPIO driver?
>
>> + select ARM_GIC
>> + select CACHE_L2X0
>> + select HAVE_ARM_TWD if LOCAL_TIMERS
Hell no! ;-) ARM_ARCH_TIMER is the way (please also add the missing
node).
>> + select HAVE_SMP
>
> Not needed now (going into 3.15).
>
>> + select LOCAL_TIMERS if SMP
No, A7 always have the arch timers.
Thanks,
M.
--
Jazz is not dead. It just smells funny.
Hi Gregory,
Am Donnerstag, 10. April 2014, 08:46:03 schrieb Gregory CLEMENT:
> On 10/04/2014 08:29, Matthias Brugger wrote:
> > 2014-04-09 22:26 GMT+02:00 Gregory CLEMENT <gregory.clement@free-
electrons.com>:
> >> Hi Matthias,
> >>
> >> On 09/04/2014 19:45, Matthias Brugger wrote:
> >>> diff --git a/arch/arm/boot/dts/mtk6589.dtsi
> >>> b/arch/arm/boot/dts/mtk6589.dtsi new file mode 100644
> >>> index 0000000..6dbb74f
> >>> --- /dev/null
> >>> +++ b/arch/arm/boot/dts/mtk6589.dtsi
> >>> @@ -0,0 +1,105 @@
> >>> +/*
> >>> + * Copyright (c) 2014 MundoReader S.L.
> >>> + * Author: Matthias Brugger <[email protected]>
> >>> + *
> >>> + * This program is free software; you can redistribute it and/or modify
> >>> + * it under the terms of the GNU General Public License as published by
> >>> + * the Free Software Foundation; either version 2 of the License, or
> >>> + * (at your option) any later version.
> >>> + *
> >>> + * This program is distributed in the hope that it will be useful,
> >>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> >>> + * GNU General Public License for more details.
> >>> + */
> >>> +
> >>> +#include <dt-bindings/interrupt-controller/irq.h>
> >>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> >>> +#include "skeleton.dtsi"
> >>> +
> >>> +/ {
> >>> + compatible = "mediatek,mt6589";
> >>> + interrupt-parent = <&gic>;
> >>> +
> >>> + cpus {
> >>> + #address-cells = <1>;
> >>> + #size-cells = <0>;
> >>> +
> >>> + cpu@0 {
> >>> + device_type = "cpu";
> >>> + compatible = "arm,cortex-a7";
> >>> + next-level-cache = <&L2>;
> >>> + reg = <0x0>;
> >>> + };
> >>> + cpu@1 {
> >>> + device_type = "cpu";
> >>> + compatible = "arm,cortex-a7";
> >>> + next-level-cache = <&L2>;
> >>> + reg = <0x1>;
> >>> + };
> >>> + cpu@2 {
> >>> + device_type = "cpu";
> >>> + compatible = "arm,cortex-a7";
> >>> + next-level-cache = <&L2>;
> >>> + reg = <0x2>;
> >>> + };
> >>> + cpu@3 {
> >>> + device_type = "cpu";
> >>> + compatible = "arm,cortex-a7";
> >>> + next-level-cache = <&L2>;
> >>> + reg = <0x3>;
> >>> + };
> >>> +
> >>> + };
> >>> +
> >>> + clocks {
> >>> + #address-cells = <1>;
> >>> + #size-cells = <1>;
> >>> + ranges;
> >>> +
> >>> + system_clk: system_clk {
> >>> + compatible = "fixed-clock";
> >>> + clock-frequency = <13000000>;
> >>> + #clock-cells = <0>;
> >>> + clock-output-names = "system_clk";
> >>> + };
> >>
> >> Is it really a fixed clock without any parent, or do you
> >> declare it as a fixed clock because you don't have any clock
> >> common framework support yet?
> >
> > I don't have any common clock framework support yet.
>
> So maybe you should provide one (even a very simple one).
>
> Pretending a clock is a fixed clock and ignoring its parents
> will be problematic when you will add the common clock framework
> support because the device tree is supposed to be stable and you won't
> be able to change it then.
personally I think the danger of introducing unsuitable bindings/precedents
for a clock controller before it is fully understood is higher.
I'd just rename the clock above to something like dummy130m like sunxi also
does for example, to reflect its unfinished state and when the clock controller
is present later on change the supplying clock of the timer.
Or maybe I'm overlooking something here :-)
Heiko
On Thursday 10 April 2014 08:46:03 Gregory CLEMENT wrote:
> >>
> >> Is it really a fixed clock without any parent, or do you
> >> declare it as a fixed clock because you don't have any clock
> >> common framework support yet?
> >
> > I don't have any common clock framework support yet.
>
> So maybe you should provide one (even a very simple one).
>
> Pretending a clock is a fixed clock and ignoring its parents
> will be problematic when you will add the common clock framework
> support because the device tree is supposed to be stable and you won't
> be able to change it then.
But is this actually a problem here? The current device tree file
will keep working even if the proper driver is there, you just need
to update both the driver and the dts file in order to actually
use the clocks at run-time.
I guess it comes down to the question of whether we want to handle
old kernels with new device trees again, which would be broken here.
Arnd
2014-04-09 23:52 GMT+02:00 Olof Johansson <[email protected]>:
> Hi,
>
> On Wed, Apr 9, 2014 at 12:45 PM, Matthias Brugger
> <[email protected]> wrote:
>> This patch adds a clock source and clock event for the timer found
>> on the Mediatek SoCs.
>>
>> The Mediatek General Porpose Timer block provides five 32 bit timers and
>> one 64 bit timer.
>>
>> Two 32 bit timers are used:
>> TIMER1: clock events supporting periodic and oneshot events
>> TIMER2: clock source configured as a free running counter
>>
>> The General Porpose Timer block can be run with two clocks. A 13 MHz system
>> clock and the RTC clock running at 32 KHz. This implementation uses the system
>> clock.
>
> Hm, are you planning on using these on the Cortex-A7-based and newer
> SoCs? On those, the arm generic timers should be available, and you
> might be better off just using those there.
I'm a bit puzzled about the timer naming.
Are the arm generic timers the one used by ARM_ARCH_TIMER, or are they
different ones?
>
> Of course, you'll still need these for the A9-based platforms, so the
> driver might very well be needed anyway. Some of the earlier patches
> seem to be for A7-based systems so I'm not sure what you're primarily
> working on here. :)
I'm working on a Cortex-A7 based platform. But ARM_ARCH_TIMER seems to
get no clocking.
Initializing the timer fails with:
Architected timer frequency not available
That's why I use the SoC timer.
>
>
> -Olof
--
motzblog.wordpress.com
On Friday 11 April 2014 11:07:35 Matthias Brugger wrote:
> >
> > Of course, you'll still need these for the A9-based platforms, so the
> > driver might very well be needed anyway. Some of the earlier patches
> > seem to be for A7-based systems so I'm not sure what you're primarily
> > working on here.
>
> I'm working on a Cortex-A7 based platform. But ARM_ARCH_TIMER seems to
> get no clocking.
> Initializing the timer fails with:
> Architected timer frequency not available
>
> That's why I use the SoC timer.
Are you sure you're not just missing a "clock-frequency" property
in your DT node for the timer?
Arnd