Cc: [email protected]
Acked-by: Alexandre Torgue <[email protected]>
Signed-off-by: Lee Jones <[email protected]>
---
Documentation/devicetree/bindings/ata/ahci-st.txt | 2 +-
arch/arm/boot/dts/stih416-b2020.dts | 4 ++++
arch/arm/boot/dts/stih416-b2020e.dts | 4 ++++
arch/arm/boot/dts/stih416.dtsi | 16 ++++++++++++++++
4 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/ata/ahci-st.txt b/Documentation/devicetree/bindings/ata/ahci-st.txt
index 0574a77..9883542 100644
--- a/Documentation/devicetree/bindings/ata/ahci-st.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-st.txt
@@ -21,7 +21,7 @@ Example:
reg = <0xfe380000 0x1000>;
interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
interrupt-names = "hostc";
- phys = <&miphy365x_phy MIPHY_PORT_0 MIPHY_TYPE_SATA>;
+ phys = <&phy_port0 MIPHY_TYPE_SATA>;
phy-names = "ahci_phy";
resets = <&powerdown STIH416_SATA0_POWERDOWN>,
<&softreset STIH416_SATA0_SOFTRESET>;
diff --git a/arch/arm/boot/dts/stih416-b2020.dts b/arch/arm/boot/dts/stih416-b2020.dts
index c3c2ac6..eb2f246 100644
--- a/arch/arm/boot/dts/stih416-b2020.dts
+++ b/arch/arm/boot/dts/stih416-b2020.dts
@@ -23,5 +23,9 @@
st,pcie-tx-pol-inv;
};
};
+
+ sata0: sata@fe380000{
+ status = "okay";
+ };
};
};
diff --git a/arch/arm/boot/dts/stih416-b2020e.dts b/arch/arm/boot/dts/stih416-b2020e.dts
index 80aff0f..99a699e 100644
--- a/arch/arm/boot/dts/stih416-b2020e.dts
+++ b/arch/arm/boot/dts/stih416-b2020e.dts
@@ -41,5 +41,9 @@
st,pcie-tx-pol-inv;
};
};
+
+ sata0: sata@fe380000{
+ status = "okay";
+ };
};
};
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 2b98a0a..060dd53 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -258,5 +258,21 @@
reg-names = "sata", "pcie", "syscfg";
};
};
+
+ sata0: sata@fe380000 {
+ compatible = "st,sti-ahci";
+ reg = <0xfe380000 0x1000>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
+ interrupt-names = "hostc";
+ phys = <&phy_port0 MIPHY_TYPE_SATA>;
+ phy-names = "sata-phy";
+ resets = <&powerdown STIH416_SATA0_POWERDOWN>,
+ <&softreset STIH416_SATA0_SOFTRESET>;
+ reset-names = "pwr-dwn", "sw-rst";
+ clock-names = "ahci_clk";
+ clocks = <&clk_s_a0_ls CLK_ICN_REG>;
+
+ status = "disabled";
+ };
};
};
--
1.8.3.2
Hi Lee,
On 07/21/2014 10:32 AM, Lee Jones wrote:
> Cc: [email protected]
> Acked-by: Alexandre Torgue <[email protected]>
> Signed-off-by: Lee Jones <[email protected]>
> ---
> Documentation/devicetree/bindings/ata/ahci-st.txt | 2 +-
> arch/arm/boot/dts/stih416-b2020.dts | 4 ++++
> arch/arm/boot/dts/stih416-b2020e.dts | 4 ++++
> arch/arm/boot/dts/stih416.dtsi | 16 ++++++++++++++++
> 4 files changed, 25 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/ata/ahci-st.txt b/Documentation/devicetree/bindings/ata/ahci-st.txt
> index 0574a77..9883542 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-st.txt
> +++ b/Documentation/devicetree/bindings/ata/ahci-st.txt
> @@ -21,7 +21,7 @@ Example:
> reg = <0xfe380000 0x1000>;
> interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
> interrupt-names = "hostc";
> - phys = <&miphy365x_phy MIPHY_PORT_0 MIPHY_TYPE_SATA>;
> + phys = <&phy_port0 MIPHY_TYPE_SATA>;
> phy-names = "ahci_phy";
> resets = <&powerdown STIH416_SATA0_POWERDOWN>,
> <&softreset STIH416_SATA0_SOFTRESET>;
Patch does not apply because this file does not exist in my tree.
Shouldn't be in a separate patch?
Regards,
Maxime
ARM: DT: STi: STiH416: Add DT node for ST's SATA device
Cc: [email protected]
Acked-by: Alexandre Torgue <[email protected]>
Signed-off-by: Lee Jones <[email protected]>
diff --git a/arch/arm/boot/dts/stih416-b2020.dts b/arch/arm/boot/dts/stih416-b2020.dts
index c3c2ac6..eb2f246 100644
--- a/arch/arm/boot/dts/stih416-b2020.dts
+++ b/arch/arm/boot/dts/stih416-b2020.dts
@@ -23,5 +23,9 @@
st,pcie-tx-pol-inv;
};
};
+
+ sata0: sata@fe380000{
+ status = "okay";
+ };
};
};
diff --git a/arch/arm/boot/dts/stih416-b2020e.dts b/arch/arm/boot/dts/stih416-b2020e.dts
index 80aff0f..99a699e 100644
--- a/arch/arm/boot/dts/stih416-b2020e.dts
+++ b/arch/arm/boot/dts/stih416-b2020e.dts
@@ -41,5 +41,9 @@
st,pcie-tx-pol-inv;
};
};
+
+ sata0: sata@fe380000{
+ status = "okay";
+ };
};
};
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 2b98a0a..060dd53 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -258,5 +258,21 @@
reg-names = "sata", "pcie", "syscfg";
};
};
+
+ sata0: sata@fe380000 {
+ compatible = "st,sti-ahci";
+ reg = <0xfe380000 0x1000>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
+ interrupt-names = "hostc";
+ phys = <&phy_port0 MIPHY_TYPE_SATA>;
+ phy-names = "sata-phy";
+ resets = <&powerdown STIH416_SATA0_POWERDOWN>,
+ <&softreset STIH416_SATA0_SOFTRESET>;
+ reset-names = "pwr-dwn", "sw-rst";
+ clock-names = "ahci_clk";
+ clocks = <&clk_s_a0_ls CLK_ICN_REG>;
+
+ status = "disabled";
+ };
};
};
On 07/22/2014 11:28 AM, Lee Jones wrote:
> ARM: DT: STi: STiH416: Add DT node for ST's SATA device
>
> Cc: [email protected]
> Acked-by: Alexandre Torgue <[email protected]>
> Signed-off-by: Lee Jones <[email protected]>
>
Thanks for the fixup.
Patch added to my queue for v3.17
Regards,
Maxime