One of the patch enables PMU support to BG2Q and BG2CD SoCs. Another patch
adds the missing PPI cpu mask to twd timer interrupts.
Jisheng Zhang (2):
ARM: dts: berlin: add pmu node for BG2Q and BG2CD
ARM: dts: berlin: add PPI cpu mask to twd timer interrupts
arch/arm/boot/dts/berlin2.dtsi | 3 ++-
arch/arm/boot/dts/berlin2cd.dtsi | 8 +++++++-
arch/arm/boot/dts/berlin2q.dtsi | 11 ++++++++++-
3 files changed, 19 insertions(+), 3 deletions(-)
--
2.1.4
Signed-off-by: Jisheng Zhang <[email protected]>
---
arch/arm/boot/dts/berlin2.dtsi | 3 ++-
arch/arm/boot/dts/berlin2cd.dtsi | 3 ++-
arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
index 015a06c..f6d9002 100644
--- a/arch/arm/boot/dts/berlin2.dtsi
+++ b/arch/arm/boot/dts/berlin2.dtsi
@@ -104,7 +104,8 @@
local-timer@ad0600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xad0600 0x20>;
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&chip CLKID_TWD>;
};
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index a318bc3..517a364 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -76,7 +76,8 @@
local-timer@ad0600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xad0600 0x20>;
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&chip CLKID_TWD>;
};
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 933dcbb..33fbf8f 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -112,7 +112,8 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0xad0600 0x20>;
clocks = <&chip CLKID_TWD>;
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
};
gic: interrupt-controller@ad1000 {
--
2.1.4
This patch adds the pmu node, enabling the PMU unit on Marvell BG2Q and
BG2CD SoCs.
Signed-off-by: Jisheng Zhang <[email protected]>
---
arch/arm/boot/dts/berlin2cd.dtsi | 5 +++++
arch/arm/boot/dts/berlin2q.dtsi | 8 ++++++++
2 files changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
index 230df3b..a318bc3 100644
--- a/arch/arm/boot/dts/berlin2cd.dtsi
+++ b/arch/arm/boot/dts/berlin2cd.dtsi
@@ -45,6 +45,11 @@
ranges = <0 0xf7000000 0x1000000>;
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
sdhci0: sdhci@ab0000 {
compatible = "mrvl,pxav3-mmc";
reg = <0xab0000 0x200>;
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 35253c9..933dcbb 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -63,6 +63,14 @@
ranges = <0 0xf7000000 0x1000000>;
interrupt-parent = <&gic>;
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
sdhci0: sdhci@ab0000 {
compatible = "mrvl,pxav3-mmc";
reg = <0xab0000 0x200>;
--
2.1.4
On 25.12.2014 07:12, Jisheng Zhang wrote:
> Signed-off-by: Jisheng Zhang <[email protected]>
Jisheng,
thanks for the patches!
Please always add some text to the commit log, no matter how simple the
change is.
> ---
> arch/arm/boot/dts/berlin2.dtsi | 3 ++-
> arch/arm/boot/dts/berlin2cd.dtsi | 3 ++-
> arch/arm/boot/dts/berlin2q.dtsi | 3 ++-
> 3 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi
> index 015a06c..f6d9002 100644
> --- a/arch/arm/boot/dts/berlin2.dtsi
> +++ b/arch/arm/boot/dts/berlin2.dtsi
> @@ -104,7 +104,8 @@
> local-timer@ad0600 {
> compatible = "arm,cortex-a9-twd-timer";
> reg = <0xad0600 0x20>;
> - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
> + IRQ_TYPE_LEVEL_HIGH)>;
IMHO, feel free to ignore 80-column restriction on each of the lines
changed.
Sebastian
> clocks = <&chip CLKID_TWD>;
> };
>
> diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi
> index a318bc3..517a364 100644
> --- a/arch/arm/boot/dts/berlin2cd.dtsi
> +++ b/arch/arm/boot/dts/berlin2cd.dtsi
> @@ -76,7 +76,8 @@
> local-timer@ad0600 {
> compatible = "arm,cortex-a9-twd-timer";
> reg = <0xad0600 0x20>;
> - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
> + IRQ_TYPE_LEVEL_HIGH)>;
> clocks = <&chip CLKID_TWD>;
> };
>
> diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
> index 933dcbb..33fbf8f 100644
> --- a/arch/arm/boot/dts/berlin2q.dtsi
> +++ b/arch/arm/boot/dts/berlin2q.dtsi
> @@ -112,7 +112,8 @@
> compatible = "arm,cortex-a9-twd-timer";
> reg = <0xad0600 0x20>;
> clocks = <&chip CLKID_TWD>;
> - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
> + IRQ_TYPE_LEVEL_HIGH)>;
> };
>
> gic: interrupt-controller@ad1000 {
>