This change is done as a follow-up to the following thread:
https://lkml.org/lkml/2014/10/1/436
qcom-wdt is currently assuming the presence of a dedicated node in DT
to gets its configuration. However, on msm architecture, the watchdog is
usually part of the timer block. So this patch-set is changing the driver
and slightly enhancing the timer DT bindings to provide the relevant clocks
and interrupts.
Mathieu Olivari (3):
watchdog: qcom: use timer devicetree binding
ARM: qcom: add description of KPSS WDT for IPQ8064
ARM: msm: add watchdog entries to DT timer binding doc
Documentation/devicetree/bindings/arm/msm/timer.txt | 16 +++++++++++++---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 14 +++++++++++++-
drivers/watchdog/qcom-wdt.c | 21 +++++++++++++++------
3 files changed, 41 insertions(+), 10 deletions(-)
--
1.9.1
MSM watchdog configuration happens in the same register block as the
timer, so we'll use the same binding as the existing timer.
The qcom-wdt will now be probed when devicetree has an entry compatible
with "qcom,kpss-timer" or "qcom-scss-timer".
Signed-off-by: Mathieu Olivari <[email protected]>
---
drivers/watchdog/qcom-wdt.c | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c
index aa85618..aa03ca8 100644
--- a/drivers/watchdog/qcom-wdt.c
+++ b/drivers/watchdog/qcom-wdt.c
@@ -20,9 +20,9 @@
#include <linux/reboot.h>
#include <linux/watchdog.h>
-#define WDT_RST 0x0
-#define WDT_EN 0x8
-#define WDT_BITE_TIME 0x24
+#define WDT_RST 0x38
+#define WDT_EN 0x40
+#define WDT_BITE_TIME 0x5C
struct qcom_wdt {
struct watchdog_device wdd;
@@ -117,6 +117,8 @@ static int qcom_wdt_probe(struct platform_device *pdev)
{
struct qcom_wdt *wdt;
struct resource *res;
+ struct device_node *np = pdev->dev.of_node;
+ u32 percpu_offset;
int ret;
wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
@@ -124,6 +126,14 @@ static int qcom_wdt_probe(struct platform_device *pdev)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ /* We use CPU0's DGT for the watchdog */
+ if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
+ percpu_offset = 0;
+
+ res->start += percpu_offset;
+ res->end += percpu_offset;
+
wdt->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(wdt->base))
return PTR_ERR(wdt->base);
@@ -203,9 +213,8 @@ static int qcom_wdt_remove(struct platform_device *pdev)
}
static const struct of_device_id qcom_wdt_of_table[] = {
- { .compatible = "qcom,kpss-wdt-msm8960", },
- { .compatible = "qcom,kpss-wdt-apq8064", },
- { .compatible = "qcom,kpss-wdt-ipq8064", },
+ { .compatible = "qcom,kpss-timer" },
+ { .compatible = "qcom,scss-timer" },
{ },
};
MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
--
1.9.1
Add the watchdog related entries to the Krait Processor Sub-system
(KPSS) timer IPQ8064 devicetree section. Also, add a fixed-clock
description of SLEEP_CLK, which will do for now.
Signed-off-by: Josh Cartwright <[email protected]>
Signed-off-by: Mathieu Olivari <[email protected]>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index cb225da..d01f618 100644
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -60,6 +60,14 @@
};
};
+ clocks {
+ sleep_clk: sleep_clk {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ #clock-cells = <0>;
+ };
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -89,10 +97,14 @@
compatible = "qcom,kpss-timer", "qcom,msm-timer";
interrupts = <1 1 0x301>,
<1 2 0x301>,
- <1 3 0x301>;
+ <1 3 0x301>,
+ <1 4 0x301>,
+ <1 5 0x301>;
reg = <0x0200a000 0x100>;
clock-frequency = <25000000>,
<32768>;
+ clocks = <&sleep_clk>;
+ clock-names = "sleep";
cpu-offset = <0x80000>;
};
--
1.9.1
The watchdog has been reworked to use the same DT node as the timer.
This change is updating the device tree doc accordingly.
Signed-off-by: Mathieu Olivari <[email protected]>
---
Documentation/devicetree/bindings/arm/msm/timer.txt | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/msm/timer.txt b/Documentation/devicetree/bindings/arm/msm/timer.txt
index 74607b6..5e10c34 100644
--- a/Documentation/devicetree/bindings/arm/msm/timer.txt
+++ b/Documentation/devicetree/bindings/arm/msm/timer.txt
@@ -9,11 +9,17 @@ Properties:
"qcom,scss-timer" - scorpion subsystem
- interrupts : Interrupts for the debug timer, the first general purpose
- timer, and optionally a second general purpose timer in that
- order.
+ timer, and optionally a second general purpose timer, and
+ optionally as well, 2 watchdog interrupts, in that order.
- reg : Specifies the base address of the timer registers.
+- clocks: Reference to the parent clocks, one per output clock. The parents
+ must appear in the same order as the clock names.
+
+- clock-names: The name of the clocks as free-form strings. They should be in
+ the same order as the clocks.
+
- clock-frequency : The frequency of the debug timer and the general purpose
timer(s) in Hz in that order.
@@ -29,9 +35,13 @@ Example:
compatible = "qcom,scss-timer", "qcom,msm-timer";
interrupts = <1 1 0x301>,
<1 2 0x301>,
- <1 3 0x301>;
+ <1 3 0x301>,
+ <1 4 0x301>,
+ <1 5 0x301>;
reg = <0x0200a000 0x100>;
clock-frequency = <19200000>,
<32768>;
+ clocks = <&sleep_clk>;
+ clock-names = "sleep";
cpu-offset = <0x40000>;
};
--
1.9.1
On 02/20/15 18:19, Mathieu Olivari wrote:
> MSM watchdog configuration happens in the same register block as the
> timer, so we'll use the same binding as the existing timer.
>
> The qcom-wdt will now be probed when devicetree has an entry compatible
> with "qcom,kpss-timer" or "qcom-scss-timer".
>
> Signed-off-by: Mathieu Olivari <[email protected]>
>
Reviewed-by: Stephen Boyd <[email protected]>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 02/20/15 18:19, Mathieu Olivari wrote:
> Add the watchdog related entries to the Krait Processor Sub-system
> (KPSS) timer IPQ8064 devicetree section. Also, add a fixed-clock
> description of SLEEP_CLK, which will do for now.
>
> Signed-off-by: Josh Cartwright <[email protected]>
> Signed-off-by: Mathieu Olivari <[email protected]>
>
Reviewed-by: Stephen Boyd <[email protected]>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On Fri, Feb 20, 2015 at 06:19:34PM -0800, Mathieu Olivari wrote:
> MSM watchdog configuration happens in the same register block as the
> timer, so we'll use the same binding as the existing timer.
>
> The qcom-wdt will now be probed when devicetree has an entry compatible
> with "qcom,kpss-timer" or "qcom-scss-timer".
>
> Signed-off-by: Mathieu Olivari <[email protected]>
Acked-by: Guenter Roeck <[email protected]>
On Fri, Feb 20, 2015 at 06:19:35PM -0800, Mathieu Olivari wrote:
> Add the watchdog related entries to the Krait Processor Sub-system
> (KPSS) timer IPQ8064 devicetree section. Also, add a fixed-clock
> description of SLEEP_CLK, which will do for now.
>
> Signed-off-by: Josh Cartwright <[email protected]>
> Signed-off-by: Mathieu Olivari <[email protected]>
Acked-by: Guenter Roeck <[email protected]>
On Fri, Feb 20, 2015 at 06:19:36PM -0800, Mathieu Olivari wrote:
> The watchdog has been reworked to use the same DT node as the timer.
> This change is updating the device tree doc accordingly.
>
> Signed-off-by: Mathieu Olivari <[email protected]>
Acked-by: Guenter Roeck <[email protected]>
On Friday 20 February 2015 18:19:33 Mathieu Olivari wrote:
> This change is done as a follow-up to the following thread:
> https://lkml.org/lkml/2014/10/1/436
>
> qcom-wdt is currently assuming the presence of a dedicated node in DT
> to gets its configuration. However, on msm architecture, the watchdog is
> usually part of the timer block. So this patch-set is changing the driver
> and slightly enhancing the timer DT bindings to provide the relevant clocks
> and interrupts.
>
> Mathieu Olivari (3):
> watchdog: qcom: use timer devicetree binding
> ARM: qcom: add description of KPSS WDT for IPQ8064
> ARM: msm: add watchdog entries to DT timer binding doc
>
> Documentation/devicetree/bindings/arm/msm/timer.txt | 16 +++++++++++++---
> arch/arm/boot/dts/qcom-ipq8064.dtsi | 14 +++++++++++++-
> drivers/watchdog/qcom-wdt.c | 21 +++++++++++++++------
> 3 files changed, 41 insertions(+), 10 deletions(-)
>
>
What about the binding document in
Documentation/devicetree/bindings/watchdog/qcom-wdt.txt?
Arnd
On 02/23/15 13:35, Arnd Bergmann wrote:
> On Friday 20 February 2015 18:19:33 Mathieu Olivari wrote:
>> This change is done as a follow-up to the following thread:
>> https://lkml.org/lkml/2014/10/1/436
>>
>> qcom-wdt is currently assuming the presence of a dedicated node in DT
>> to gets its configuration. However, on msm architecture, the watchdog is
>> usually part of the timer block. So this patch-set is changing the driver
>> and slightly enhancing the timer DT bindings to provide the relevant clocks
>> and interrupts.
>>
>> Mathieu Olivari (3):
>> watchdog: qcom: use timer devicetree binding
>> ARM: qcom: add description of KPSS WDT for IPQ8064
>> ARM: msm: add watchdog entries to DT timer binding doc
>>
>> Documentation/devicetree/bindings/arm/msm/timer.txt | 16 +++++++++++++---
>> arch/arm/boot/dts/qcom-ipq8064.dtsi | 14 +++++++++++++-
>> drivers/watchdog/qcom-wdt.c | 21 +++++++++++++++------
>> 3 files changed, 41 insertions(+), 10 deletions(-)
>>
>>
> What about the binding document in
> Documentation/devicetree/bindings/watchdog/qcom-wdt.txt?
>
>
We can rewrite it for platforms starting with msm8974 and beyond or
delete it and write a new binding. It's a similar hardware block split
out from the timers and then made to use a SPI instead of a PPI for the
interrupt sources. We also lost the CPU remapping feature so there is
really only one watchdog instead of 2 per cpu. Oh and the register
offsets are different, but otherwise the registers are the same.
---8<-----
From: Stephen Boyd <[email protected]>
Subject: [PATCH] Documentation: qcom-wdt: Update binding for individual block
On msm8974 and beyond the KPSS watchdog is split out of the timer
block and made to be a single instance instead of per-cpu. Let's
update the binding to reflect this and replace the binding that
is handled by the qcom,kpss-timer binding.
Signed-off-by: Stephen Boyd <[email protected]>
---
Documentation/devicetree/bindings/watchdog/qcom-wdt.txt | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.txt b/Documentation/devicetree/bindings/watchdog/qcom-wdt.txt
index 4726924d034e..78b92bec4c3a 100644
--- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.txt
@@ -2,14 +2,10 @@ Qualcomm Krait Processor Sub-system (KPSS) Watchdog
---------------------------------------------------
Required properties :
-- compatible : shall contain only one of the following:
-
- "qcom,kpss-wdt-msm8960"
- "qcom,kpss-wdt-apq8064"
- "qcom,kpss-wdt-ipq8064"
-
+- compatible : shall contain "qcom,kpss-wdt"
- reg : shall contain base register location and length
- clocks : shall contain the input clock
+- interrupts : shall contain the bark and bite interrupts in that order
Optional properties :
- timeout-sec : shall contain the default watchdog timeout in seconds,
@@ -17,8 +13,9 @@ Optional properties :
Example:
watchdog@208a038 {
- compatible = "qcom,kpss-wdt-ipq8064";
- reg = <0x0208a038 0x40>;
+ compatible = "qcom,kpss-wdt";
+ reg = <0xf9017000 0x1000>;
+ interrupts = <0 3 0>, <0 4 0>;
clocks = <&sleep_clk>;
timeout-sec = <10>;
};
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project