Hello,
I wanted to enable high-resolution timers on this Cortex A9 system,
but it seems there is more to it than just enabling
CONFIG_HIGH_RES_TIMERS=y
(The system is limited to jiffy resolution.)
#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
# CONFIG_NO_HZ_FULL is not set
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_HZ=300
/proc/timer_list output attached
I'm using the TWD block (private timer and watchdog) for clock events.
Registered with twd_local_timer_register(&tangox_twd);
"4.1 About the private timer and watchdog blocks
The private timer and watchdog blocks have the following features:
- a 32-bit counter that generates an interrupt when it reaches zero
- an eight-bit prescaler value to qualify the clock period
- configurable single-shot or auto-reload modes
- configurable starting values for the counter
- the clock for these blocks is PERIPHCLK."
arch/arm/kernel/smp_twd.c
http://elinux.org/High_Resolution_Timers states
> 2. Check the event_handler for the Tick Device. If the event handlers
> is 'hrtimer_interrupt' then the clock is set up for high resolution
> handling. If the event handler is 'tick_handle_periodic', then the
> device is set up for regular tick-based handling.
And indeed:
Tick Device: mode: 0
Per CPU device: 0
Clock Event Device: local_timer
max_delta_ns: 8598533124
min_delta_ns: 1000
mult: 2145336164
shift: 32
mode: 2
next_event: 9223372036854775807 nsecs
set_next_event: twd_set_next_event
set_mode: twd_set_mode
event_handler: tick_handle_periodic
retries: 0
clk->name = "local_timer";
clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP;
clk->rating = 350;
clk->set_mode = twd_set_mode;
clk->set_next_event = twd_set_next_event;
clk->irq = twd_ppi;
clk->cpumask = cpumask_of(cpu);
/*
* x86(64) specific misfeatures:
*
* - Clockevent source stops in C3 State and needs broadcast support.
*/
#define CLOCK_EVT_FEAT_C3STOP 0x000008
$ git show 5388a6b2 arch/arm/kernel/smp_twd.c
commit 5388a6b266e9c3357353332ba0cd5549082887f1
Author: Russell King <[email protected]>
Date: Mon Jul 26 13:19:43 2010 +0100
ARM: SMP: Always enable clock event broadcast support
The TWD local timers are unable to wake up the CPU when it is placed
into a low power mode, eg. C3. Therefore, we need to adapt things
such that the TWD code can cope with this.
We do this by always providing a broadcast tick function, and marking
the fact that the TWD local timer will stop in low power modes. This
means that when the CPU is placed into a low power mode, the core
timer code marks this fact, and allows an IPI to be given to the core.
Tested-by: Santosh Shilimkar <[email protected]>
Signed-off-by: Russell King <[email protected]>
Cc: Catalin Marinas <[email protected]>
Cc: Thomas Gleixner <[email protected]>
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 7c5f0c0..35882fb 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -132,7 +132,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
twd_calibrate_rate();
clk->name = "local_timer";
- clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
+ clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
+ CLOCK_EVT_FEAT_C3STOP;
clk->rating = 350;
clk->set_mode = twd_set_mode;
clk->set_next_event = twd_set_next_event;
Do I have to use a platform-specific clockevent source if I want
high-resolution timers on my system?
Regards.
On Thu, Apr 30, 2015 at 5:46 AM, Mason <[email protected]> wrote:
> Hello,
>
> I wanted to enable high-resolution timers on this Cortex A9 system,
> but it seems there is more to it than just enabling
>
> CONFIG_HIGH_RES_TIMERS=y
>
> (The system is limited to jiffy resolution.)
You might make sure you've got a HRT enabled clocksource installed?
You might check
/sys/devices/system/clocksource/clocksource0/current_clocksource ?
thanks
-john
Hello John,
On 30/04/2015 18:42, John Stultz wrote:
> On Thu, Apr 30, 2015 at 5:46 AM, Mason wrote:
>
>> I wanted to enable high-resolution timers on this Cortex A9 system,
>> but it seems there is more to it than just enabling
>>
>> CONFIG_HIGH_RES_TIMERS=y
>>
>> (The system is limited to jiffy resolution.)
>
> You might make sure you've got a HRT enabled clocksource installed?
>
> You might check
> /sys/devices/system/clocksource/clocksource0/current_clocksource ?
Thanks for the suggestion, I will check on Monday.
The clocksource is a constant 27 MHz 32-bit counter.
It seems the problem comes from the clockevent source, which is
marked CLOCK_EVT_FEAT_C3STOP. If I remove that flag, then hrtimers
are enabled; but the flag is there for a good reason, I assume.
I will resend my message to the LAKML on Monday.
Regards.