CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
incorrectly used as a bit numbers. Fix it.
Tested on Exynos4210 based Origen board and on Exynos5250 based
Arndale board.
Cc: Tomasz Figa <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Javier Martinez Canillas <[email protected]>
Cc: Thomas Abraham <[email protected]>
Reported-by: Dan Carpenter <[email protected]>
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/clk/samsung/clk-cpu.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/clk/samsung/clk-cpu.c b/drivers/clk/samsung/clk-cpu.c
index 3a1fe07..dd02356 100644
--- a/drivers/clk/samsung/clk-cpu.c
+++ b/drivers/clk/samsung/clk-cpu.c
@@ -161,7 +161,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
* the values for DIV_COPY and DIV_HPM dividers need not be set.
*/
div0 = cfg_data->div0;
- if (test_bit(CLK_CPU_HAS_DIV1, &cpuclk->flags)) {
+ if (cpuclk->flags & CLK_CPU_HAS_DIV1) {
div1 = cfg_data->div1;
if (readl(base + E4210_SRC_CPU) & E4210_MUX_HPM_MASK)
div1 = readl(base + E4210_DIV_CPU1) &
@@ -182,7 +182,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
alt_div = DIV_ROUND_UP(alt_prate, tmp_rate) - 1;
WARN_ON(alt_div >= MAX_DIV);
- if (test_bit(CLK_CPU_NEEDS_DEBUG_ALT_DIV, &cpuclk->flags)) {
+ if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) {
/*
* In Exynos4210, ATB clock parent is also mout_core. So
* ATB clock also needs to be mantained at safe speed.
@@ -203,7 +203,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
writel(div0, base + E4210_DIV_CPU0);
wait_until_divider_stable(base + E4210_DIV_STAT_CPU0, DIV_MASK_ALL);
- if (test_bit(CLK_CPU_HAS_DIV1, &cpuclk->flags)) {
+ if (cpuclk->flags & CLK_CPU_HAS_DIV1) {
writel(div1, base + E4210_DIV_CPU1);
wait_until_divider_stable(base + E4210_DIV_STAT_CPU1,
DIV_MASK_ALL);
@@ -222,7 +222,7 @@ static int exynos_cpuclk_post_rate_change(struct clk_notifier_data *ndata,
unsigned long mux_reg;
/* find out the divider values to use for clock data */
- if (test_bit(CLK_CPU_NEEDS_DEBUG_ALT_DIV, &cpuclk->flags)) {
+ if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) {
while ((cfg_data->prate * 1000) != ndata->new_rate) {
if (cfg_data->prate == 0)
return -EINVAL;
@@ -237,7 +237,7 @@ static int exynos_cpuclk_post_rate_change(struct clk_notifier_data *ndata,
writel(mux_reg & ~(1 << 16), base + E4210_SRC_CPU);
wait_until_mux_stable(base + E4210_STAT_CPU, 16, 1);
- if (test_bit(CLK_CPU_NEEDS_DEBUG_ALT_DIV, &cpuclk->flags)) {
+ if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) {
div |= (cfg_data->div0 & E4210_DIV0_ATB_MASK);
div_mask |= E4210_DIV0_ATB_MASK;
}
--
1.9.1
On 30.06.2015 02:29, Bartlomiej Zolnierkiewicz wrote:
> CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
> incorrectly used as a bit numbers. Fix it.
>
> Tested on Exynos4210 based Origen board and on Exynos5250 based
> Arndale board.
>
> Cc: Tomasz Figa <[email protected]>
> Cc: Michael Turquette <[email protected]>
> Cc: Javier Martinez Canillas <[email protected]>
> Cc: Thomas Abraham <[email protected]>
> Reported-by: Dan Carpenter <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/clk/samsung/clk-cpu.c | 10 +++++-----
> 1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Tue, Jun 30, 2015 at 2:06 AM, Krzysztof Kozlowski
<[email protected]> wrote:
> On 30.06.2015 02:29, Bartlomiej Zolnierkiewicz wrote:
>> CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
>> incorrectly used as a bit numbers. Fix it.
>>
>> Tested on Exynos4210 based Origen board and on Exynos5250 based
>> Arndale board.
>>
>> Cc: Tomasz Figa <[email protected]>
>> Cc: Michael Turquette <[email protected]>
>> Cc: Javier Martinez Canillas <[email protected]>
>> Cc: Thomas Abraham <[email protected]>
>> Reported-by: Dan Carpenter <[email protected]>
>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>> ---
>> drivers/clk/samsung/clk-cpu.c | 10 +++++-----
>> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
>
Looks good to me as well.
Reviewed-by: Javier Martinez Canillas <[email protected]>
> Best regards,
> Krzysztof
>
Best regards,
Javier
Hi,
On Tuesday, June 30, 2015 08:27:36 AM Javier Martinez Canillas wrote:
> On Tue, Jun 30, 2015 at 2:06 AM, Krzysztof Kozlowski
> <[email protected]> wrote:
> > On 30.06.2015 02:29, Bartlomiej Zolnierkiewicz wrote:
> >> CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
> >> incorrectly used as a bit numbers. Fix it.
> >>
> >> Tested on Exynos4210 based Origen board and on Exynos5250 based
> >> Arndale board.
> >>
> >> Cc: Tomasz Figa <[email protected]>
> >> Cc: Michael Turquette <[email protected]>
> >> Cc: Javier Martinez Canillas <[email protected]>
> >> Cc: Thomas Abraham <[email protected]>
> >> Reported-by: Dan Carpenter <[email protected]>
> >> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> >> ---
> >> drivers/clk/samsung/clk-cpu.c | 10 +++++-----
> >> 1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > Reviewed-by: Krzysztof Kozlowski <[email protected]>
> >
>
> Looks good to me as well.
>
> Reviewed-by: Javier Martinez Canillas <[email protected]>
Krzysztof has noted that I should use your @dowhile0.org e-mail address
instead of @collabora.co.uk one, is this right?
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
Hello Bartlomiej,
On 06/30/2015 07:17 PM, Bartlomiej Zolnierkiewicz wrote:
>
> Hi,
>
> On Tuesday, June 30, 2015 08:27:36 AM Javier Martinez Canillas wrote:
>> On Tue, Jun 30, 2015 at 2:06 AM, Krzysztof Kozlowski
>> <[email protected]> wrote:
>> > On 30.06.2015 02:29, Bartlomiej Zolnierkiewicz wrote:
>> >> CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
>> >> incorrectly used as a bit numbers. Fix it.
>> >>
>> >> Tested on Exynos4210 based Origen board and on Exynos5250 based
>> >> Arndale board.
>> >>
>> >> Cc: Tomasz Figa <[email protected]>
>> >> Cc: Michael Turquette <[email protected]>
>> >> Cc: Javier Martinez Canillas <[email protected]>
>> >> Cc: Thomas Abraham <[email protected]>
>> >> Reported-by: Dan Carpenter <[email protected]>
>> >> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>> >> ---
>> >> drivers/clk/samsung/clk-cpu.c | 10 +++++-----
>> >> 1 file changed, 5 insertions(+), 5 deletions(-)
>> >
>> > Reviewed-by: Krzysztof Kozlowski <[email protected]>
>> >
>>
>> Looks good to me as well.
>>
>> Reviewed-by: Javier Martinez Canillas <[email protected]>
>
> Krzysztof has noted that I should use your @dowhile0.org e-mail address
> instead of @collabora.co.uk one, is this right?
>
I don't know what is the policy for tags but Krzysztof is correct that
this email address is going away this week so for future patches please
use my personal @dowhile0.org address instead.
Best regards,
Javier
On Tuesday, June 30, 2015 07:45:15 PM Javier Martinez Canillas wrote:
> Hello Bartlomiej,
>
> On 06/30/2015 07:17 PM, Bartlomiej Zolnierkiewicz wrote:
> >
> > Hi,
> >
> > On Tuesday, June 30, 2015 08:27:36 AM Javier Martinez Canillas wrote:
> >> On Tue, Jun 30, 2015 at 2:06 AM, Krzysztof Kozlowski
> >> <[email protected]> wrote:
> >> > On 30.06.2015 02:29, Bartlomiej Zolnierkiewicz wrote:
> >> >> CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
> >> >> incorrectly used as a bit numbers. Fix it.
> >> >>
> >> >> Tested on Exynos4210 based Origen board and on Exynos5250 based
> >> >> Arndale board.
> >> >>
> >> >> Cc: Tomasz Figa <[email protected]>
> >> >> Cc: Michael Turquette <[email protected]>
> >> >> Cc: Javier Martinez Canillas <[email protected]>
> >> >> Cc: Thomas Abraham <[email protected]>
> >> >> Reported-by: Dan Carpenter <[email protected]>
> >> >> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> >> >> ---
> >> >> drivers/clk/samsung/clk-cpu.c | 10 +++++-----
> >> >> 1 file changed, 5 insertions(+), 5 deletions(-)
> >> >
> >> > Reviewed-by: Krzysztof Kozlowski <[email protected]>
> >> >
> >>
> >> Looks good to me as well.
> >>
> >> Reviewed-by: Javier Martinez Canillas <[email protected]>
> >
> > Krzysztof has noted that I should use your @dowhile0.org e-mail address
> > instead of @collabora.co.uk one, is this right?
> >
>
> I don't know what is the policy for tags but Krzysztof is correct that
> this email address is going away this week so for future patches please
> use my personal @dowhile0.org address instead.
OK, I'll update my patches & scripts then.
Thank you for review.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
Michael/Sylwester, could you please merge this patch?
It is a bugfix for ddeac8d968d41d13a52582d6e80395a329e9b1ff ("clk:
samsung: add infrastructure to register cpu clocks") which got
merged in v4.2-rc1.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
On Tuesday, June 30, 2015 08:27:36 AM Javier Martinez Canillas wrote:
> On Tue, Jun 30, 2015 at 2:06 AM, Krzysztof Kozlowski
> <[email protected]> wrote:
> > On 30.06.2015 02:29, Bartlomiej Zolnierkiewicz wrote:
> >> CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
> >> incorrectly used as a bit numbers. Fix it.
> >>
> >> Tested on Exynos4210 based Origen board and on Exynos5250 based
> >> Arndale board.
> >>
> >> Cc: Tomasz Figa <[email protected]>
> >> Cc: Michael Turquette <[email protected]>
> >> Cc: Javier Martinez Canillas <[email protected]>
> >> Cc: Thomas Abraham <[email protected]>
> >> Reported-by: Dan Carpenter <[email protected]>
> >> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> >> ---
> >> drivers/clk/samsung/clk-cpu.c | 10 +++++-----
> >> 1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > Reviewed-by: Krzysztof Kozlowski <[email protected]>
> >
>
> Looks good to me as well.
>
> Reviewed-by: Javier Martinez Canillas <[email protected]>
>
> > Best regards,
> > Krzysztof
> >
>
> Best regards,
> Javier
On 29/06/15 19:29, Bartlomiej Zolnierkiewicz wrote:
> CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were
> incorrectly used as a bit numbers. Fix it.
>
> Tested on Exynos4210 based Origen board and on Exynos5250 based
> Arndale board.
>
> Cc: Tomasz Figa <[email protected]>
> Cc: Michael Turquette <[email protected]>
> Cc: Javier Martinez Canillas <[email protected]>
> Cc: Thomas Abraham <[email protected]>
> Reported-by: Dan Carpenter <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Acked-by: Sylwester Nawrocki <[email protected]>