Hi,
This patch series removes the use of Exynos5250 specific support
from cpufreq-exynos driver and enables the use of cpufreq-dt driver
for this platform.
This patch series has been tested on Exynos5250 based Arndale board.
Changes since v1 (http://lkml.org/lkml/2015/4/13/611):
- rebased on top of next-20150629 branch of linux-next kernel tree
- dropped dependency on "[PATCH 0/6] cpufreq: use generic cpufreq
drivers for Exynos4x12 platform" patch series as it needs more
work (Viresh has requested porting of cpufreq-dt's boost mode
support over opp-v2 patches)
Changes since v2 (http://lkml.org/lkml/2015/6/29/361):
- put the new cpu nodes in alphabetical order
- updated Javier's and Mike's e-mail adresses
- removed Cc: tag with stale Sachin's e-mail adress
- added Reviewed-by: tag from Krzysztof to patches #3 and #4
Depends on:
- next-20150629 branch of linux-next kernel tree
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics
Bartlomiej Zolnierkiewicz (1):
cpufreq: exynos: remove Exynos5250 specific cpufreq driver support
Thomas Abraham (3):
clk: samsung: exynos5250: add cpu clock configuration data and
instantiate cpu clock
ARM: dts: Exynos5250: add CPU OPP and regulator supply property
ARM: Exynos: switch to using generic cpufreq driver for Exynos5250
arch/arm/boot/dts/exynos5250-arndale.dts | 4 +
arch/arm/boot/dts/exynos5250-smdk5250.dts | 4 +
arch/arm/boot/dts/exynos5250-snow.dts | 4 +
arch/arm/boot/dts/exynos5250-spring.dts | 4 +
arch/arm/boot/dts/exynos5250.dtsi | 22 ++++
arch/arm/mach-exynos/exynos.c | 1 +
drivers/clk/samsung/clk-exynos5250.c | 31 +++++
drivers/cpufreq/Kconfig.arm | 11 --
drivers/cpufreq/Makefile | 1 -
drivers/cpufreq/exynos-cpufreq.c | 3 -
drivers/cpufreq/exynos-cpufreq.h | 17 ---
drivers/cpufreq/exynos5250-cpufreq.c | 210 ------------------------------
include/dt-bindings/clock/exynos5250.h | 1 +
13 files changed, 71 insertions(+), 242 deletions(-)
delete mode 100644 drivers/cpufreq/exynos5250-cpufreq.c
--
1.9.1
From: Thomas Abraham <[email protected]>
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5250.
Changes by Bartlomiej:
- split Exynos5250 support from the original patch
- moved E5250_CPU_DIV[0,1]() macros to clk-exynos5250.c
Cc: Tomasz Figa <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Javier Martinez Canillas <[email protected]>
Signed-off-by: Thomas Abraham <[email protected]>
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/clk/samsung/clk-exynos5250.c | 31 +++++++++++++++++++++++++++++++
include/dt-bindings/clock/exynos5250.h | 1 +
2 files changed, 32 insertions(+)
diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index 70ec3d2..d87f34d 100644
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -19,6 +19,7 @@
#include <linux/syscore_ops.h>
#include "clk.h"
+#include "clk-cpu.h"
#define APLL_LOCK 0x0
#define APLL_CON0 0x100
@@ -748,6 +749,32 @@ static struct samsung_pll_clock exynos5250_plls[nr_plls] __initdata = {
VPLL_LOCK, VPLL_CON0, NULL),
};
+#define E5250_CPU_DIV0(apll, pclk_dbg, atb, periph, acp, cpud) \
+ ((((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
+ ((periph) << 12) | ((acp) << 8) | ((cpud) << 4)))
+#define E5250_CPU_DIV1(hpm, copy) \
+ (((hpm) << 4) | (copy))
+
+static const struct exynos_cpuclk_cfg_data exynos5250_armclk_d[] __initconst = {
+ { 1700000, E5250_CPU_DIV0(5, 3, 7, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
+ { 1600000, E5250_CPU_DIV0(4, 1, 7, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
+ { 1500000, E5250_CPU_DIV0(4, 1, 7, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+ { 1400000, E5250_CPU_DIV0(4, 1, 6, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+ { 1300000, E5250_CPU_DIV0(3, 1, 6, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+ { 1200000, E5250_CPU_DIV0(3, 1, 5, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
+ { 1100000, E5250_CPU_DIV0(3, 1, 5, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
+ { 1000000, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 900000, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 800000, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 700000, E5250_CPU_DIV0(1, 1, 3, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 600000, E5250_CPU_DIV0(1, 1, 3, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 500000, E5250_CPU_DIV0(1, 1, 2, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 400000, E5250_CPU_DIV0(1, 1, 2, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 300000, E5250_CPU_DIV0(1, 1, 1, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 200000, E5250_CPU_DIV0(1, 1, 1, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
+ { 0 },
+};
+
static const struct of_device_id ext_clk_match[] __initconst = {
{ .compatible = "samsung,clock-xxti", .data = (void *)0, },
{ },
@@ -797,6 +824,10 @@ static void __init exynos5250_clk_init(struct device_node *np)
ARRAY_SIZE(exynos5250_div_clks));
samsung_clk_register_gate(ctx, exynos5250_gate_clks,
ARRAY_SIZE(exynos5250_gate_clks));
+ exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
+ mout_cpu_p[0], mout_cpu_p[1], 0x200,
+ exynos5250_armclk_d, ARRAY_SIZE(exynos5250_armclk_d),
+ CLK_CPU_HAS_DIV1);
/*
* Enable arm clock down (in idle) and set arm divider
diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h
index 4273891d..8183d1c 100644
--- a/include/dt-bindings/clock/exynos5250.h
+++ b/include/dt-bindings/clock/exynos5250.h
@@ -21,6 +21,7 @@
#define CLK_FOUT_CPLL 6
#define CLK_FOUT_EPLL 7
#define CLK_FOUT_VPLL 8
+#define CLK_ARM_CLK 9
/* gate for special clocks (sclk) */
#define CLK_SCLK_CAM_BAYER 128
--
1.9.1
From: Thomas Abraham <[email protected]>
For Exynos5250 platforms, add CPU operating points and CPU
regulator supply properties for migrating from Exynos specific
cpufreq driver to using generic cpufreq driver.
Changes by Bartlomiej:
- split Exynos5250 support from the original patch
- added CPU regulator supply property for Google Spring board
- put the new cpu nodes in alphabetical order
Cc: Kukjin Kim <[email protected]>
Cc: Doug Anderson <[email protected]>
Cc: Javier Martinez Canillas <[email protected]>
Cc: Andreas Faerber <[email protected]>
Signed-off-by: Thomas Abraham <[email protected]>
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
arch/arm/boot/dts/exynos5250-arndale.dts | 4 ++++
arch/arm/boot/dts/exynos5250-smdk5250.dts | 4 ++++
arch/arm/boot/dts/exynos5250-snow.dts | 4 ++++
arch/arm/boot/dts/exynos5250-spring.dts | 4 ++++
arch/arm/boot/dts/exynos5250.dtsi | 22 ++++++++++++++++++++++
5 files changed, 38 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 7e728a1..db3f65f 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -117,6 +117,10 @@
};
};
+&cpu0 {
+ cpu0-supply = <&buck2_reg>;
+};
+
&dp {
status = "okay";
samsung,color-space = <0>;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 4fe186d..15aea76 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -74,6 +74,10 @@
};
};
+&cpu0 {
+ cpu0-supply = <&buck2_reg>;
+};
+
&dp {
samsung,color-space = <0>;
samsung,dynamic-range = <0>;
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index b7f4122..a4133df 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -235,6 +235,10 @@
};
};
+&cpu0 {
+ cpu0-supply = <&buck2_reg>;
+};
+
&dp {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts
index d03f9b8..c1edd6d 100644
--- a/arch/arm/boot/dts/exynos5250-spring.dts
+++ b/arch/arm/boot/dts/exynos5250-spring.dts
@@ -65,6 +65,10 @@
};
};
+&cpu0 {
+ cpu0-supply = <&buck2_reg>;
+};
+
&dp {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index bf9bee6..0c7ef12 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -63,6 +63,28 @@
compatible = "arm,cortex-a15";
reg = <0>;
clock-frequency = <1700000000>;
+ clocks = <&clock CLK_ARM_CLK>;
+ clock-names = "cpu";
+ clock-latency = <140000>;
+
+ operating-points = <
+ 1700000 1300000
+ 1600000 1250000
+ 1500000 1225000
+ 1400000 1200000
+ 1300000 1150000
+ 1200000 1125000
+ 1100000 1100000
+ 1000000 1075000
+ 900000 1050000
+ 800000 1025000
+ 700000 1012500
+ 600000 1000000
+ 500000 975000
+ 400000 950000
+ 300000 937500
+ 200000 925000
+ >;
cooling-min-level = <15>;
cooling-max-level = <9>;
#cooling-cells = <2>; /* min followed by max */
--
1.9.1
From: Thomas Abraham <[email protected]>
The new CPU clock type allows the use of generic CPUfreq driver.
Switch Exynos5250 to using generic cpufreq driver.
Changes by Bartlomiej:
- split Exynos5250 support from the original patch
Cc: Tomasz Figa <[email protected]>
Cc: Kukjin Kim <[email protected]>
Cc: Javier Martinez Canillas <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Thomas Abraham <[email protected]>
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
arch/arm/mach-exynos/exynos.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 5f8ddcd..4015ec3 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -226,6 +226,7 @@ static void __init exynos_init_irq(void)
static const struct of_device_id exynos_cpufreq_matches[] = {
{ .compatible = "samsung,exynos4210", .data = "cpufreq-dt" },
+ { .compatible = "samsung,exynos5250", .data = "cpufreq-dt" },
{ /* sentinel */ }
};
--
1.9.1
Exynos5250 based platforms have switched over to use generic
cpufreq driver for cpufreq functionality. So the Exynos
specific cpufreq support for these platforms can be removed.
Based on the earlier work by Thomas Abraham.
Cc: Viresh Kumar <[email protected]>
Cc: Javier Martinez Canillas <[email protected]>
Cc: Thomas Abraham <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
---
drivers/cpufreq/Kconfig.arm | 11 --
drivers/cpufreq/Makefile | 1 -
drivers/cpufreq/exynos-cpufreq.c | 3 -
drivers/cpufreq/exynos-cpufreq.h | 17 ---
drivers/cpufreq/exynos5250-cpufreq.c | 210 -----------------------------------
5 files changed, 242 deletions(-)
delete mode 100644 drivers/cpufreq/exynos5250-cpufreq.c
diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
index 24e5c66..9ab6388c1 100644
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@ -47,17 +47,6 @@ config ARM_EXYNOS4X12_CPUFREQ
If in doubt, say N.
-config ARM_EXYNOS5250_CPUFREQ
- bool "SAMSUNG EXYNOS5250"
- depends on SOC_EXYNOS5250
- depends on ARM_EXYNOS_CPUFREQ
- default y
- help
- This adds the CPUFreq driver for Samsung EXYNOS5250
- SoC.
-
- If in doubt, say N.
-
config ARM_EXYNOS_CPU_FREQ_BOOST_SW
bool "EXYNOS Frequency Overclocking - Software"
depends on ARM_EXYNOS_CPUFREQ && THERMAL
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 032745d..6414958 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -55,7 +55,6 @@ obj-$(CONFIG_UX500_SOC_DB8500) += dbx500-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS_CPUFREQ) += arm-exynos-cpufreq.o
arm-exynos-cpufreq-y := exynos-cpufreq.o
arm-exynos-cpufreq-$(CONFIG_ARM_EXYNOS4X12_CPUFREQ) += exynos4x12-cpufreq.o
-arm-exynos-cpufreq-$(CONFIG_ARM_EXYNOS5250_CPUFREQ) += exynos5250-cpufreq.o
obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o
obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
obj-$(CONFIG_ARM_HISI_ACPU_CPUFREQ) += hisi-acpu-cpufreq.o
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index ae5b2bd..71d8891 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -175,9 +175,6 @@ static int exynos_cpufreq_probe(struct platform_device *pdev)
} else if (of_machine_is_compatible("samsung,exynos4412")) {
exynos_info->type = EXYNOS_SOC_4412;
ret = exynos4x12_cpufreq_init(exynos_info);
- } else if (of_machine_is_compatible("samsung,exynos5250")) {
- exynos_info->type = EXYNOS_SOC_5250;
- ret = exynos5250_cpufreq_init(exynos_info);
} else {
pr_err("%s: Unknown SoC type\n", __func__);
return -ENODEV;
diff --git a/drivers/cpufreq/exynos-cpufreq.h b/drivers/cpufreq/exynos-cpufreq.h
index a3855e4..a359db7 100644
--- a/drivers/cpufreq/exynos-cpufreq.h
+++ b/drivers/cpufreq/exynos-cpufreq.h
@@ -20,7 +20,6 @@ enum cpufreq_level_index {
enum exynos_soc_type {
EXYNOS_SOC_4212,
EXYNOS_SOC_4412,
- EXYNOS_SOC_5250,
};
#define APLL_FREQ(f, a0, a1, a2, a3, a4, a5, a6, a7, b0, b1, b2, m, p, s) \
@@ -60,14 +59,6 @@ static inline int exynos4x12_cpufreq_init(struct exynos_dvfs_info *info)
return -EOPNOTSUPP;
}
#endif
-#ifdef CONFIG_ARM_EXYNOS5250_CPUFREQ
-extern int exynos5250_cpufreq_init(struct exynos_dvfs_info *);
-#else
-static inline int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
-{
- return -EOPNOTSUPP;
-}
-#endif
#define EXYNOS4_CLKSRC_CPU 0x14200
#define EXYNOS4_CLKMUX_STATCPU 0x14400
@@ -79,11 +70,3 @@ static inline int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
#define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16)
#define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT)
-
-#define EXYNOS5_APLL_LOCK 0x00000
-#define EXYNOS5_APLL_CON0 0x00100
-#define EXYNOS5_CLKMUX_STATCPU 0x00400
-#define EXYNOS5_CLKDIV_CPU0 0x00500
-#define EXYNOS5_CLKDIV_CPU1 0x00504
-#define EXYNOS5_CLKDIV_STATCPU0 0x00600
-#define EXYNOS5_CLKDIV_STATCPU1 0x00604
diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
deleted file mode 100644
index 3eafdc7..0000000
--- a/drivers/cpufreq/exynos5250-cpufreq.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/*
- * Copyright (c) 2010-20122Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * EXYNOS5250 - CPU frequency scaling support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/cpufreq.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-
-#include "exynos-cpufreq.h"
-
-static struct clk *cpu_clk;
-static struct clk *moutcore;
-static struct clk *mout_mpll;
-static struct clk *mout_apll;
-static struct exynos_dvfs_info *cpufreq;
-
-static unsigned int exynos5250_volt_table[] = {
- 1300000, 1250000, 1225000, 1200000, 1150000,
- 1125000, 1100000, 1075000, 1050000, 1025000,
- 1012500, 1000000, 975000, 950000, 937500,
- 925000
-};
-
-static struct cpufreq_frequency_table exynos5250_freq_table[] = {
- {0, L0, 1700 * 1000},
- {0, L1, 1600 * 1000},
- {0, L2, 1500 * 1000},
- {0, L3, 1400 * 1000},
- {0, L4, 1300 * 1000},
- {0, L5, 1200 * 1000},
- {0, L6, 1100 * 1000},
- {0, L7, 1000 * 1000},
- {0, L8, 900 * 1000},
- {0, L9, 800 * 1000},
- {0, L10, 700 * 1000},
- {0, L11, 600 * 1000},
- {0, L12, 500 * 1000},
- {0, L13, 400 * 1000},
- {0, L14, 300 * 1000},
- {0, L15, 200 * 1000},
- {0, 0, CPUFREQ_TABLE_END},
-};
-
-static struct apll_freq apll_freq_5250[] = {
- /*
- * values:
- * freq
- * clock divider for ARM, CPUD, ACP, PERIPH, ATB, PCLK_DBG, APLL, ARM2
- * clock divider for COPY, HPM, RESERVED
- * PLL M, P, S
- */
- APLL_FREQ(1700, 0, 3, 7, 7, 7, 3, 5, 0, 0, 2, 0, 425, 6, 0),
- APLL_FREQ(1600, 0, 3, 7, 7, 7, 1, 4, 0, 0, 2, 0, 200, 3, 0),
- APLL_FREQ(1500, 0, 2, 7, 7, 7, 1, 4, 0, 0, 2, 0, 250, 4, 0),
- APLL_FREQ(1400, 0, 2, 7, 7, 6, 1, 4, 0, 0, 2, 0, 175, 3, 0),
- APLL_FREQ(1300, 0, 2, 7, 7, 6, 1, 3, 0, 0, 2, 0, 325, 6, 0),
- APLL_FREQ(1200, 0, 2, 7, 7, 5, 1, 3, 0, 0, 2, 0, 200, 4, 0),
- APLL_FREQ(1100, 0, 3, 7, 7, 5, 1, 3, 0, 0, 2, 0, 275, 6, 0),
- APLL_FREQ(1000, 0, 1, 7, 7, 4, 1, 2, 0, 0, 2, 0, 125, 3, 0),
- APLL_FREQ(900, 0, 1, 7, 7, 4, 1, 2, 0, 0, 2, 0, 150, 4, 0),
- APLL_FREQ(800, 0, 1, 7, 7, 4, 1, 2, 0, 0, 2, 0, 100, 3, 0),
- APLL_FREQ(700, 0, 1, 7, 7, 3, 1, 1, 0, 0, 2, 0, 175, 3, 1),
- APLL_FREQ(600, 0, 1, 7, 7, 3, 1, 1, 0, 0, 2, 0, 200, 4, 1),
- APLL_FREQ(500, 0, 1, 7, 7, 2, 1, 1, 0, 0, 2, 0, 125, 3, 1),
- APLL_FREQ(400, 0, 1, 7, 7, 2, 1, 1, 0, 0, 2, 0, 100, 3, 1),
- APLL_FREQ(300, 0, 1, 7, 7, 1, 1, 1, 0, 0, 2, 0, 200, 4, 2),
- APLL_FREQ(200, 0, 1, 7, 7, 1, 1, 1, 0, 0, 2, 0, 100, 3, 2),
-};
-
-static void set_clkdiv(unsigned int div_index)
-{
- unsigned int tmp;
-
- /* Change Divider - CPU0 */
-
- tmp = apll_freq_5250[div_index].clk_div_cpu0;
-
- __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU0);
-
- while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU0)
- & 0x11111111)
- cpu_relax();
-
- /* Change Divider - CPU1 */
- tmp = apll_freq_5250[div_index].clk_div_cpu1;
-
- __raw_writel(tmp, cpufreq->cmu_regs + EXYNOS5_CLKDIV_CPU1);
-
- while (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKDIV_STATCPU1) & 0x11)
- cpu_relax();
-}
-
-static void set_apll(unsigned int index)
-{
- unsigned int tmp;
- unsigned int freq = apll_freq_5250[index].freq;
-
- /* MUX_CORE_SEL = MPLL, ARMCLK uses MPLL for lock time */
- clk_set_parent(moutcore, mout_mpll);
-
- do {
- cpu_relax();
- tmp = (__raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU)
- >> 16);
- tmp &= 0x7;
- } while (tmp != 0x2);
-
- clk_set_rate(mout_apll, freq * 1000);
-
- /* MUX_CORE_SEL = APLL */
- clk_set_parent(moutcore, mout_apll);
-
- do {
- cpu_relax();
- tmp = __raw_readl(cpufreq->cmu_regs + EXYNOS5_CLKMUX_STATCPU);
- tmp &= (0x7 << 16);
- } while (tmp != (0x1 << 16));
-}
-
-static void exynos5250_set_frequency(unsigned int old_index,
- unsigned int new_index)
-{
- if (old_index > new_index) {
- set_clkdiv(new_index);
- set_apll(new_index);
- } else if (old_index < new_index) {
- set_apll(new_index);
- set_clkdiv(new_index);
- }
-}
-
-int exynos5250_cpufreq_init(struct exynos_dvfs_info *info)
-{
- struct device_node *np;
- unsigned long rate;
-
- /*
- * HACK: This is a temporary workaround to get access to clock
- * controller registers directly and remove static mappings and
- * dependencies on platform headers. It is necessary to enable
- * Exynos multi-platform support and will be removed together with
- * this whole driver as soon as Exynos gets migrated to use
- * cpufreq-dt driver.
- */
- np = of_find_compatible_node(NULL, NULL, "samsung,exynos5250-clock");
- if (!np) {
- pr_err("%s: failed to find clock controller DT node\n",
- __func__);
- return -ENODEV;
- }
-
- info->cmu_regs = of_iomap(np, 0);
- if (!info->cmu_regs) {
- pr_err("%s: failed to map CMU registers\n", __func__);
- return -EFAULT;
- }
-
- cpu_clk = clk_get(NULL, "armclk");
- if (IS_ERR(cpu_clk))
- return PTR_ERR(cpu_clk);
-
- moutcore = clk_get(NULL, "mout_cpu");
- if (IS_ERR(moutcore))
- goto err_moutcore;
-
- mout_mpll = clk_get(NULL, "mout_mpll");
- if (IS_ERR(mout_mpll))
- goto err_mout_mpll;
-
- rate = clk_get_rate(mout_mpll) / 1000;
-
- mout_apll = clk_get(NULL, "mout_apll");
- if (IS_ERR(mout_apll))
- goto err_mout_apll;
-
- info->mpll_freq_khz = rate;
- /* 800Mhz */
- info->pll_safe_idx = L9;
- info->cpu_clk = cpu_clk;
- info->volt_table = exynos5250_volt_table;
- info->freq_table = exynos5250_freq_table;
- info->set_freq = exynos5250_set_frequency;
-
- cpufreq = info;
-
- return 0;
-
-err_mout_apll:
- clk_put(mout_mpll);
-err_mout_mpll:
- clk_put(moutcore);
-err_moutcore:
- clk_put(cpu_clk);
-
- pr_err("%s: failed initialization\n", __func__);
- return -EINVAL;
-}
--
1.9.1
On 01.07.2015 22:10, Bartlomiej Zolnierkiewicz wrote:
> From: Thomas Abraham <[email protected]>
>
> For Exynos5250 platforms, add CPU operating points and CPU
> regulator supply properties for migrating from Exynos specific
> cpufreq driver to using generic cpufreq driver.
>
> Changes by Bartlomiej:
> - split Exynos5250 support from the original patch
> - added CPU regulator supply property for Google Spring board
> - put the new cpu nodes in alphabetical order
>
> Cc: Kukjin Kim <[email protected]>
> Cc: Doug Anderson <[email protected]>
> Cc: Javier Martinez Canillas <[email protected]>
> Cc: Andreas Faerber <[email protected]>
> Signed-off-by: Thomas Abraham <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> arch/arm/boot/dts/exynos5250-arndale.dts | 4 ++++
> arch/arm/boot/dts/exynos5250-smdk5250.dts | 4 ++++
> arch/arm/boot/dts/exynos5250-snow.dts | 4 ++++
> arch/arm/boot/dts/exynos5250-spring.dts | 4 ++++
> arch/arm/boot/dts/exynos5250.dtsi | 22 ++++++++++++++++++++++
> 5 files changed, 38 insertions(+)
Looks good, thanks!
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
Hello Bartlomiej,
On Wed, Jul 1, 2015 at 3:10 PM, Bartlomiej Zolnierkiewicz
<[email protected]> wrote:
> From: Thomas Abraham <[email protected]>
>
> With the addition of the new Samsung specific cpu-clock type, the
> arm clock can be represented as a cpu-clock type. Add the CPU clock
> configuration data and instantiate the CPU clock type for Exynos5250.
>
> Changes by Bartlomiej:
> - split Exynos5250 support from the original patch
> - moved E5250_CPU_DIV[0,1]() macros to clk-exynos5250.c
>
> Cc: Tomasz Figa <[email protected]>
> Cc: Michael Turquette <[email protected]>
> Cc: Javier Martinez Canillas <[email protected]>
> Signed-off-by: Thomas Abraham <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/clk/samsung/clk-exynos5250.c | 31 +++++++++++++++++++++++++++++++
> include/dt-bindings/clock/exynos5250.h | 1 +
> 2 files changed, 32 insertions(+)
Reviewed-by: Javier Martinez Canillas <[email protected]>
and on an Exynos5250 Snow Chromebook:
Tested-by: Javier Martinez Canillas <[email protected]>
Best regards,
Javier
On Thu, Jul 2, 2015 at 1:53 AM, Krzysztof Kozlowski
<[email protected]> wrote:
> On 01.07.2015 22:10, Bartlomiej Zolnierkiewicz wrote:
>> From: Thomas Abraham <[email protected]>
>>
>> For Exynos5250 platforms, add CPU operating points and CPU
>> regulator supply properties for migrating from Exynos specific
>> cpufreq driver to using generic cpufreq driver.
>>
>> Changes by Bartlomiej:
>> - split Exynos5250 support from the original patch
>> - added CPU regulator supply property for Google Spring board
>> - put the new cpu nodes in alphabetical order
>>
>> Cc: Kukjin Kim <[email protected]>
>> Cc: Doug Anderson <[email protected]>
>> Cc: Javier Martinez Canillas <[email protected]>
>> Cc: Andreas Faerber <[email protected]>
>> Signed-off-by: Thomas Abraham <[email protected]>
>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>> ---
>> arch/arm/boot/dts/exynos5250-arndale.dts | 4 ++++
>> arch/arm/boot/dts/exynos5250-smdk5250.dts | 4 ++++
>> arch/arm/boot/dts/exynos5250-snow.dts | 4 ++++
>> arch/arm/boot/dts/exynos5250-spring.dts | 4 ++++
>> arch/arm/boot/dts/exynos5250.dtsi | 22 ++++++++++++++++++++++
>> 5 files changed, 38 insertions(+)
>
> Looks good, thanks!
>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
>
Reviewed-by: Javier Martinez Canillas <[email protected]>
and on an Exynos5250 Snow Chromebook:
Tested-by: Javier Martinez Canillas <[email protected]>
Best regards,
Javier
On Wed, Jul 1, 2015 at 3:10 PM, Bartlomiej Zolnierkiewicz
<[email protected]> wrote:
> From: Thomas Abraham <[email protected]>
>
> The new CPU clock type allows the use of generic CPUfreq driver.
> Switch Exynos5250 to using generic cpufreq driver.
>
> Changes by Bartlomiej:
> - split Exynos5250 support from the original patch
>
> Cc: Tomasz Figa <[email protected]>
> Cc: Kukjin Kim <[email protected]>
> Cc: Javier Martinez Canillas <[email protected]>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> Signed-off-by: Thomas Abraham <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> arch/arm/mach-exynos/exynos.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
> index 5f8ddcd..4015ec3 100644
> --- a/arch/arm/mach-exynos/exynos.c
> +++ b/arch/arm/mach-exynos/exynos.c
> @@ -226,6 +226,7 @@ static void __init exynos_init_irq(void)
>
> static const struct of_device_id exynos_cpufreq_matches[] = {
> { .compatible = "samsung,exynos4210", .data = "cpufreq-dt" },
> + { .compatible = "samsung,exynos5250", .data = "cpufreq-dt" },
> { /* sentinel */ }
> };
Reviewed-by: Javier Martinez Canillas <[email protected]>
and on an Exynos5250 Snow Chromebook:
Tested-by: Javier Martinez Canillas <[email protected]>
Best regards,
Javier
Hello Bartlomiej,
On Wed, Jul 1, 2015 at 3:10 PM, Bartlomiej Zolnierkiewicz
<[email protected]> wrote:
> Exynos5250 based platforms have switched over to use generic
> cpufreq driver for cpufreq functionality. So the Exynos
> specific cpufreq support for these platforms can be removed.
>
> Based on the earlier work by Thomas Abraham.
>
> Cc: Viresh Kumar <[email protected]>
> Cc: Javier Martinez Canillas <[email protected]>
> Cc: Thomas Abraham <[email protected]>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> drivers/cpufreq/Kconfig.arm | 11 --
> drivers/cpufreq/Makefile | 1 -
> drivers/cpufreq/exynos-cpufreq.c | 3 -
> drivers/cpufreq/exynos-cpufreq.h | 17 ---
> drivers/cpufreq/exynos5250-cpufreq.c | 210 -----------------------------------
> 5 files changed, 242 deletions(-)
> delete mode 100644 drivers/cpufreq/exynos5250-cpufreq.c
>
Reviewed-by: Javier Martinez Canillas <[email protected]>
I also tested and on an Exynos5250 Snow Chromebook with
exynos_defconfig + CONFIG_CPUFREQ_DT + CONFIG_CPU_FREQ_GOV_*, using
different governors and see that the cpu0 and cpu1 frequencies are
scaled and that the total number of CPU frequency transitions in
total_trans are incremented.
Tested-by: Javier Martinez Canillas <[email protected]>
Best regards,
Javier
On 01-07-15, 15:10, Bartlomiej Zolnierkiewicz wrote:
> This patch series removes the use of Exynos5250 specific support
> from cpufreq-exynos driver and enables the use of cpufreq-dt driver
> for this platform.
>
> This patch series has been tested on Exynos5250 based Arndale board.
>
> Changes since v1 (http://lkml.org/lkml/2015/4/13/611):
> - rebased on top of next-20150629 branch of linux-next kernel tree
> - dropped dependency on "[PATCH 0/6] cpufreq: use generic cpufreq
> drivers for Exynos4x12 platform" patch series as it needs more
> work (Viresh has requested porting of cpufreq-dt's boost mode
> support over opp-v2 patches)
>
> Changes since v2 (http://lkml.org/lkml/2015/6/29/361):
> - put the new cpu nodes in alphabetical order
> - updated Javier's and Mike's e-mail adresses
> - removed Cc: tag with stale Sachin's e-mail adress
> - added Reviewed-by: tag from Krzysztof to patches #3 and #4
Acked-by: Viresh Kumar <[email protected]>
--
viresh
On 07/01/2015 10:10 PM, Bartlomiej Zolnierkiewicz wrote:
> From: Thomas Abraham<[email protected]>
>
> With the addition of the new Samsung specific cpu-clock type, the
> arm clock can be represented as a cpu-clock type. Add the CPU clock
> configuration data and instantiate the CPU clock type for Exynos5250.
>
> Changes by Bartlomiej:
> - split Exynos5250 support from the original patch
> - moved E5250_CPU_DIV[0,1]() macros to clk-exynos5250.c
>
> Cc: Tomasz Figa<[email protected]>
> Cc: Michael Turquette<[email protected]>
> Cc: Javier Martinez Canillas<[email protected]>
> Signed-off-by: Thomas Abraham<[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz<[email protected]>
Acked-by: Sylwester Nawrocki <[email protected]>
On 01.07.2015 22:10, Bartlomiej Zolnierkiewicz wrote:
> From: Thomas Abraham <[email protected]>
>
> For Exynos5250 platforms, add CPU operating points and CPU
> regulator supply properties for migrating from Exynos specific
> cpufreq driver to using generic cpufreq driver.
>
> Changes by Bartlomiej:
> - split Exynos5250 support from the original patch
> - added CPU regulator supply property for Google Spring board
> - put the new cpu nodes in alphabetical order
>
> Cc: Kukjin Kim <[email protected]>
> Cc: Doug Anderson <[email protected]>
> Cc: Javier Martinez Canillas <[email protected]>
> Cc: Andreas Faerber <[email protected]>
> Signed-off-by: Thomas Abraham <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
> ---
> arch/arm/boot/dts/exynos5250-arndale.dts | 4 ++++
> arch/arm/boot/dts/exynos5250-smdk5250.dts | 4 ++++
> arch/arm/boot/dts/exynos5250-snow.dts | 4 ++++
> arch/arm/boot/dts/exynos5250-spring.dts | 4 ++++
> arch/arm/boot/dts/exynos5250.dtsi | 22 ++++++++++++++++++++++
> 5 files changed, 38 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
> index 7e728a1..db3f65f 100644
> --- a/arch/arm/boot/dts/exynos5250-arndale.dts
> +++ b/arch/arm/boot/dts/exynos5250-arndale.dts
> @@ -117,6 +117,10 @@
> };
> };
>
> +&cpu0 {
> + cpu0-supply = <&buck2_reg>;
> +};
> +
> &dp {
> status = "okay";
> samsung,color-space = <0>;
> diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
> index 4fe186d..15aea76 100644
> --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
> +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
> @@ -74,6 +74,10 @@
> };
> };
>
> +&cpu0 {
> + cpu0-supply = <&buck2_reg>;
> +};
> +
> &dp {
> samsung,color-space = <0>;
> samsung,dynamic-range = <0>;
> diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
> index b7f4122..a4133df 100644
> --- a/arch/arm/boot/dts/exynos5250-snow.dts
> +++ b/arch/arm/boot/dts/exynos5250-snow.dts
> @@ -235,6 +235,10 @@
> };
> };
>
> +&cpu0 {
> + cpu0-supply = <&buck2_reg>;
> +};
> +
> &dp {
> status = "okay";
> pinctrl-names = "default";
> diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts
> index d03f9b8..c1edd6d 100644
> --- a/arch/arm/boot/dts/exynos5250-spring.dts
> +++ b/arch/arm/boot/dts/exynos5250-spring.dts
> @@ -65,6 +65,10 @@
> };
> };
>
> +&cpu0 {
> + cpu0-supply = <&buck2_reg>;
> +};
> +
> &dp {
> status = "okay";
> pinctrl-names = "default";
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index bf9bee6..0c7ef12 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -63,6 +63,28 @@
> compatible = "arm,cortex-a15";
> reg = <0>;
> clock-frequency = <1700000000>;
> + clocks = <&clock CLK_ARM_CLK>;
> + clock-names = "cpu";
> + clock-latency = <140000>;
> +
> + operating-points = <
> + 1700000 1300000
> + 1600000 1250000
> + 1500000 1225000
> + 1400000 1200000
> + 1300000 1150000
> + 1200000 1125000
> + 1100000 1100000
> + 1000000 1075000
> + 900000 1050000
> + 800000 1025000
> + 700000 1012500
> + 600000 1000000
> + 500000 975000
> + 400000 950000
> + 300000 937500
> + 200000 925000
> + >;
> cooling-min-level = <15>;
> cooling-max-level = <9>;
> #cooling-cells = <2>; /* min followed by max */
>
I see you have all necessary acks so this can go through samsung-soc. I
started applying everything. Patch 4/4 does not apply cleanly but this
was easy to solve (I think it is better to rebase on Linus tree not on
next in such case; subsystems cannot apply easily something depending on
next).
Unfortunately this patch (2/4) has build errors:
DTC arch/arm/boot/dts/exynos5250-arndale.dtb
Error: ../arch/arm/boot/dts/exynos5250.dtsi:65.21-22 syntax error
FATAL ERROR: Unable to parse input tree
make[2]: *** [arch/arm/boot/dts/exynos5250-arndale.dtb] Error 1
make[1]: *** [dtbs] Error 2
make[1]: *** Waiting for unfinished jobs....
make[1]: Leaving directory `/home/kozik/dev/linux/krzk/out'
make: *** [sub-make] Error 2
Fail: Make error
I tried to apply this patch on my dt-for-next branch:
https://github.com/krzk/linux/commits/dt-for-next
I hold back other patches until this is clarified.
Best regards,
Krzysztof
On 16.07.2015 10:34, Krzysztof Kozlowski wrote:
> On 01.07.2015 22:10, Bartlomiej Zolnierkiewicz wrote:
>> From: Thomas Abraham <[email protected]>
>>
>> For Exynos5250 platforms, add CPU operating points and CPU
>> regulator supply properties for migrating from Exynos specific
>> cpufreq driver to using generic cpufreq driver.
>>
>> Changes by Bartlomiej:
>> - split Exynos5250 support from the original patch
>> - added CPU regulator supply property for Google Spring board
>> - put the new cpu nodes in alphabetical order
>>
>> Cc: Kukjin Kim <[email protected]>
>> Cc: Doug Anderson <[email protected]>
>> Cc: Javier Martinez Canillas <[email protected]>
>> Cc: Andreas Faerber <[email protected]>
>> Signed-off-by: Thomas Abraham <[email protected]>
>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>> ---
>> arch/arm/boot/dts/exynos5250-arndale.dts | 4 ++++
>> arch/arm/boot/dts/exynos5250-smdk5250.dts | 4 ++++
>> arch/arm/boot/dts/exynos5250-snow.dts | 4 ++++
>> arch/arm/boot/dts/exynos5250-spring.dts | 4 ++++
>> arch/arm/boot/dts/exynos5250.dtsi | 22 ++++++++++++++++++++++
>> 5 files changed, 38 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
>> index 7e728a1..db3f65f 100644
>> --- a/arch/arm/boot/dts/exynos5250-arndale.dts
>> +++ b/arch/arm/boot/dts/exynos5250-arndale.dts
>> @@ -117,6 +117,10 @@
>> };
>> };
>>
>> +&cpu0 {
>> + cpu0-supply = <&buck2_reg>;
>> +};
>> +
>> &dp {
>> status = "okay";
>> samsung,color-space = <0>;
>> diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> index 4fe186d..15aea76 100644
>> --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> @@ -74,6 +74,10 @@
>> };
>> };
>>
>> +&cpu0 {
>> + cpu0-supply = <&buck2_reg>;
>> +};
>> +
>> &dp {
>> samsung,color-space = <0>;
>> samsung,dynamic-range = <0>;
>> diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
>> index b7f4122..a4133df 100644
>> --- a/arch/arm/boot/dts/exynos5250-snow.dts
>> +++ b/arch/arm/boot/dts/exynos5250-snow.dts
>> @@ -235,6 +235,10 @@
>> };
>> };
>>
>> +&cpu0 {
>> + cpu0-supply = <&buck2_reg>;
>> +};
>> +
>> &dp {
>> status = "okay";
>> pinctrl-names = "default";
>> diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts
>> index d03f9b8..c1edd6d 100644
>> --- a/arch/arm/boot/dts/exynos5250-spring.dts
>> +++ b/arch/arm/boot/dts/exynos5250-spring.dts
>> @@ -65,6 +65,10 @@
>> };
>> };
>>
>> +&cpu0 {
>> + cpu0-supply = <&buck2_reg>;
>> +};
>> +
>> &dp {
>> status = "okay";
>> pinctrl-names = "default";
>> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
>> index bf9bee6..0c7ef12 100644
>> --- a/arch/arm/boot/dts/exynos5250.dtsi
>> +++ b/arch/arm/boot/dts/exynos5250.dtsi
>> @@ -63,6 +63,28 @@
>> compatible = "arm,cortex-a15";
>> reg = <0>;
>> clock-frequency = <1700000000>;
>> + clocks = <&clock CLK_ARM_CLK>;
>> + clock-names = "cpu";
>> + clock-latency = <140000>;
>> +
>> + operating-points = <
>> + 1700000 1300000
>> + 1600000 1250000
>> + 1500000 1225000
>> + 1400000 1200000
>> + 1300000 1150000
>> + 1200000 1125000
>> + 1100000 1100000
>> + 1000000 1075000
>> + 900000 1050000
>> + 800000 1025000
>> + 700000 1012500
>> + 600000 1000000
>> + 500000 975000
>> + 400000 950000
>> + 300000 937500
>> + 200000 925000
>> + >;
>> cooling-min-level = <15>;
>> cooling-max-level = <9>;
>> #cooling-cells = <2>; /* min followed by max */
>>
>
>
> I see you have all necessary acks so this can go through samsung-soc. I
> started applying everything. Patch 4/4 does not apply cleanly but this
> was easy to solve (I think it is better to rebase on Linus tree not on
> next in such case; subsystems cannot apply easily something depending on
> next).
>
> Unfortunately this patch (2/4) has build errors:
>
> DTC arch/arm/boot/dts/exynos5250-arndale.dtb
> Error: ../arch/arm/boot/dts/exynos5250.dtsi:65.21-22 syntax error
> FATAL ERROR: Unable to parse input tree
> make[2]: *** [arch/arm/boot/dts/exynos5250-arndale.dtb] Error 1
> make[1]: *** [dtbs] Error 2
> make[1]: *** Waiting for unfinished jobs....
> make[1]: Leaving directory `/home/kozik/dev/linux/krzk/out'
> make: *** [sub-make] Error 2
> Fail: Make error
>
> I tried to apply this patch on my dt-for-next branch:
> https://github.com/krzk/linux/commits/dt-for-next
>
> I hold back other patches until this is clarified.
Stupid me, it should not be split into separate branches as it depends
on clock id from headers.
Everything is fine, I applied patchset with respective tags (Javier's
reviewed/tested, Sylwester's and Viresh's acks). I'll send later to
Kukjin for v4.3 unless he picks it also.
Best regards,
Krzysztof
Quoting Bartlomiej Zolnierkiewicz (2015-07-01 06:10:35)
> From: Thomas Abraham <[email protected]>
>
> With the addition of the new Samsung specific cpu-clock type, the
> arm clock can be represented as a cpu-clock type. Add the CPU clock
> configuration data and instantiate the CPU clock type for Exynos5250.
>
> Changes by Bartlomiej:
> - split Exynos5250 support from the original patch
> - moved E5250_CPU_DIV[0,1]() macros to clk-exynos5250.c
>
> Cc: Tomasz Figa <[email protected]>
> Cc: Michael Turquette <[email protected]>
> Cc: Javier Martinez Canillas <[email protected]>
> Signed-off-by: Thomas Abraham <[email protected]>
> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
Acked-by: Michael Turquette <[email protected]>
If Kukjin wants to merge this through the samsung tree then an immutable
branch would be much appreciated.
Regards,
Mike
> ---
> drivers/clk/samsung/clk-exynos5250.c | 31 +++++++++++++++++++++++++++++++
> include/dt-bindings/clock/exynos5250.h | 1 +
> 2 files changed, 32 insertions(+)
>
> diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
> index 70ec3d2..d87f34d 100644
> --- a/drivers/clk/samsung/clk-exynos5250.c
> +++ b/drivers/clk/samsung/clk-exynos5250.c
> @@ -19,6 +19,7 @@
> #include <linux/syscore_ops.h>
>
> #include "clk.h"
> +#include "clk-cpu.h"
>
> #define APLL_LOCK 0x0
> #define APLL_CON0 0x100
> @@ -748,6 +749,32 @@ static struct samsung_pll_clock exynos5250_plls[nr_plls] __initdata = {
> VPLL_LOCK, VPLL_CON0, NULL),
> };
>
> +#define E5250_CPU_DIV0(apll, pclk_dbg, atb, periph, acp, cpud) \
> + ((((apll) << 24) | ((pclk_dbg) << 20) | ((atb) << 16) | \
> + ((periph) << 12) | ((acp) << 8) | ((cpud) << 4)))
> +#define E5250_CPU_DIV1(hpm, copy) \
> + (((hpm) << 4) | (copy))
> +
> +static const struct exynos_cpuclk_cfg_data exynos5250_armclk_d[] __initconst = {
> + { 1700000, E5250_CPU_DIV0(5, 3, 7, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
> + { 1600000, E5250_CPU_DIV0(4, 1, 7, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
> + { 1500000, E5250_CPU_DIV0(4, 1, 7, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
> + { 1400000, E5250_CPU_DIV0(4, 1, 6, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
> + { 1300000, E5250_CPU_DIV0(3, 1, 6, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
> + { 1200000, E5250_CPU_DIV0(3, 1, 5, 7, 7, 2), E5250_CPU_DIV1(2, 0), },
> + { 1100000, E5250_CPU_DIV0(3, 1, 5, 7, 7, 3), E5250_CPU_DIV1(2, 0), },
> + { 1000000, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
> + { 900000, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
> + { 800000, E5250_CPU_DIV0(2, 1, 4, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
> + { 700000, E5250_CPU_DIV0(1, 1, 3, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
> + { 600000, E5250_CPU_DIV0(1, 1, 3, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
> + { 500000, E5250_CPU_DIV0(1, 1, 2, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
> + { 400000, E5250_CPU_DIV0(1, 1, 2, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
> + { 300000, E5250_CPU_DIV0(1, 1, 1, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
> + { 200000, E5250_CPU_DIV0(1, 1, 1, 7, 7, 1), E5250_CPU_DIV1(2, 0), },
> + { 0 },
> +};
> +
> static const struct of_device_id ext_clk_match[] __initconst = {
> { .compatible = "samsung,clock-xxti", .data = (void *)0, },
> { },
> @@ -797,6 +824,10 @@ static void __init exynos5250_clk_init(struct device_node *np)
> ARRAY_SIZE(exynos5250_div_clks));
> samsung_clk_register_gate(ctx, exynos5250_gate_clks,
> ARRAY_SIZE(exynos5250_gate_clks));
> + exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk",
> + mout_cpu_p[0], mout_cpu_p[1], 0x200,
> + exynos5250_armclk_d, ARRAY_SIZE(exynos5250_armclk_d),
> + CLK_CPU_HAS_DIV1);
>
> /*
> * Enable arm clock down (in idle) and set arm divider
> diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h
> index 4273891d..8183d1c 100644
> --- a/include/dt-bindings/clock/exynos5250.h
> +++ b/include/dt-bindings/clock/exynos5250.h
> @@ -21,6 +21,7 @@
> #define CLK_FOUT_CPLL 6
> #define CLK_FOUT_EPLL 7
> #define CLK_FOUT_VPLL 8
> +#define CLK_ARM_CLK 9
>
> /* gate for special clocks (sclk) */
> #define CLK_SCLK_CAM_BAYER 128
> --
> 1.9.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-pm" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
On 07/24/15 09:39, Michael Turquette wrote:
> Quoting Bartlomiej Zolnierkiewicz (2015-07-01 06:10:35)
>> From: Thomas Abraham <[email protected]>
>>
>> With the addition of the new Samsung specific cpu-clock type, the
>> arm clock can be represented as a cpu-clock type. Add the CPU clock
>> configuration data and instantiate the CPU clock type for Exynos5250.
>>
>> Changes by Bartlomiej:
>> - split Exynos5250 support from the original patch
>> - moved E5250_CPU_DIV[0,1]() macros to clk-exynos5250.c
>>
>> Cc: Tomasz Figa <[email protected]>
>> Cc: Michael Turquette <[email protected]>
>> Cc: Javier Martinez Canillas <[email protected]>
>> Signed-off-by: Thomas Abraham <[email protected]>
>> Signed-off-by: Bartlomiej Zolnierkiewicz <[email protected]>
>
> Acked-by: Michael Turquette <[email protected]>
>
Thanks, Mike.
> If Kukjin wants to merge this through the samsung tree then an immutable
> branch would be much appreciated.
>
Here is the topic branch for clk tree and it will not be rebased.
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
v4.3-topic/clk-samsung
If any problems, please kindly let me know.
Thanks,
Kukjin
> Regards,
> Mike
>
>> ---
>> drivers/clk/samsung/clk-exynos5250.c | 31 +++++++++++++++++++++++++++++++
>> include/dt-bindings/clock/exynos5250.h | 1 +
>> 2 files changed, 32 insertions(+)