2015-08-24 09:40:12

by Gabriel Fernandez

[permalink] [raw]
Subject: [PATCH 1/1] ARM: DT: STi: STiH418: Fix mmc0 clock configuration

This patch configure correctly the MMC-0 clock for STiH418 platform.

Signed-off-by: Gabriel Fernandez <[email protected]>
---
arch/arm/boot/dts/stih418-b2199.dts | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/stih418-b2199.dts b/arch/arm/boot/dts/stih418-b2199.dts
index 82eee39..7a03ca6 100644
--- a/arch/arm/boot/dts/stih418-b2199.dts
+++ b/arch/arm/boot/dts/stih418-b2199.dts
@@ -85,6 +85,10 @@
sd-uhs-sdr50;
sd-uhs-sdr104;
sd-uhs-ddr50;
+
+ assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
+ assigned-clock-parents = <&clk_s_c0_pll1 0>;
+ assigned-clock-rates = <200000000>;
};

miphy28lp_phy: miphy28lp@9b22000 {
--
1.9.1


2015-08-24 09:54:24

by Maxime Coquelin

[permalink] [raw]
Subject: Re: [PATCH 1/1] ARM: DT: STi: STiH418: Fix mmc0 clock configuration

Hi Gabriel,

On 08/24/2015 11:40 AM, Gabriel Fernandez wrote:
> This patch configure correctly the MMC-0 clock for STiH418 platform.
>
> Signed-off-by: Gabriel Fernandez <[email protected]>
> ---
> arch/arm/boot/dts/stih418-b2199.dts | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stih418-b2199.dts b/arch/arm/boot/dts/stih418-b2199.dts
> index 82eee39..7a03ca6 100644
> --- a/arch/arm/boot/dts/stih418-b2199.dts
> +++ b/arch/arm/boot/dts/stih418-b2199.dts
> @@ -85,6 +85,10 @@
> sd-uhs-sdr50;
> sd-uhs-sdr104;
> sd-uhs-ddr50;
> +
> + assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
> + assigned-clock-parents = <&clk_s_c0_pll1 0>;
> + assigned-clock-rates = <200000000>;

Thanks for the fix, but I would rather define the parent and rate in the
SoC dtsi file, i.e. stih418.dtsi.
If you agree to change, you can add:
Acked-by: Maxime Coquelin <[email protected]>

Thanks!
Maxime