2015-07-07 08:43:23

by Chunyan Zhang

[permalink] [raw]
Subject: [PATCH 0/5] coresight: Support context-ID tracing when PID namespace is enabled

The Coresight ETM drivers already support context-ID tracing, but it won't
work when PID namespace is enabled. This is because when using PID
namespace a process id (ie. VPID) seen from the current namespace differs
from the id (ie. PID) seen by kernel.

This patch-set does add a translation between VPID and PID.

Chunyan Zhang (5):
coresight-etm3x: Change the name of the ctxid_val to ctxid_pid
coresight-etm4x: Change the name of the ctxid_val to ctxid_pid
Coresight: Add an interface for supporting ETM3/4 Context ID tracing
coresight-etm3x: Support context-ID tracing when PID namespace is
enabled
coresight-etm4x: Support context-ID tracing when PID namespace is
enabled

.../ABI/testing/sysfs-bus-coresight-devices-etm3x | 2 +-
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 2 +-
drivers/hwtracing/coresight/coresight-etm.h | 7 ++--
drivers/hwtracing/coresight/coresight-etm3x.c | 28 +++++++++-------
drivers/hwtracing/coresight/coresight-etm4x.c | 37 ++++++++++++++--------
drivers/hwtracing/coresight/coresight-etm4x.h | 7 ++--
include/linux/coresight.h | 20 ++++++++++++
7 files changed, 72 insertions(+), 31 deletions(-)

--
1.9.1


2015-07-07 08:44:33

by Chunyan Zhang

[permalink] [raw]
Subject: [PATCH 1/5] coresight-etm3x: Change the name of the ctxid_val to ctxid_pid

'ctxid_val' array was used to store the value of ETM context ID comparator
which actually stores the process ID to be traced, so using 'ctxid_pid' as
its name instead make it easier to understand.

This patch also changes the ABI, it is normally not allowed, but
fortunately it is a testing ABI and very new for now. Nevertheless,
if you don't think it should be changed, we could always add an alias
for userspace.

Signed-off-by: Chunyan Zhang <[email protected]>
Reviewed-by: Mark Brown <[email protected]>
---
.../ABI/testing/sysfs-bus-coresight-devices-etm3x | 2 +-
drivers/hwtracing/coresight/coresight-etm.h | 4 ++--
drivers/hwtracing/coresight/coresight-etm3x.c | 16 ++++++++--------
3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
index b4d0b99..d72ca17 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x
@@ -112,7 +112,7 @@ KernelVersion: 3.19
Contact: Mathieu Poirier <[email protected]>
Description: (RW) Mask to apply to all the context ID comparator.

-What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/ctxid_val
+What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/ctxid_pid
Date: November 2014
KernelVersion: 3.19
Contact: Mathieu Poirier <[email protected]>
diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h
index 098ffbe..52af5f0 100644
--- a/drivers/hwtracing/coresight/coresight-etm.h
+++ b/drivers/hwtracing/coresight/coresight-etm.h
@@ -183,7 +183,7 @@
* @seq_13_event: event causing the transition from 1 to 3.
* @seq_curr_state: current value of the sequencer register.
* @ctxid_idx: index for the context ID registers.
- * @ctxid_val: value for the context ID to trigger on.
+ * @ctxid_pid: value for the context ID to trigger on.
* @ctxid_mask: mask applicable to all the context IDs.
* @sync_freq: Synchronisation frequency.
* @timestamp_event: Defines an event that requests the insertion
@@ -235,7 +235,7 @@ struct etm_drvdata {
u32 seq_13_event;
u32 seq_curr_state;
u8 ctxid_idx;
- u32 ctxid_val[ETM_MAX_CTXID_CMP];
+ u32 ctxid_pid[ETM_MAX_CTXID_CMP];
u32 ctxid_mask;
u32 sync_freq;
u32 timestamp_event;
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index 018a00f..cfda302 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -238,7 +238,7 @@ static void etm_set_default(struct etm_drvdata *drvdata)
drvdata->seq_curr_state = 0x0;
drvdata->ctxid_idx = 0x0;
for (i = 0; i < drvdata->nr_ctxid_cmp; i++)
- drvdata->ctxid_val[i] = 0x0;
+ drvdata->ctxid_pid[i] = 0x0;
drvdata->ctxid_mask = 0x0;
}

@@ -289,7 +289,7 @@ static void etm_enable_hw(void *info)
for (i = 0; i < drvdata->nr_ext_out; i++)
etm_writel(drvdata, ETM_DEFAULT_EVENT_VAL, ETMEXTOUTEVRn(i));
for (i = 0; i < drvdata->nr_ctxid_cmp; i++)
- etm_writel(drvdata, drvdata->ctxid_val[i], ETMCIDCVRn(i));
+ etm_writel(drvdata, drvdata->ctxid_pid[i], ETMCIDCVRn(i));
etm_writel(drvdata, drvdata->ctxid_mask, ETMCIDCMR);
etm_writel(drvdata, drvdata->sync_freq, ETMSYNCFR);
/* No external input selected */
@@ -1386,20 +1386,20 @@ static ssize_t ctxid_idx_store(struct device *dev,
}
static DEVICE_ATTR_RW(ctxid_idx);

-static ssize_t ctxid_val_show(struct device *dev,
+static ssize_t ctxid_pid_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
unsigned long val;
struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);

spin_lock(&drvdata->spinlock);
- val = drvdata->ctxid_val[drvdata->ctxid_idx];
+ val = drvdata->ctxid_pid[drvdata->ctxid_idx];
spin_unlock(&drvdata->spinlock);

return sprintf(buf, "%#lx\n", val);
}

-static ssize_t ctxid_val_store(struct device *dev,
+static ssize_t ctxid_pid_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t size)
{
@@ -1412,12 +1412,12 @@ static ssize_t ctxid_val_store(struct device *dev,
return ret;

spin_lock(&drvdata->spinlock);
- drvdata->ctxid_val[drvdata->ctxid_idx] = val;
+ drvdata->ctxid_pid[drvdata->ctxid_idx] = val;
spin_unlock(&drvdata->spinlock);

return size;
}
-static DEVICE_ATTR_RW(ctxid_val);
+static DEVICE_ATTR_RW(ctxid_pid);

static ssize_t ctxid_mask_show(struct device *dev,
struct device_attribute *attr, char *buf)
@@ -1609,7 +1609,7 @@ static struct attribute *coresight_etm_attrs[] = {
&dev_attr_seq_13_event.attr,
&dev_attr_seq_curr_state.attr,
&dev_attr_ctxid_idx.attr,
- &dev_attr_ctxid_val.attr,
+ &dev_attr_ctxid_pid.attr,
&dev_attr_ctxid_mask.attr,
&dev_attr_sync_freq.attr,
&dev_attr_timestamp_event.attr,
--
1.9.1

2015-07-07 08:43:35

by Chunyan Zhang

[permalink] [raw]
Subject: [PATCH 2/5] coresight-etm4x: Change the name of the ctxid_val to ctxid_pid

'ctxid_val' array was used to store the value of ETM context ID comparator
which actually stores the process ID to be traced, so using 'ctxid_pid' as
its name instead make it easier to understand.

This patch also changes the ABI, it is normally not allowed, but
fortunately it is a testing ABI and very new for now. Nevertheless,
if you don't think it should be changed, we could always add an alias
for userspace.

Signed-off-by: Chunyan Zhang <[email protected]>
Reviewed-by: Mark Brown <[email protected]>
---
.../ABI/testing/sysfs-bus-coresight-devices-etm4x | 2 +-
drivers/hwtracing/coresight/coresight-etm4x.c | 20 ++++++++++----------
drivers/hwtracing/coresight/coresight-etm4x.h | 4 ++--
3 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
index 2fe2e3d..2355ed8 100644
--- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
+++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
@@ -249,7 +249,7 @@ KernelVersion: 4.01
Contact: Mathieu Poirier <[email protected]>
Description: (RW) Select which context ID comparator to work with.

-What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_val
+What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_pid
Date: April 2015
KernelVersion: 4.01
Contact: Mathieu Poirier <[email protected]>
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 1312e99..9afbda5 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -155,7 +155,7 @@ static void etm4_enable_hw(void *info)
drvdata->base + TRCACATRn(i));
}
for (i = 0; i < drvdata->numcidc; i++)
- writeq_relaxed(drvdata->ctxid_val[i],
+ writeq_relaxed(drvdata->ctxid_pid[i],
drvdata->base + TRCCIDCVRn(i));
writel_relaxed(drvdata->ctxid_mask0, drvdata->base + TRCCIDCCTLR0);
writel_relaxed(drvdata->ctxid_mask1, drvdata->base + TRCCIDCCTLR1);
@@ -507,7 +507,7 @@ static ssize_t reset_store(struct device *dev,

drvdata->ctxid_idx = 0x0;
for (i = 0; i < drvdata->numcidc; i++)
- drvdata->ctxid_val[i] = 0x0;
+ drvdata->ctxid_pid[i] = 0x0;
drvdata->ctxid_mask0 = 0x0;
drvdata->ctxid_mask1 = 0x0;

@@ -1815,7 +1815,7 @@ static ssize_t ctxid_idx_store(struct device *dev,
}
static DEVICE_ATTR_RW(ctxid_idx);

-static ssize_t ctxid_val_show(struct device *dev,
+static ssize_t ctxid_pid_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
@@ -1825,12 +1825,12 @@ static ssize_t ctxid_val_show(struct device *dev,

spin_lock(&drvdata->spinlock);
idx = drvdata->ctxid_idx;
- val = (unsigned long)drvdata->ctxid_val[idx];
+ val = (unsigned long)drvdata->ctxid_pid[idx];
spin_unlock(&drvdata->spinlock);
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
}

-static ssize_t ctxid_val_store(struct device *dev,
+static ssize_t ctxid_pid_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t size)
{
@@ -1850,11 +1850,11 @@ static ssize_t ctxid_val_store(struct device *dev,

spin_lock(&drvdata->spinlock);
idx = drvdata->ctxid_idx;
- drvdata->ctxid_val[idx] = (u64)val;
+ drvdata->ctxid_pid[idx] = (u64)val;
spin_unlock(&drvdata->spinlock);
return size;
}
-static DEVICE_ATTR_RW(ctxid_val);
+static DEVICE_ATTR_RW(ctxid_pid);

static ssize_t ctxid_masks_show(struct device *dev,
struct device_attribute *attr,
@@ -1949,7 +1949,7 @@ static ssize_t ctxid_masks_store(struct device *dev,
*/
for (j = 0; j < 8; j++) {
if (maskbyte & 1)
- drvdata->ctxid_val[i] &= ~(0xFF << (j * 8));
+ drvdata->ctxid_pid[i] &= ~(0xFF << (j * 8));
maskbyte >>= 1;
}
/* Select the next ctxid comparator mask value */
@@ -2193,7 +2193,7 @@ static struct attribute *coresight_etmv4_attrs[] = {
&dev_attr_res_idx.attr,
&dev_attr_res_ctrl.attr,
&dev_attr_ctxid_idx.attr,
- &dev_attr_ctxid_val.attr,
+ &dev_attr_ctxid_pid.attr,
&dev_attr_ctxid_masks.attr,
&dev_attr_vmid_idx.attr,
&dev_attr_vmid_val.attr,
@@ -2514,7 +2514,7 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
}

for (i = 0; i < drvdata->numcidc; i++)
- drvdata->ctxid_val[i] = 0x0;
+ drvdata->ctxid_pid[i] = 0x0;
drvdata->ctxid_mask0 = 0x0;
drvdata->ctxid_mask1 = 0x0;

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
index e08e983..1e8fb36 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.h
+++ b/drivers/hwtracing/coresight/coresight-etm4x.h
@@ -265,7 +265,7 @@
* @addr_type: Current status of the comparator register.
* @ctxid_idx: Context ID index selector.
* @ctxid_size: Size of the context ID field to consider.
- * @ctxid_val: Value of the context ID comparator.
+ * @ctxid_pid: Value of the context ID comparator.
* @ctxid_mask0:Context ID comparator mask for comparator 0-3.
* @ctxid_mask1:Context ID comparator mask for comparator 4-7.
* @vmid_idx: VM ID index selector.
@@ -352,7 +352,7 @@ struct etmv4_drvdata {
u8 addr_type[ETM_MAX_SINGLE_ADDR_CMP];
u8 ctxid_idx;
u8 ctxid_size;
- u64 ctxid_val[ETMv4_MAX_CTXID_CMP];
+ u64 ctxid_pid[ETMv4_MAX_CTXID_CMP];
u32 ctxid_mask0;
u32 ctxid_mask1;
u8 vmid_idx;
--
1.9.1

2015-07-07 08:44:22

by Chunyan Zhang

[permalink] [raw]
Subject: [PATCH 3/5] Coresight: Add an interface for supporting ETM3/4 Context ID tracing

If PID namespace is enabled, everytime users configure the Context ID
register to trace the specific process, there needs to be a translation
between the real PID seen from the kernel and VPID seen from the
namespace in which the user's process resides .

This patch just adds the translation interface for ETMs.

Signed-off-by: Chunyan Zhang <[email protected]>
---
include/linux/coresight.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)

diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 3486b90..626da69 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -248,4 +248,24 @@ static inline struct coresight_platform_data *of_get_coresight_platform_data(
struct device *dev, struct device_node *node) { return NULL; }
#endif

+#ifdef CONFIG_PID_NS
+static inline unsigned long
+coresight_vpid_to_pid(unsigned long vpid)
+{
+ struct task_struct *task = NULL;
+ unsigned long pid = 0;
+
+ rcu_read_lock();
+ task = find_task_by_vpid(vpid);
+ if (task)
+ pid = task_pid_nr(task);
+ rcu_read_unlock();
+
+ return pid;
+}
+#else
+static inline unsigned long
+coresight_vpid_to_pid(unsigned long vpid) { return vpid; }
+#endif
+
#endif
--
1.9.1

2015-07-07 08:43:58

by Chunyan Zhang

[permalink] [raw]
Subject: [PATCH 4/5] coresight-etm3x: Support context-ID tracing when PID namespace is enabled

The Coresight ETM drivers already support context-ID tracing, but it won't
work when PID namespace is enabled. This is because when using PID
namespace a process id (ie. VPID) seen from the current namespace differs
from the id (ie. PID) seen by kernel.

So when users write the process id seen by themselves to ETM, there needs
to be a translation from VPID to PID, as such ETM drivers will write the
PID into the Context ID register correctly.

Signed-off-by: Chunyan Zhang <[email protected]>
---
drivers/hwtracing/coresight/coresight-etm.h | 3 +++
drivers/hwtracing/coresight/coresight-etm3x.c | 16 +++++++++++-----
2 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm.h b/drivers/hwtracing/coresight/coresight-etm.h
index 52af5f0..b4481eb 100644
--- a/drivers/hwtracing/coresight/coresight-etm.h
+++ b/drivers/hwtracing/coresight/coresight-etm.h
@@ -184,6 +184,8 @@
* @seq_curr_state: current value of the sequencer register.
* @ctxid_idx: index for the context ID registers.
* @ctxid_pid: value for the context ID to trigger on.
+ * @ctxid_vpid: Virtual PID seen by users if PID namespace is enabled, otherwise
+ * the same value of ctxid_pid.
* @ctxid_mask: mask applicable to all the context IDs.
* @sync_freq: Synchronisation frequency.
* @timestamp_event: Defines an event that requests the insertion
@@ -236,6 +238,7 @@ struct etm_drvdata {
u32 seq_curr_state;
u8 ctxid_idx;
u32 ctxid_pid[ETM_MAX_CTXID_CMP];
+ u32 ctxid_vpid[ETM_MAX_CTXID_CMP];
u32 ctxid_mask;
u32 sync_freq;
u32 timestamp_event;
diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index cfda302..996f083 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -237,8 +237,11 @@ static void etm_set_default(struct etm_drvdata *drvdata)

drvdata->seq_curr_state = 0x0;
drvdata->ctxid_idx = 0x0;
- for (i = 0; i < drvdata->nr_ctxid_cmp; i++)
+ for (i = 0; i < drvdata->nr_ctxid_cmp; i++) {
drvdata->ctxid_pid[i] = 0x0;
+ drvdata->ctxid_vpid[i] = 0x0;
+ }
+
drvdata->ctxid_mask = 0x0;
}

@@ -1393,7 +1396,7 @@ static ssize_t ctxid_pid_show(struct device *dev,
struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);

spin_lock(&drvdata->spinlock);
- val = drvdata->ctxid_pid[drvdata->ctxid_idx];
+ val = drvdata->ctxid_vpid[drvdata->ctxid_idx];
spin_unlock(&drvdata->spinlock);

return sprintf(buf, "%#lx\n", val);
@@ -1404,15 +1407,18 @@ static ssize_t ctxid_pid_store(struct device *dev,
const char *buf, size_t size)
{
int ret;
- unsigned long val;
+ unsigned long vpid, pid;
struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);

- ret = kstrtoul(buf, 16, &val);
+ ret = kstrtoul(buf, 16, &vpid);
if (ret)
return ret;

+ pid = coresight_vpid_to_pid(vpid);
+
spin_lock(&drvdata->spinlock);
- drvdata->ctxid_pid[drvdata->ctxid_idx] = val;
+ drvdata->ctxid_pid[drvdata->ctxid_idx] = pid;
+ drvdata->ctxid_vpid[drvdata->ctxid_idx] = vpid;
spin_unlock(&drvdata->spinlock);

return size;
--
1.9.1

2015-07-07 08:43:48

by Chunyan Zhang

[permalink] [raw]
Subject: [PATCH 5/5] coresight-etm4x: Support context-ID tracing when PID namespace is enabled

Like ETTv3, ETMv4 also needs the similar modifications to support Context
ID tracing when PID namespace is enabled.

Signed-off-by: Chunyan Zhang <[email protected]>
---
drivers/hwtracing/coresight/coresight-etm4x.c | 21 +++++++++++++++------
drivers/hwtracing/coresight/coresight-etm4x.h | 3 +++
2 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 9afbda5..254a81a 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -506,8 +506,11 @@ static ssize_t reset_store(struct device *dev,
}

drvdata->ctxid_idx = 0x0;
- for (i = 0; i < drvdata->numcidc; i++)
+ for (i = 0; i < drvdata->numcidc; i++) {
drvdata->ctxid_pid[i] = 0x0;
+ drvdata->ctxid_vpid[i] = 0x0;
+ }
+
drvdata->ctxid_mask0 = 0x0;
drvdata->ctxid_mask1 = 0x0;

@@ -1825,7 +1828,7 @@ static ssize_t ctxid_pid_show(struct device *dev,

spin_lock(&drvdata->spinlock);
idx = drvdata->ctxid_idx;
- val = (unsigned long)drvdata->ctxid_pid[idx];
+ val = (unsigned long)drvdata->ctxid_vpid[idx];
spin_unlock(&drvdata->spinlock);
return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
}
@@ -1835,7 +1838,7 @@ static ssize_t ctxid_pid_store(struct device *dev,
const char *buf, size_t size)
{
u8 idx;
- unsigned long val;
+ unsigned long vpid, pid;
struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);

/*
@@ -1845,12 +1848,15 @@ static ssize_t ctxid_pid_store(struct device *dev,
*/
if (!drvdata->ctxid_size || !drvdata->numcidc)
return -EINVAL;
- if (kstrtoul(buf, 16, &val))
+ if (kstrtoul(buf, 16, &vpid))
return -EINVAL;

+ pid = coresight_vpid_to_pid(vpid);
+
spin_lock(&drvdata->spinlock);
idx = drvdata->ctxid_idx;
- drvdata->ctxid_pid[idx] = (u64)val;
+ drvdata->ctxid_pid[idx] = (u64)pid;
+ drvdata->ctxid_vpid[idx] = (u64)vpid;
spin_unlock(&drvdata->spinlock);
return size;
}
@@ -2513,8 +2519,11 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
drvdata->addr_type[1] = ETM_ADDR_TYPE_RANGE;
}

- for (i = 0; i < drvdata->numcidc; i++)
+ for (i = 0; i < drvdata->numcidc; i++) {
drvdata->ctxid_pid[i] = 0x0;
+ drvdata->ctxid_vpid[i] = 0x0;
+ }
+
drvdata->ctxid_mask0 = 0x0;
drvdata->ctxid_mask1 = 0x0;

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
index 1e8fb36..c341002 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x.h
+++ b/drivers/hwtracing/coresight/coresight-etm4x.h
@@ -266,6 +266,8 @@
* @ctxid_idx: Context ID index selector.
* @ctxid_size: Size of the context ID field to consider.
* @ctxid_pid: Value of the context ID comparator.
+ * @ctxid_vpid: Virtual PID seen by users if PID namespace is enabled, otherwise
+ * the same value of ctxid_pid.
* @ctxid_mask0:Context ID comparator mask for comparator 0-3.
* @ctxid_mask1:Context ID comparator mask for comparator 4-7.
* @vmid_idx: VM ID index selector.
@@ -353,6 +355,7 @@ struct etmv4_drvdata {
u8 ctxid_idx;
u8 ctxid_size;
u64 ctxid_pid[ETMv4_MAX_CTXID_CMP];
+ u64 ctxid_vpid[ETMv4_MAX_CTXID_CMP];
u32 ctxid_mask0;
u32 ctxid_mask1;
u8 vmid_idx;
--
1.9.1

2015-07-13 17:26:14

by Mathieu Poirier

[permalink] [raw]
Subject: Re: [PATCH 0/5] coresight: Support context-ID tracing when PID namespace is enabled

On 7 July 2015 at 02:41, Chunyan Zhang <[email protected]> wrote:
> The Coresight ETM drivers already support context-ID tracing, but it won't
> work when PID namespace is enabled. This is because when using PID
> namespace a process id (ie. VPID) seen from the current namespace differs
> from the id (ie. PID) seen by kernel.
>
> This patch-set does add a translation between VPID and PID.
>
> Chunyan Zhang (5):
> coresight-etm3x: Change the name of the ctxid_val to ctxid_pid
> coresight-etm4x: Change the name of the ctxid_val to ctxid_pid
> Coresight: Add an interface for supporting ETM3/4 Context ID tracing
> coresight-etm3x: Support context-ID tracing when PID namespace is
> enabled
> coresight-etm4x: Support context-ID tracing when PID namespace is
> enabled
>
> .../ABI/testing/sysfs-bus-coresight-devices-etm3x | 2 +-
> .../ABI/testing/sysfs-bus-coresight-devices-etm4x | 2 +-
> drivers/hwtracing/coresight/coresight-etm.h | 7 ++--
> drivers/hwtracing/coresight/coresight-etm3x.c | 28 +++++++++-------
> drivers/hwtracing/coresight/coresight-etm4x.c | 37 ++++++++++++++--------
> drivers/hwtracing/coresight/coresight-etm4x.h | 7 ++--
> include/linux/coresight.h | 20 ++++++++++++
> 7 files changed, 72 insertions(+), 31 deletions(-)
>
> --
> 1.9.1
>

Applied - thanks.

2015-08-26 17:57:27

by Christopher Covington

[permalink] [raw]
Subject: Re: [PATCH 2/5] coresight-etm4x: Change the name of the ctxid_val to ctxid_pid

On 07/07/2015 04:41 AM, Chunyan Zhang wrote:
> 'ctxid_val' array was used to store the value of ETM context ID comparator
> which actually stores the process ID to be traced, so using 'ctxid_pid' as
> its name instead make it easier to understand.

Previous discussion with some ARM folks has led me to believe there isn't a
guarantee that the Context ID Register will always have a PID. Why not allow
filtering on thread group ID, session ID, cgroup related identifiers, etc.?

> This patch also changes the ABI, it is normally not allowed, but
> fortunately it is a testing ABI and very new for now. Nevertheless,
> if you don't think it should be changed, we could always add an alias
> for userspace.
>
> Signed-off-by: Chunyan Zhang <[email protected]>
> Reviewed-by: Mark Brown <[email protected]>
> ---
> .../ABI/testing/sysfs-bus-coresight-devices-etm4x | 2 +-
> drivers/hwtracing/coresight/coresight-etm4x.c | 20 ++++++++++----------
> drivers/hwtracing/coresight/coresight-etm4x.h | 4 ++--
> 3 files changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
> index 2fe2e3d..2355ed8 100644
> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
> @@ -249,7 +249,7 @@ KernelVersion: 4.01
> Contact: Mathieu Poirier <[email protected]>
> Description: (RW) Select which context ID comparator to work with.
>
> -What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_val
> +What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_pid
> Date: April 2015
> KernelVersion: 4.01
> Contact: Mathieu Poirier <[email protected]>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
> index 1312e99..9afbda5 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x.c
> @@ -155,7 +155,7 @@ static void etm4_enable_hw(void *info)
> drvdata->base + TRCACATRn(i));
> }
> for (i = 0; i < drvdata->numcidc; i++)
> - writeq_relaxed(drvdata->ctxid_val[i],
> + writeq_relaxed(drvdata->ctxid_pid[i],
> drvdata->base + TRCCIDCVRn(i));
> writel_relaxed(drvdata->ctxid_mask0, drvdata->base + TRCCIDCCTLR0);
> writel_relaxed(drvdata->ctxid_mask1, drvdata->base + TRCCIDCCTLR1);
> @@ -507,7 +507,7 @@ static ssize_t reset_store(struct device *dev,
>
> drvdata->ctxid_idx = 0x0;
> for (i = 0; i < drvdata->numcidc; i++)
> - drvdata->ctxid_val[i] = 0x0;
> + drvdata->ctxid_pid[i] = 0x0;
> drvdata->ctxid_mask0 = 0x0;
> drvdata->ctxid_mask1 = 0x0;
>
> @@ -1815,7 +1815,7 @@ static ssize_t ctxid_idx_store(struct device *dev,
> }
> static DEVICE_ATTR_RW(ctxid_idx);
>
> -static ssize_t ctxid_val_show(struct device *dev,
> +static ssize_t ctxid_pid_show(struct device *dev,
> struct device_attribute *attr,
> char *buf)
> {
> @@ -1825,12 +1825,12 @@ static ssize_t ctxid_val_show(struct device *dev,
>
> spin_lock(&drvdata->spinlock);
> idx = drvdata->ctxid_idx;
> - val = (unsigned long)drvdata->ctxid_val[idx];
> + val = (unsigned long)drvdata->ctxid_pid[idx];
> spin_unlock(&drvdata->spinlock);
> return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
> }
>
> -static ssize_t ctxid_val_store(struct device *dev,
> +static ssize_t ctxid_pid_store(struct device *dev,
> struct device_attribute *attr,
> const char *buf, size_t size)
> {
> @@ -1850,11 +1850,11 @@ static ssize_t ctxid_val_store(struct device *dev,
>
> spin_lock(&drvdata->spinlock);
> idx = drvdata->ctxid_idx;
> - drvdata->ctxid_val[idx] = (u64)val;
> + drvdata->ctxid_pid[idx] = (u64)val;
> spin_unlock(&drvdata->spinlock);
> return size;
> }
> -static DEVICE_ATTR_RW(ctxid_val);
> +static DEVICE_ATTR_RW(ctxid_pid);
>
> static ssize_t ctxid_masks_show(struct device *dev,
> struct device_attribute *attr,
> @@ -1949,7 +1949,7 @@ static ssize_t ctxid_masks_store(struct device *dev,
> */
> for (j = 0; j < 8; j++) {
> if (maskbyte & 1)
> - drvdata->ctxid_val[i] &= ~(0xFF << (j * 8));
> + drvdata->ctxid_pid[i] &= ~(0xFF << (j * 8));
> maskbyte >>= 1;
> }
> /* Select the next ctxid comparator mask value */
> @@ -2193,7 +2193,7 @@ static struct attribute *coresight_etmv4_attrs[] = {
> &dev_attr_res_idx.attr,
> &dev_attr_res_ctrl.attr,
> &dev_attr_ctxid_idx.attr,
> - &dev_attr_ctxid_val.attr,
> + &dev_attr_ctxid_pid.attr,
> &dev_attr_ctxid_masks.attr,
> &dev_attr_vmid_idx.attr,
> &dev_attr_vmid_val.attr,
> @@ -2514,7 +2514,7 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
> }
>
> for (i = 0; i < drvdata->numcidc; i++)
> - drvdata->ctxid_val[i] = 0x0;
> + drvdata->ctxid_pid[i] = 0x0;
> drvdata->ctxid_mask0 = 0x0;
> drvdata->ctxid_mask1 = 0x0;
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
> index e08e983..1e8fb36 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x.h
> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h
> @@ -265,7 +265,7 @@
> * @addr_type: Current status of the comparator register.
> * @ctxid_idx: Context ID index selector.
> * @ctxid_size: Size of the context ID field to consider.
> - * @ctxid_val: Value of the context ID comparator.
> + * @ctxid_pid: Value of the context ID comparator.
> * @ctxid_mask0:Context ID comparator mask for comparator 0-3.
> * @ctxid_mask1:Context ID comparator mask for comparator 4-7.
> * @vmid_idx: VM ID index selector.
> @@ -352,7 +352,7 @@ struct etmv4_drvdata {
> u8 addr_type[ETM_MAX_SINGLE_ADDR_CMP];
> u8 ctxid_idx;
> u8 ctxid_size;
> - u64 ctxid_val[ETMv4_MAX_CTXID_CMP];
> + u64 ctxid_pid[ETMv4_MAX_CTXID_CMP];
> u32 ctxid_mask0;
> u32 ctxid_mask1;
> u8 vmid_idx;
>


--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

2015-08-27 15:12:20

by Mathieu Poirier

[permalink] [raw]
Subject: Re: [PATCH 2/5] coresight-etm4x: Change the name of the ctxid_val to ctxid_pid

On 26 August 2015 at 11:57, Christopher Covington <[email protected]> wrote:
> On 07/07/2015 04:41 AM, Chunyan Zhang wrote:
>> 'ctxid_val' array was used to store the value of ETM context ID comparator
>> which actually stores the process ID to be traced, so using 'ctxid_pid' as
>> its name instead make it easier to understand.
>
> Previous discussion with some ARM folks has led me to believe there isn't a
> guarantee that the Context ID Register will always have a PID. Why not allow
> filtering on thread group ID, session ID, cgroup related identifiers, etc.?

Coresight tracers only support contextID tracing. The HW
automatically does the match between the contextID comparator register
in the tracer with the contextID register of the core. Tracing is
enabled if both values match (and the tracer is configured to do so).

>
>> This patch also changes the ABI, it is normally not allowed, but
>> fortunately it is a testing ABI and very new for now. Nevertheless,
>> if you don't think it should be changed, we could always add an alias
>> for userspace.
>>
>> Signed-off-by: Chunyan Zhang <[email protected]>
>> Reviewed-by: Mark Brown <[email protected]>
>> ---
>> .../ABI/testing/sysfs-bus-coresight-devices-etm4x | 2 +-
>> drivers/hwtracing/coresight/coresight-etm4x.c | 20 ++++++++++----------
>> drivers/hwtracing/coresight/coresight-etm4x.h | 4 ++--
>> 3 files changed, 13 insertions(+), 13 deletions(-)
>>
>> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
>> index 2fe2e3d..2355ed8 100644
>> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
>> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x
>> @@ -249,7 +249,7 @@ KernelVersion: 4.01
>> Contact: Mathieu Poirier <[email protected]>
>> Description: (RW) Select which context ID comparator to work with.
>>
>> -What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_val
>> +What: /sys/bus/coresight/devices/<memory_map>.etm/ctxid_pid
>> Date: April 2015
>> KernelVersion: 4.01
>> Contact: Mathieu Poirier <[email protected]>
>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
>> index 1312e99..9afbda5 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm4x.c
>> +++ b/drivers/hwtracing/coresight/coresight-etm4x.c
>> @@ -155,7 +155,7 @@ static void etm4_enable_hw(void *info)
>> drvdata->base + TRCACATRn(i));
>> }
>> for (i = 0; i < drvdata->numcidc; i++)
>> - writeq_relaxed(drvdata->ctxid_val[i],
>> + writeq_relaxed(drvdata->ctxid_pid[i],
>> drvdata->base + TRCCIDCVRn(i));
>> writel_relaxed(drvdata->ctxid_mask0, drvdata->base + TRCCIDCCTLR0);
>> writel_relaxed(drvdata->ctxid_mask1, drvdata->base + TRCCIDCCTLR1);
>> @@ -507,7 +507,7 @@ static ssize_t reset_store(struct device *dev,
>>
>> drvdata->ctxid_idx = 0x0;
>> for (i = 0; i < drvdata->numcidc; i++)
>> - drvdata->ctxid_val[i] = 0x0;
>> + drvdata->ctxid_pid[i] = 0x0;
>> drvdata->ctxid_mask0 = 0x0;
>> drvdata->ctxid_mask1 = 0x0;
>>
>> @@ -1815,7 +1815,7 @@ static ssize_t ctxid_idx_store(struct device *dev,
>> }
>> static DEVICE_ATTR_RW(ctxid_idx);
>>
>> -static ssize_t ctxid_val_show(struct device *dev,
>> +static ssize_t ctxid_pid_show(struct device *dev,
>> struct device_attribute *attr,
>> char *buf)
>> {
>> @@ -1825,12 +1825,12 @@ static ssize_t ctxid_val_show(struct device *dev,
>>
>> spin_lock(&drvdata->spinlock);
>> idx = drvdata->ctxid_idx;
>> - val = (unsigned long)drvdata->ctxid_val[idx];
>> + val = (unsigned long)drvdata->ctxid_pid[idx];
>> spin_unlock(&drvdata->spinlock);
>> return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
>> }
>>
>> -static ssize_t ctxid_val_store(struct device *dev,
>> +static ssize_t ctxid_pid_store(struct device *dev,
>> struct device_attribute *attr,
>> const char *buf, size_t size)
>> {
>> @@ -1850,11 +1850,11 @@ static ssize_t ctxid_val_store(struct device *dev,
>>
>> spin_lock(&drvdata->spinlock);
>> idx = drvdata->ctxid_idx;
>> - drvdata->ctxid_val[idx] = (u64)val;
>> + drvdata->ctxid_pid[idx] = (u64)val;
>> spin_unlock(&drvdata->spinlock);
>> return size;
>> }
>> -static DEVICE_ATTR_RW(ctxid_val);
>> +static DEVICE_ATTR_RW(ctxid_pid);
>>
>> static ssize_t ctxid_masks_show(struct device *dev,
>> struct device_attribute *attr,
>> @@ -1949,7 +1949,7 @@ static ssize_t ctxid_masks_store(struct device *dev,
>> */
>> for (j = 0; j < 8; j++) {
>> if (maskbyte & 1)
>> - drvdata->ctxid_val[i] &= ~(0xFF << (j * 8));
>> + drvdata->ctxid_pid[i] &= ~(0xFF << (j * 8));
>> maskbyte >>= 1;
>> }
>> /* Select the next ctxid comparator mask value */
>> @@ -2193,7 +2193,7 @@ static struct attribute *coresight_etmv4_attrs[] = {
>> &dev_attr_res_idx.attr,
>> &dev_attr_res_ctrl.attr,
>> &dev_attr_ctxid_idx.attr,
>> - &dev_attr_ctxid_val.attr,
>> + &dev_attr_ctxid_pid.attr,
>> &dev_attr_ctxid_masks.attr,
>> &dev_attr_vmid_idx.attr,
>> &dev_attr_vmid_val.attr,
>> @@ -2514,7 +2514,7 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata)
>> }
>>
>> for (i = 0; i < drvdata->numcidc; i++)
>> - drvdata->ctxid_val[i] = 0x0;
>> + drvdata->ctxid_pid[i] = 0x0;
>> drvdata->ctxid_mask0 = 0x0;
>> drvdata->ctxid_mask1 = 0x0;
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
>> index e08e983..1e8fb36 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm4x.h
>> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h
>> @@ -265,7 +265,7 @@
>> * @addr_type: Current status of the comparator register.
>> * @ctxid_idx: Context ID index selector.
>> * @ctxid_size: Size of the context ID field to consider.
>> - * @ctxid_val: Value of the context ID comparator.
>> + * @ctxid_pid: Value of the context ID comparator.
>> * @ctxid_mask0:Context ID comparator mask for comparator 0-3.
>> * @ctxid_mask1:Context ID comparator mask for comparator 4-7.
>> * @vmid_idx: VM ID index selector.
>> @@ -352,7 +352,7 @@ struct etmv4_drvdata {
>> u8 addr_type[ETM_MAX_SINGLE_ADDR_CMP];
>> u8 ctxid_idx;
>> u8 ctxid_size;
>> - u64 ctxid_val[ETMv4_MAX_CTXID_CMP];
>> + u64 ctxid_pid[ETMv4_MAX_CTXID_CMP];
>> u32 ctxid_mask0;
>> u32 ctxid_mask1;
>> u8 vmid_idx;
>>
>
>
> --
> Qualcomm Innovation Center, Inc.
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project

2015-08-27 15:33:17

by Christopher Covington

[permalink] [raw]
Subject: Re: [PATCH 2/5] coresight-etm4x: Change the name of the ctxid_val to ctxid_pid

On 08/27/2015 11:12 AM, Mathieu Poirier wrote:
> On 26 August 2015 at 11:57, Christopher Covington <[email protected]> wrote:
>> On 07/07/2015 04:41 AM, Chunyan Zhang wrote:
>>> 'ctxid_val' array was used to store the value of ETM context ID comparator
>>> which actually stores the process ID to be traced, so using 'ctxid_pid' as
>>> its name instead make it easier to understand.
>>
>> Previous discussion with some ARM folks has led me to believe there isn't a
>> guarantee that the Context ID Register will always have a PID. Why not allow
>> filtering on thread group ID, session ID, cgroup related identifiers, etc.?
>
> Coresight tracers only support contextID tracing. The HW
> automatically does the match between the contextID comparator register
> in the tracer with the contextID register of the core. Tracing is
> enabled if both values match (and the tracer is configured to do so).

Is there a reason to only ever allow Process IDs to be written into the
Coresight and CPU Context ID registers? Is there anything in the hardware that
would prevent writing, for example, Thread Group IDs into the Coresight and
CPU Context ID registers? If there's no hardware limitation, why should there
be kernel or device tree architecture that states or implies that patches to
support such a use case are unacceptable?

Thanks,
Christopher Covington

--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

2015-08-27 15:54:11

by Mathieu Poirier

[permalink] [raw]
Subject: Re: [PATCH 2/5] coresight-etm4x: Change the name of the ctxid_val to ctxid_pid

On 27 August 2015 at 09:33, Christopher Covington <[email protected]> wrote:
> On 08/27/2015 11:12 AM, Mathieu Poirier wrote:
>> On 26 August 2015 at 11:57, Christopher Covington <[email protected]> wrote:
>>> On 07/07/2015 04:41 AM, Chunyan Zhang wrote:
>>>> 'ctxid_val' array was used to store the value of ETM context ID comparator
>>>> which actually stores the process ID to be traced, so using 'ctxid_pid' as
>>>> its name instead make it easier to understand.
>>>
>>> Previous discussion with some ARM folks has led me to believe there isn't a
>>> guarantee that the Context ID Register will always have a PID. Why not allow
>>> filtering on thread group ID, session ID, cgroup related identifiers, etc.?
>>
>> Coresight tracers only support contextID tracing. The HW
>> automatically does the match between the contextID comparator register
>> in the tracer with the contextID register of the core. Tracing is
>> enabled if both values match (and the tracer is configured to do so).
>
> Is there a reason to only ever allow Process IDs to be written into the
> Coresight and CPU Context ID registers? Is there anything in the hardware that
> would prevent writing, for example, Thread Group IDs into the Coresight and
> CPU Context ID registers? If there's no hardware limitation, why should there
> be kernel or device tree architecture that states or implies that patches to
> support such a use case are unacceptable?

I'm not saying your idea is unacceptable - I actually think there is
value in it. At this time the scheduler will automatically write the
PID to the contextID register when a task is running, a reality this
feature is exploiting.

There is no limitation as to what can be written to the coresight
contextID register - tracing will start for as long as the values and
mask are configured properly. I do not know the limitation imposed on
the core's contextID register (if any). We'd also have to make sure
that all the code, everywhere, relying on that information has been
modified to take into account the new semantic.

>
> Thanks,
> Christopher Covington
>
> --
> Qualcomm Innovation Center, Inc.
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project