From: Dasnavis Sabiya <[email protected]>
Hi All,
This series adds support for the below interfaces on AM69-SK platform:
- CAN support on both MCU and MAIN domains
- OSPI NOR flash support
Dasnavis Sabiya (2):
arm64: dts: ti: k3-am69-sk: Enable CAN interfaces for AM69 SK board
arm64: dts: ti: k3-am69-sk: Add support for OSPI flash
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 166 ++++++++++++++++++++++++++
1 file changed, 166 insertions(+)
--
2.34.1
From: Dasnavis Sabiya <[email protected]>
AM69 SK board has several CAN bus interfaces on both MCU and MAIN domains.
This enables the CAN interfaces on MCU and MAIN domain.
Signed-off-by: Dasnavis Sabiya <[email protected]>
---
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 85 +++++++++++++++++++++++++++
1 file changed, 85 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index 370980eb59b0..feb571a5a0f5 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -29,6 +29,10 @@ aliases {
i2c0 = &wkup_i2c0;
i2c3 = &main_i2c0;
ethernet0 = &mcu_cpsw_port1;
+ can0 = &mcu_mcan0;
+ can1 = &mcu_mcan1;
+ can2 = &main_mcan6;
+ can3 = &main_mcan7;
};
memory@80000000 {
@@ -321,6 +325,31 @@ tfp410_out: endpoint {
};
};
};
+
+ transceiver1: can-phy0 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ };
+
+ transceiver2: can-phy1 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ };
+
+ transceiver3: can-phy2 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ };
+
+ transceiver4: can-phy3 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ };
+
};
&main_pmx0 {
@@ -429,6 +458,20 @@ hdmi_hpd_pins_default: hdmi-hpd-default-pins {
J784S4_IOPAD(0x000, PIN_INPUT, 7) /* (AN35) EXTINTN.GPIO0_0 */
>;
};
+
+ main_mcan6_pins_default: main-mcan6-default-pins {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x098, PIN_INPUT, 0) /* (AH36) MCAN6_RX */
+ J784S4_IOPAD(0x094, PIN_OUTPUT, 0) /* (AG35) MCAN6_TX */
+ >;
+ };
+
+ main_mcan7_pins_default: main-mcan7-default-pins {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x0A0, PIN_INPUT, 0) /* (AD34) MCAN7_RX */
+ J784S4_IOPAD(0x09C, PIN_OUTPUT, 0) /* (AF35) MCAN7_TX */
+ >;
+ };
};
&wkup_pmx2 {
@@ -525,6 +568,20 @@ hdmi_pdn_pins_default: hdmi-pdn-default-pins {
J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 7) /* (H37) WKUP_GPIO0_14 */
>;
};
+
+ mcu_mcan0_pins_default: mcu-mcan0-default-pins {
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */
+ J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */
+ >;
+ };
+
+ mcu_mcan1_pins_default: mcu-mcan1-default-pins {
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (K36) WKUP_GPIO0_5.MCU_MCAN1_RX */
+ J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0)/* (H35) WKUP_GPIO0_4.MCU_MCAN1_TX */
+ >;
+ };
};
&wkup_pmx3 {
@@ -988,3 +1045,31 @@ dp0_out: endpoint {
};
};
};
+
+&mcu_mcan0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mcan0_pins_default>;
+ phys = <&transceiver1>;
+};
+
+&mcu_mcan1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mcan1_pins_default>;
+ phys = <&transceiver2>;
+};
+
+&main_mcan6 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mcan6_pins_default>;
+ phys = <&transceiver3>;
+};
+
+&main_mcan7 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mcan7_pins_default>;
+ phys = <&transceiver4>;
+};
--
2.34.1
On 1/18/2024 9:05 PM, [email protected] wrote:
> From: Dasnavis Sabiya <[email protected]>
>
> AM69 SK board has several CAN bus interfaces on both MCU and MAIN domains.
> This enables the CAN interfaces on MCU and MAIN domain.
>
> Signed-off-by: Dasnavis Sabiya <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-am69-sk.dts | 85 +++++++++++++++++++++++++++
> 1 file changed, 85 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> index 370980eb59b0..feb571a5a0f5 100644
> --- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
> @@ -29,6 +29,10 @@ aliases {
> i2c0 = &wkup_i2c0;
> i2c3 = &main_i2c0;
> ethernet0 = &mcu_cpsw_port1;
> + can0 = &mcu_mcan0;
> + can1 = &mcu_mcan1;
> + can2 = &main_mcan6;
> + can3 = &main_mcan7;
AFAIK, can sub system does not support aliasing.
IMO, you can remove these.
> };
>
> memory@80000000 {
> @@ -321,6 +325,31 @@ tfp410_out: endpoint {
> };
> };
> };
> +
> + transceiver1: can-phy0 {
> + compatible = "ti,tcan1042";
> + #phy-cells = <0>;
> + max-bitrate = <5000000>;
> + };
> +
> + transceiver2: can-phy1 {
> + compatible = "ti,tcan1042";
> + #phy-cells = <0>;
> + max-bitrate = <5000000>;
> + };
> +
> + transceiver3: can-phy2 {
> + compatible = "ti,tcan1042";
> + #phy-cells = <0>;
> + max-bitrate = <5000000>;
> + };
> +
> + transceiver4: can-phy3 {
> + compatible = "ti,tcan1042";
> + #phy-cells = <0>;
> + max-bitrate = <5000000>;
> + };
> +
> };
>
> &main_pmx0 {
> @@ -429,6 +458,20 @@ hdmi_hpd_pins_default: hdmi-hpd-default-pins {
> J784S4_IOPAD(0x000, PIN_INPUT, 7) /* (AN35) EXTINTN.GPIO0_0 */
> >;
> };
> +
> + main_mcan6_pins_default: main-mcan6-default-pins {
> + pinctrl-single,pins = <
> + J784S4_IOPAD(0x098, PIN_INPUT, 0) /* (AH36) MCAN6_RX */
> + J784S4_IOPAD(0x094, PIN_OUTPUT, 0) /* (AG35) MCAN6_TX */
> + >;
> + };
> +
> + main_mcan7_pins_default: main-mcan7-default-pins {
> + pinctrl-single,pins = <
> + J784S4_IOPAD(0x0A0, PIN_INPUT, 0) /* (AD34) MCAN7_RX */
> + J784S4_IOPAD(0x09C, PIN_OUTPUT, 0) /* (AF35) MCAN7_TX */
> + >;
> + };
> };
>
> &wkup_pmx2 {
> @@ -525,6 +568,20 @@ hdmi_pdn_pins_default: hdmi-pdn-default-pins {
> J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 7) /* (H37) WKUP_GPIO0_14 */
> >;
> };
> +
> + mcu_mcan0_pins_default: mcu-mcan0-default-pins {
> + pinctrl-single,pins = <
> + J784S4_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */
> + J784S4_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */
> + >;
> + };
> +
> + mcu_mcan1_pins_default: mcu-mcan1-default-pins {
> + pinctrl-single,pins = <
> + J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (K36) WKUP_GPIO0_5.MCU_MCAN1_RX */
> + J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0)/* (H35) WKUP_GPIO0_4.MCU_MCAN1_TX */
> + >;
> + };
> };
>
> &wkup_pmx3 {
> @@ -988,3 +1045,31 @@ dp0_out: endpoint {
> };
> };
> };
> +
> +&mcu_mcan0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_mcan0_pins_default>;
> + phys = <&transceiver1>;
> +};
> +
> +&mcu_mcan1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_mcan1_pins_default>;
> + phys = <&transceiver2>;
> +};
> +
> +&main_mcan6 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_mcan6_pins_default>;
> + phys = <&transceiver3>;
> +};
> +
> +&main_mcan7 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&main_mcan7_pins_default>;
> + phys = <&transceiver4>;
> +};