Based on Kumar's new compatible types patch, add P2020 into
MPC85xx EDAC compatible lists so that EDAC can recognize
P2020 meomry controller and L2 cache controller and export
the relevant fields to sysfs.
EDAC MPC85xx DDR3 support is needed if DDR3 memory stick is
installed on a P2020DS board so that EDAC core can recognize
DDR3 memory type.
Signed-off-by: Yang Shi <[email protected]>
Acked-by: Dave Jiang <[email protected]>
Signed-off-by: Doug Thompson <[email protected]>
---
drivers/edac/mpc85xx_edac.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
Index: linux-2.6.31-rc3/drivers/edac/mpc85xx_edac.c
===================================================================
--- linux-2.6.31-rc3.orig/drivers/edac/mpc85xx_edac.c
+++ linux-2.6.31-rc3/drivers/edac/mpc85xx_edac.c
@@ -646,6 +646,7 @@ static struct of_device_id mpc85xx_l2_er
{ .compatible = "fsl,mpc8560-l2-cache-controller", },
{ .compatible = "fsl,mpc8568-l2-cache-controller", },
{ .compatible = "fsl,mpc8572-l2-cache-controller", },
+ { .compatible = "fsl,p2020-l2-cache-controller", },
{},
};
@@ -984,6 +985,7 @@ static struct of_device_id mpc85xx_mc_er
{ .compatible = "fsl,mpc8560-memory-controller", },
{ .compatible = "fsl,mpc8568-memory-controller", },
{ .compatible = "fsl,mpc8572-memory-controller", },
+ { .compatible = "fsl,p2020-memory-controller", },
{},
};
On Wed, 15 Jul 2009 11:38:49 -0600
[email protected] wrote:
> Based on Kumar's new compatible types patch, add P2020 into
> MPC85xx EDAC compatible lists so that EDAC can recognize
> P2020 meomry controller and L2 cache controller and export
> the relevant fields to sysfs.
>
> EDAC MPC85xx DDR3 support is needed if DDR3 memory stick is
> installed on a P2020DS board so that EDAC core can recognize
> DDR3 memory type.
>
> Signed-off-by: Yang Shi <[email protected]>
> Acked-by: Dave Jiang <[email protected]>
> Signed-off-by: Doug Thompson <[email protected]>
The way the first two patches were sent indicates that you were their
primary author. Was that intended?
Do you think that any/all of these should be in 2.6.31? 2.6.30.x? If
so, why?
Thanks.
--- On Wed, 7/15/09, Andrew Morton <[email protected]> wrote:
> From: Andrew Morton <[email protected]>
> Subject: Re: [PATCH 1/4] edac: mpc85xx add P2020DS support
> To: [email protected]
> Cc: [email protected], [email protected]
> Date: Wednesday, July 15, 2009, 1:40 PM
> On Wed, 15 Jul 2009 11:38:49 -0600
> [email protected]
> wrote:
>
> > Based on Kumar's new compatible types patch, add P2020
> into
> > MPC85xx EDAC compatible lists so that EDAC can
> recognize
> > P2020 meomry controller and L2 cache controller and
> export
> > the relevant fields to sysfs.
> >
> > EDAC MPC85xx DDR3 support is needed if DDR3 memory
> stick is
> > installed on a P2020DS board so that EDAC core can
> recognize
> > DDR3 memory type.
> >
> > Signed-off-by: Yang Shi <[email protected]>
> > Acked-by: Dave Jiang <[email protected]>
> > Signed-off-by: Doug Thompson <[email protected]>
>
> The way the first two patches were sent indicates that you
> were their
> primary author. Was that intended?
mmm, darn I missed that. No I am NOT the author. The first signed-off-by lines are the respective authors.
Not intended
>
> Do you think that any/all of these should be in
> 2.6.31? 2.6.30.x? If
> so, why?
The x38 fix could probably go into 2.6.31 as that addressing of the register does seem off with an ODD address and might/should cause bad data corruption at best, a fault at worst, IMHO. Maybe 2.6.30 as well
The resource fix patch probably does NOT need to go in, as the code looks to work now as is. It is just cleanup fix.
The mpc83xx patch was okay'd for queue into 2.6.32 only.
the mv64x patch is probably also for 2.6.32 since it is new addition
>
> Thanks.
>
thx
doug t