This is a series to add driver for a new Atmel Shutdown Controller. This new IP
is extensible and some features will be added later (see the TODO section).
Its extensible nature led to write a new binding so that wake-up sources can be
described easily.
Changes in v4:
- change property to debounce-delay-us so that we can use a generic property
and we can have the unit explicitly included it the name according to
Documentation/devicetree/bindings/property-units.txt.
- move to atmel,wakeup-active-high boolean property instead of a "high", "low"
string comparison.
- fix warning found by 0-day robot: large integer implicitly truncated to
unsigned type [-Woverflow]
- add entry in MAINTAINERS file
Changes in v3:
- get and use slow clock and specify its handler in binding
- add the slow clock handle as the IP uses it
- remove useless protection at the beginning of pm_power_off handler
- allow to compile it as a module
- add COMPILE_TEST directive in Kconfig
- update description in file header
Changes in v2:
- add MODULE_DEVICE_TABLE as advised by Sebastian Reichel
- review indentation and braces to correct errors pointed out by checkpatch
Nicolas Ferre (2):
ARM: dts: at91: shdwc binding: add new shutdown controller
documentation
power: reset: at91-shdwc: add new shutdown controller driver
.../devicetree/bindings/arm/atmel-at91.txt | 59 +++++
MAINTAINERS | 5 +
drivers/power/reset/Kconfig | 8 +
drivers/power/reset/Makefile | 1 +
drivers/power/reset/at91-shdwc.c | 282 +++++++++++++++++++++
5 files changed, 355 insertions(+)
create mode 100644 drivers/power/reset/at91-shdwc.c
--
2.1.3
The new shutdown controller compatible with sama5d2 has a new binding
documentation and properties.
Signed-off-by: Nicolas Ferre <[email protected]>
Cc: [email protected]
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Ian Campbell <[email protected]>
---
Changes in v4:
- change property to debounce-delay-us so that we can use a generic property
and we can have the unit explicitly included it the name according to
Documentation/devicetree/bindings/property-units.txt.
- move to atmel,wakeup-active-high boolean property instead of a "high", "low"
string comparison.
Changes in v3:
- get and use slow clock and specify its handler in binding
Changes in v2: None
.../devicetree/bindings/arm/atmel-at91.txt | 59 ++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 7fd64ec9ee1d..cfeb161cb0ae 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -147,6 +147,65 @@ Example:
clocks = <&clk32k>;
};
+SHDWC Shutdown Controller (Alternative)
+
+1) shdwc node
+
+required properties:
+- compatible: should be "atmel,sama5d2-shdwc".
+- reg: should contain registers location and length
+- clocks: phandle to input clock.
+- #address-cells: should be one. The cell is the wake-up input index.
+- #size-cells: should be zero.
+
+optional properties:
+
+- debounce-delay-us: minimum wake-up inputs debouncer period in
+ microseconds. It's usually a board-related property.
+- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
+
+The node contains child nodes for each wake-up input that the platform uses.
+
+2) input nodes
+
+Wake-up input nodes are usually described in the "board" part of the Device
+Tree. Note also that input 0 is linked to the wake-up pin and is frequently
+used.
+
+Required properties:
+- reg: should contain the wake-up input index [0 - 15].
+
+Optional properties:
+- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
+ by the child, forces the wake-up of the core power supply on a high level.
+ The default is to be active low.
+
+Example:
+
+On the SoC side:
+ shdwc@f8048010 {
+ compatible = "atmel,sama5d2-shdwc";
+ reg = <0xf8048010 0x10>;
+ clocks = <&clk32k>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ atmel,wakeup-rtc-timer;
+ };
+
+On the board side:
+ shdwc@f8048010 {
+ debounce-delay-us = <976>;
+
+ input@0 {
+ reg = <0>;
+ };
+
+ input@1 {
+ reg = <1>;
+ atmel,wakeup-active-high;
+ };
+ };
+
Special Function Registers (SFR)
Special Function Registers (SFR) manage specific aspects of the integrated
--
2.1.3
Sama5d2 SoC has a completely new shutdown controller with new features and
register layout. It thus makes sense to add a new driver for this new
peripheral.
This driver is Device Tree only and handles events from the wake-up pin and
the RTC.
As the register layout may change in the future, so some values are encoded
in a configuration structure.
Signed-off-by: Nicolas Ferre <[email protected]>
---
Changes in v4:
- fix warning found by 0-day robot: large integer implicitly truncated to
unsigned type [-Woverflow]
- move to the property debounce-delay-us
- move to atmel,wakeup-active-high boolean
- add entry in MAINTAINERS file
Changes in v3:
- add the slow clock handle as the IP uses it
- remove useless protection at the beginning of pm_power_off handler
- allow to compile it as a module
- add COMPILE_TEST directive in Kconfig
- update description in file header
Changes in v2:
- add MODULE_DEVICE_TABLE as advised by Sebastian Reichel
- review indentation and braces to correct errors pointed out by checkpatch
MAINTAINERS | 5 +
drivers/power/reset/Kconfig | 8 ++
drivers/power/reset/Makefile | 1 +
drivers/power/reset/at91-shdwc.c | 282 +++++++++++++++++++++++++++++++++++++++
4 files changed, 296 insertions(+)
create mode 100644 drivers/power/reset/at91-shdwc.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 5744af3d79ab..afac65c0d68c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1999,6 +1999,11 @@ M: Nicolas Ferre <[email protected]>
S: Supported
F: drivers/tty/serial/atmel_serial.c
+ATMEL AT91 Alternative Shutdown Controller
+M: Nicolas Ferre <[email protected]>
+S: Supported
+F: drivers/power/reset/at91-shdwc.c
+
ATMEL SAMA5D2 ADC DRIVER
M: Ludovic Desroches <[email protected]>
L: [email protected]
diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig
index 0a6408a39c66..a23109bed7bd 100644
--- a/drivers/power/reset/Kconfig
+++ b/drivers/power/reset/Kconfig
@@ -30,6 +30,14 @@ config POWER_RESET_AT91_RESET
This driver supports restart for Atmel AT91SAM9 and SAMA5
SoCs
+config POWER_RESET_AT91_SHDWC
+ tristate "Atmel AT91 shutdown controller driver"
+ depends on ARCH_AT91 || COMPILE_TEST
+ default SOC_SAMA5
+ help
+ This driver supports the alternate shutdown controller for some Atmel
+ SAMA5 SoCs. It is present for example on SAMA5D2 SoC.
+
config POWER_RESET_AXXIA
bool "LSI Axxia reset driver"
depends on ARCH_AXXIA
diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile
index 096fa67047f6..6b9020ed3fb7 100644
--- a/drivers/power/reset/Makefile
+++ b/drivers/power/reset/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_POWER_RESET_AS3722) += as3722-poweroff.o
obj-$(CONFIG_POWER_RESET_AT91_POWEROFF) += at91-poweroff.o
obj-$(CONFIG_POWER_RESET_AT91_RESET) += at91-reset.o
+obj-$(CONFIG_POWER_RESET_AT91_SHDWC) += at91-shdwc.o
obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
obj-$(CONFIG_POWER_RESET_BRCMSTB) += brcmstb-reboot.o
obj-$(CONFIG_POWER_RESET_GPIO) += gpio-poweroff.o
diff --git a/drivers/power/reset/at91-shdwc.c b/drivers/power/reset/at91-shdwc.c
new file mode 100644
index 000000000000..e3b7b430de8e
--- /dev/null
+++ b/drivers/power/reset/at91-shdwc.c
@@ -0,0 +1,282 @@
+/*
+ * Atmel alternative Shutdown Controller (SHDWC) driver.
+ * Found on some SoCs as the sama5d2 for instance.
+ *
+ * Copyright (C) 2015 Atmel Corporation,
+ * Nicolas Ferre <[email protected]>
+ *
+ * Evolved from driver at91-poweroff.c.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * TODO:
+ * - addition to status of other wake-up inputs [1 - 15]
+ * - Analog Comparator wake-up alarm
+ * - Serial RX wake-up alarm
+ * - low power debouncer
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/printk.h>
+
+#define SLOW_CLOCK_FREQ 32768
+
+#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
+#define AT91_SHDW_SHDW BIT(0) /* Shut Down command */
+#define AT91_SHDW_KEY (0xa5UL << 24) /* KEY Password */
+
+#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
+#define AT91_SHDW_WKUPDBC_SHIFT 24
+#define AT91_SHDW_WKUPDBC_MASK GENMASK(31, 16)
+#define AT91_SHDW_WKUPDBC(x) (((x) << AT91_SHDW_WKUPDBC_SHIFT) \
+ & AT91_SHDW_WKUPDBC_MASK)
+
+#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
+#define AT91_SHDW_WKUPIS_SHIFT 16
+#define AT91_SHDW_WKUPIS_MASK GENMASK(31, 16)
+#define AT91_SHDW_WKUPIS(x) ((1 << (x)) << AT91_SHDW_WKUPIS_SHIFT \
+ & AT91_SHDW_WKUPIS_MASK)
+
+#define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */
+#define AT91_SHDW_WKUPEN_MASK GENMASK(15, 0)
+#define AT91_SHDW_WKUPEN(x) ((1 << (x)) & AT91_SHDW_WKUPEN_MASK)
+#define AT91_SHDW_WKUPT_SHIFT 16
+#define AT91_SHDW_WKUPT_MASK GENMASK(31, 16)
+#define AT91_SHDW_WKUPT(x) ((1 << (x)) << AT91_SHDW_WKUPT_SHIFT \
+ & AT91_SHDW_WKUPT_MASK)
+
+#define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
+#define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
+#define SHDW_RTCWKEN(cfg) (1 << ((cfg)->mr_rtcwk_shift))
+
+#define DBC_PERIOD_US(x) DIV_ROUND_UP_ULL((1000000 * (x)), \
+ SLOW_CLOCK_FREQ)
+
+struct shdwc_config {
+ u8 wkup_pin_input;
+ u8 mr_rtcwk_shift;
+ u8 sr_rtcwk_shift;
+};
+
+struct shdwc {
+ struct shdwc_config *cfg;
+ void __iomem *at91_shdwc_base;
+};
+
+/*
+ * Hold configuration here, cannot be more than one instance of the driver
+ * since pm_power_off itself is global.
+ */
+static struct shdwc *at91_shdwc;
+static struct clk *sclk;
+
+static const unsigned long long sdwc_dbc_period[] = {
+ 0, 3, 32, 512, 4096, 32768,
+};
+
+static void __init at91_wakeup_status(struct platform_device *pdev)
+{
+ struct shdwc *shdw = platform_get_drvdata(pdev);
+ u32 reg;
+ char *reason = "unknown";
+
+ reg = readl(shdw->at91_shdwc_base + AT91_SHDW_SR);
+
+ dev_dbg(&pdev->dev, "%s: status = %#x\n", __func__, reg);
+
+ /* Simple power-on, just bail out */
+ if (!reg)
+ return;
+
+ if (SHDW_WK_PIN(reg, shdw->cfg))
+ reason = "WKUP pin";
+ else if (SHDW_RTCWK(reg, shdw->cfg))
+ reason = "RTC";
+
+ pr_info("AT91: Wake-Up source: %s\n", reason);
+}
+
+static void at91_poweroff(void)
+{
+ writel(AT91_SHDW_KEY | AT91_SHDW_SHDW,
+ at91_shdwc->at91_shdwc_base + AT91_SHDW_CR);
+}
+
+static u32 at91_shdwc_debouncer_value(struct platform_device *pdev,
+ u32 in_period_us)
+{
+ int i;
+ int max_idx = ARRAY_SIZE(sdwc_dbc_period) - 1;
+ unsigned long long period_us;
+ unsigned long long max_period_us = DBC_PERIOD_US(sdwc_dbc_period[max_idx]);
+
+ if (in_period_us > max_period_us) {
+ dev_warn(&pdev->dev,
+ "debouncer period %u too big, reduced to %llu us\n",
+ in_period_us, max_period_us);
+ return max_idx;
+ }
+
+ for (i = max_idx - 1; i > 0; i--) {
+ period_us = DBC_PERIOD_US(sdwc_dbc_period[i]);
+ dev_dbg(&pdev->dev, "%s: ref[%d] = %llu\n",
+ __func__, i, period_us);
+ if (in_period_us > period_us)
+ break;
+ }
+
+ return i + 1;
+}
+
+static u32 at91_shdwc_get_wakeup_input(struct platform_device *pdev,
+ struct device_node *np)
+{
+ struct device_node *cnp;
+ u32 wk_input_mask;
+ u32 wuir = 0;
+ u32 wk_input;
+
+ for_each_child_of_node(np, cnp) {
+ if (of_property_read_u32(cnp, "reg", &wk_input)) {
+ dev_warn(&pdev->dev, "reg property is missing for %s\n",
+ cnp->full_name);
+ continue;
+ }
+
+ wk_input_mask = 1 << wk_input;
+ if (!(wk_input_mask & AT91_SHDW_WKUPEN_MASK)) {
+ dev_warn(&pdev->dev,
+ "wake-up input %d out of bounds ignore\n",
+ wk_input);
+ continue;
+ }
+ wuir |= wk_input_mask;
+
+ if (of_property_read_bool(cnp, "atmel,wakeup-active-high"))
+ wuir |= AT91_SHDW_WKUPT(wk_input);
+
+ dev_dbg(&pdev->dev, "%s: (child %d) wuir = %#x\n",
+ __func__, wk_input, wuir);
+ }
+
+ return wuir;
+}
+
+static void at91_shdwc_dt_configure(struct platform_device *pdev)
+{
+ struct shdwc *shdw = platform_get_drvdata(pdev);
+ struct device_node *np = pdev->dev.of_node;
+ u32 mode = 0, tmp, input;
+
+ if (!np) {
+ dev_err(&pdev->dev, "device node not found\n");
+ return;
+ }
+
+ if (!of_property_read_u32(np, "debounce-delay-us", &tmp))
+ mode |= AT91_SHDW_WKUPDBC(at91_shdwc_debouncer_value(pdev, tmp));
+
+ if (of_property_read_bool(np, "atmel,wakeup-rtc-timer"))
+ mode |= SHDW_RTCWKEN(shdw->cfg);
+
+ dev_dbg(&pdev->dev, "%s: mode = %#x\n", __func__, mode);
+ writel(mode, shdw->at91_shdwc_base + AT91_SHDW_MR);
+
+ input = at91_shdwc_get_wakeup_input(pdev, np);
+ writel(input, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
+}
+
+static const struct shdwc_config sama5d2_shdwc_config = {
+ .wkup_pin_input = 0,
+ .mr_rtcwk_shift = 17,
+ .sr_rtcwk_shift = 5,
+};
+
+static const struct of_device_id at91_shdwc_of_match[] = {
+ {
+ .compatible = "atmel,sama5d2-shdwc",
+ .data = &sama5d2_shdwc_config,
+ }, {
+ /*sentinel*/
+ }
+};
+MODULE_DEVICE_TABLE(of, at91_shdwc_of_match);
+
+static int __init at91_shdwc_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ const struct of_device_id *match;
+ int ret;
+
+ if (!pdev->dev.of_node)
+ return -ENODEV;
+
+ at91_shdwc = devm_kzalloc(&pdev->dev, sizeof(*at91_shdwc), GFP_KERNEL);
+ if (!at91_shdwc)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, at91_shdwc);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ at91_shdwc->at91_shdwc_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(at91_shdwc->at91_shdwc_base)) {
+ dev_err(&pdev->dev, "Could not map reset controller address\n");
+ return PTR_ERR(at91_shdwc->at91_shdwc_base);
+ }
+
+ match = of_match_node(at91_shdwc_of_match, pdev->dev.of_node);
+ at91_shdwc->cfg = (struct shdwc_config *)(match->data);
+
+ sclk = devm_clk_get(&pdev->dev, NULL);
+ if (IS_ERR(sclk))
+ return PTR_ERR(sclk);
+
+ ret = clk_prepare_enable(sclk);
+ if (ret) {
+ dev_err(&pdev->dev, "Could not enable slow clock\n");
+ return ret;
+ }
+
+ at91_wakeup_status(pdev);
+
+ at91_shdwc_dt_configure(pdev);
+
+ pm_power_off = at91_poweroff;
+
+ return 0;
+}
+
+static int __exit at91_shdwc_remove(struct platform_device *pdev)
+{
+ struct shdwc *shdw = platform_get_drvdata(pdev);
+
+ if (pm_power_off == at91_poweroff)
+ pm_power_off = NULL;
+
+ /* Reset values to disable wake-up features */
+ writel(0, shdw->at91_shdwc_base + AT91_SHDW_MR);
+ writel(0, shdw->at91_shdwc_base + AT91_SHDW_WUIR);
+
+ clk_disable_unprepare(sclk);
+
+ return 0;
+}
+
+static struct platform_driver at91_shdwc_driver = {
+ .remove = __exit_p(at91_shdwc_remove),
+ .driver = {
+ .name = "at91-shdwc",
+ .of_match_table = at91_shdwc_of_match,
+ },
+};
+module_platform_driver_probe(at91_shdwc_driver, at91_shdwc_probe);
+
+MODULE_AUTHOR("Nicolas Ferre <[email protected]>");
+MODULE_DESCRIPTION("Atmel shutdown controller driver");
+MODULE_LICENSE("GPL v2");
--
2.1.3
On 10/03/2016 at 16:37:40 +0100, Nicolas Ferre wrote :
> +ATMEL AT91 Alternative Shutdown Controller
Can't that be sama5d2 instead of alternative?
> +M: Nicolas Ferre <[email protected]>
> +S: Supported
> +F: drivers/power/reset/at91-shdwc.c
I would also use that in the filename. Because once there is a third
shdwc, I'm not sure how you will be able to name it.
> +config POWER_RESET_AT91_SHDWC
I would also include that in the config name.
> + tristate "Atmel AT91 shutdown controller driver"
> + depends on ARCH_AT91 || COMPILE_TEST
> + default SOC_SAMA5
> + help
> + This driver supports the alternate shutdown controller for some Atmel
> + SAMA5 SoCs. It is present for example on SAMA5D2 SoC.
> +
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/printk.h>
> +
> +#define SLOW_CLOCK_FREQ 32768
> +
> +#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
> +#define AT91_SHDW_SHDW BIT(0) /* Shut Down command */
> +#define AT91_SHDW_KEY (0xa5UL << 24) /* KEY Password */
> +
> +#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
> +#define AT91_SHDW_WKUPDBC_SHIFT 24
> +#define AT91_SHDW_WKUPDBC_MASK GENMASK(31, 16)
> +#define AT91_SHDW_WKUPDBC(x) (((x) << AT91_SHDW_WKUPDBC_SHIFT) \
> + & AT91_SHDW_WKUPDBC_MASK)
> +
> +#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
> +#define AT91_SHDW_WKUPIS_SHIFT 16
> +#define AT91_SHDW_WKUPIS_MASK GENMASK(31, 16)
> +#define AT91_SHDW_WKUPIS(x) ((1 << (x)) << AT91_SHDW_WKUPIS_SHIFT \
> + & AT91_SHDW_WKUPIS_MASK)
> +
> +#define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */
> +#define AT91_SHDW_WKUPEN_MASK GENMASK(15, 0)
> +#define AT91_SHDW_WKUPEN(x) ((1 << (x)) & AT91_SHDW_WKUPEN_MASK)
> +#define AT91_SHDW_WKUPT_SHIFT 16
> +#define AT91_SHDW_WKUPT_MASK GENMASK(31, 16)
> +#define AT91_SHDW_WKUPT(x) ((1 << (x)) << AT91_SHDW_WKUPT_SHIFT \
> + & AT91_SHDW_WKUPT_MASK)
> +
> +#define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
> +#define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
> +#define SHDW_RTCWKEN(cfg) (1 << ((cfg)->mr_rtcwk_shift))
> +
> +#define DBC_PERIOD_US(x) DIV_ROUND_UP_ULL((1000000 * (x)), \
> + SLOW_CLOCK_FREQ)
> +
> +struct shdwc_config {
> + u8 wkup_pin_input;
> + u8 mr_rtcwk_shift;
> + u8 sr_rtcwk_shift;
> +};
> +
> +struct shdwc {
> + struct shdwc_config *cfg;
> + void __iomem *at91_shdwc_base;
> +};
> +
> +/*
> + * Hold configuration here, cannot be more than one instance of the driver
> + * since pm_power_off itself is global.
> + */
> +static struct shdwc *at91_shdwc;
> +static struct clk *sclk;
> +
> +static const unsigned long long sdwc_dbc_period[] = {
> + 0, 3, 32, 512, 4096, 32768,
> +};
> +
> +static void __init at91_wakeup_status(struct platform_device *pdev)
> +{
> + struct shdwc *shdw = platform_get_drvdata(pdev);
> + u32 reg;
> + char *reason = "unknown";
> +
> + reg = readl(shdw->at91_shdwc_base + AT91_SHDW_SR);
> +
> + dev_dbg(&pdev->dev, "%s: status = %#x\n", __func__, reg);
> +
> + /* Simple power-on, just bail out */
> + if (!reg)
> + return;
> +
> + if (SHDW_WK_PIN(reg, shdw->cfg))
> + reason = "WKUP pin";
> + else if (SHDW_RTCWK(reg, shdw->cfg))
> + reason = "RTC";
> +
> + pr_info("AT91: Wake-Up source: %s\n", reason);
> +}
> +
> +static void at91_poweroff(void)
> +{
> + writel(AT91_SHDW_KEY | AT91_SHDW_SHDW,
> + at91_shdwc->at91_shdwc_base + AT91_SHDW_CR);
This is still not properly aligned :)
> +}
> +
> +static u32 at91_shdwc_debouncer_value(struct platform_device *pdev,
> + u32 in_period_us)
> +{
> + int i;
> + int max_idx = ARRAY_SIZE(sdwc_dbc_period) - 1;
> + unsigned long long period_us;
> + unsigned long long max_period_us = DBC_PERIOD_US(sdwc_dbc_period[max_idx]);
> +
> + if (in_period_us > max_period_us) {
> + dev_warn(&pdev->dev,
> + "debouncer period %u too big, reduced to %llu us\n",
> + in_period_us, max_period_us);
> + return max_idx;
> + }
> +
> + for (i = max_idx - 1; i > 0; i--) {
> + period_us = DBC_PERIOD_US(sdwc_dbc_period[i]);
> + dev_dbg(&pdev->dev, "%s: ref[%d] = %llu\n",
> + __func__, i, period_us);
Alignment is not correct.
> + if (in_period_us > period_us)
> + break;
> + }
> +
> + return i + 1;
> +}
> +
> +static u32 at91_shdwc_get_wakeup_input(struct platform_device *pdev,
> + struct device_node *np)
> +{
> + struct device_node *cnp;
> + u32 wk_input_mask;
> + u32 wuir = 0;
> + u32 wk_input;
> +
> + for_each_child_of_node(np, cnp) {
> + if (of_property_read_u32(cnp, "reg", &wk_input)) {
> + dev_warn(&pdev->dev, "reg property is missing for %s\n",
> + cnp->full_name);
> + continue;
> + }
> +
> + wk_input_mask = 1 << wk_input;
> + if (!(wk_input_mask & AT91_SHDW_WKUPEN_MASK)) {
> + dev_warn(&pdev->dev,
> + "wake-up input %d out of bounds ignore\n",
> + wk_input);
> + continue;
> + }
> + wuir |= wk_input_mask;
> +
> + if (of_property_read_bool(cnp, "atmel,wakeup-active-high"))
> + wuir |= AT91_SHDW_WKUPT(wk_input);
> +
> + dev_dbg(&pdev->dev, "%s: (child %d) wuir = %#x\n",
> + __func__, wk_input, wuir);
Alignment is not correct
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
Le 14/03/2016 21:22, Alexandre Belloni a ?crit :
> On 10/03/2016 at 16:37:40 +0100, Nicolas Ferre wrote :
>> +ATMEL AT91 Alternative Shutdown Controller
>
> Can't that be sama5d2 instead of alternative?
>
>> +M: Nicolas Ferre <[email protected]>
>> +S: Supported
>> +F: drivers/power/reset/at91-shdwc.c
>
> I would also use that in the filename. Because once there is a third
> shdwc, I'm not sure how you will be able to name it.
>
>> +config POWER_RESET_AT91_SHDWC
>
> I would also include that in the config name.
>
>> + tristate "Atmel AT91 shutdown controller driver"
>> + depends on ARCH_AT91 || COMPILE_TEST
>> + default SOC_SAMA5
>> + help
>> + This driver supports the alternate shutdown controller for some Atmel
>> + SAMA5 SoCs. It is present for example on SAMA5D2 SoC.
>> +
>
>> +#include <linux/clk.h>
>> +#include <linux/io.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/printk.h>
>> +
>> +#define SLOW_CLOCK_FREQ 32768
>> +
>> +#define AT91_SHDW_CR 0x00 /* Shut Down Control Register */
>> +#define AT91_SHDW_SHDW BIT(0) /* Shut Down command */
>> +#define AT91_SHDW_KEY (0xa5UL << 24) /* KEY Password */
>> +
>> +#define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
>> +#define AT91_SHDW_WKUPDBC_SHIFT 24
>> +#define AT91_SHDW_WKUPDBC_MASK GENMASK(31, 16)
>> +#define AT91_SHDW_WKUPDBC(x) (((x) << AT91_SHDW_WKUPDBC_SHIFT) \
>> + & AT91_SHDW_WKUPDBC_MASK)
>> +
>> +#define AT91_SHDW_SR 0x08 /* Shut Down Status Register */
>> +#define AT91_SHDW_WKUPIS_SHIFT 16
>> +#define AT91_SHDW_WKUPIS_MASK GENMASK(31, 16)
>> +#define AT91_SHDW_WKUPIS(x) ((1 << (x)) << AT91_SHDW_WKUPIS_SHIFT \
>> + & AT91_SHDW_WKUPIS_MASK)
>> +
>> +#define AT91_SHDW_WUIR 0x0c /* Shutdown Wake-up Inputs Register */
>> +#define AT91_SHDW_WKUPEN_MASK GENMASK(15, 0)
>> +#define AT91_SHDW_WKUPEN(x) ((1 << (x)) & AT91_SHDW_WKUPEN_MASK)
>> +#define AT91_SHDW_WKUPT_SHIFT 16
>> +#define AT91_SHDW_WKUPT_MASK GENMASK(31, 16)
>> +#define AT91_SHDW_WKUPT(x) ((1 << (x)) << AT91_SHDW_WKUPT_SHIFT \
>> + & AT91_SHDW_WKUPT_MASK)
>> +
>> +#define SHDW_WK_PIN(reg, cfg) ((reg) & AT91_SHDW_WKUPIS((cfg)->wkup_pin_input))
>> +#define SHDW_RTCWK(reg, cfg) (((reg) >> ((cfg)->sr_rtcwk_shift)) & 0x1)
>> +#define SHDW_RTCWKEN(cfg) (1 << ((cfg)->mr_rtcwk_shift))
>> +
>> +#define DBC_PERIOD_US(x) DIV_ROUND_UP_ULL((1000000 * (x)), \
>> + SLOW_CLOCK_FREQ)
>> +
>> +struct shdwc_config {
>> + u8 wkup_pin_input;
>> + u8 mr_rtcwk_shift;
>> + u8 sr_rtcwk_shift;
>> +};
>> +
>> +struct shdwc {
>> + struct shdwc_config *cfg;
>> + void __iomem *at91_shdwc_base;
>> +};
>> +
>> +/*
>> + * Hold configuration here, cannot be more than one instance of the driver
>> + * since pm_power_off itself is global.
>> + */
>> +static struct shdwc *at91_shdwc;
>> +static struct clk *sclk;
>> +
>> +static const unsigned long long sdwc_dbc_period[] = {
>> + 0, 3, 32, 512, 4096, 32768,
>> +};
>> +
>> +static void __init at91_wakeup_status(struct platform_device *pdev)
>> +{
>> + struct shdwc *shdw = platform_get_drvdata(pdev);
>> + u32 reg;
>> + char *reason = "unknown";
>> +
>> + reg = readl(shdw->at91_shdwc_base + AT91_SHDW_SR);
>> +
>> + dev_dbg(&pdev->dev, "%s: status = %#x\n", __func__, reg);
>> +
>> + /* Simple power-on, just bail out */
>> + if (!reg)
>> + return;
>> +
>> + if (SHDW_WK_PIN(reg, shdw->cfg))
>> + reason = "WKUP pin";
>> + else if (SHDW_RTCWK(reg, shdw->cfg))
>> + reason = "RTC";
>> +
>> + pr_info("AT91: Wake-Up source: %s\n", reason);
>> +}
>> +
>> +static void at91_poweroff(void)
>> +{
>> + writel(AT91_SHDW_KEY | AT91_SHDW_SHDW,
>> + at91_shdwc->at91_shdwc_base + AT91_SHDW_CR);
>
> This is still not properly aligned :)
Ok for this one.
>> +}
>> +
>> +static u32 at91_shdwc_debouncer_value(struct platform_device *pdev,
>> + u32 in_period_us)
>> +{
>> + int i;
>> + int max_idx = ARRAY_SIZE(sdwc_dbc_period) - 1;
>> + unsigned long long period_us;
>> + unsigned long long max_period_us = DBC_PERIOD_US(sdwc_dbc_period[max_idx]);
>> +
>> + if (in_period_us > max_period_us) {
>> + dev_warn(&pdev->dev,
>> + "debouncer period %u too big, reduced to %llu us\n",
>> + in_period_us, max_period_us);
>> + return max_idx;
>> + }
>> +
>> + for (i = max_idx - 1; i > 0; i--) {
>> + period_us = DBC_PERIOD_US(sdwc_dbc_period[i]);
>> + dev_dbg(&pdev->dev, "%s: ref[%d] = %llu\n",
>> + __func__, i, period_us);
>
> Alignment is not correct.
>
>> + if (in_period_us > period_us)
>> + break;
>> + }
>> +
>> + return i + 1;
>> +}
>> +
>> +static u32 at91_shdwc_get_wakeup_input(struct platform_device *pdev,
>> + struct device_node *np)
>> +{
>> + struct device_node *cnp;
>> + u32 wk_input_mask;
>> + u32 wuir = 0;
>> + u32 wk_input;
>> +
>> + for_each_child_of_node(np, cnp) {
>> + if (of_property_read_u32(cnp, "reg", &wk_input)) {
>> + dev_warn(&pdev->dev, "reg property is missing for %s\n",
>> + cnp->full_name);
>> + continue;
>> + }
>> +
>> + wk_input_mask = 1 << wk_input;
>> + if (!(wk_input_mask & AT91_SHDW_WKUPEN_MASK)) {
>> + dev_warn(&pdev->dev,
>> + "wake-up input %d out of bounds ignore\n",
>> + wk_input);
>> + continue;
>> + }
>> + wuir |= wk_input_mask;
>> +
>> + if (of_property_read_bool(cnp, "atmel,wakeup-active-high"))
>> + wuir |= AT91_SHDW_WKUPT(wk_input);
>> +
>> + dev_dbg(&pdev->dev, "%s: (child %d) wuir = %#x\n",
>> + __func__, wk_input, wuir);
>
> Alignment is not correct
I don't agree with you on the 2 last ones. In Documentation/CodingStyle,
it is said that:
"Chapter 2: Breaking long lines and strings
[..]
Descendants are always substantially shorter than the parent and
are placed substantially to the right."
Together with the 80 column requirement that I also fulfil, I think that
my code is well aligned.
So I keep it like this ;-)
Bye,
--
Nicolas Ferre
On 16/03/2016 at 12:36:56 +0100, Nicolas Ferre wrote :
> I don't agree with you on the 2 last ones. In Documentation/CodingStyle,
> it is said that:
>
> "Chapter 2: Breaking long lines and strings
> [..]
> Descendants are always substantially shorter than the parent and
> are placed substantially to the right."
>
> Together with the 80 column requirement that I also fulfil, I think that
> my code is well aligned.
>
> So I keep it like this ;-)
>
checkpatch.pl --strict disagrees with you
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com