The WDT is required for reboot and I2S is used for audio devices on
the P5 header (or BT audio on the Pi3).
Signed-off-by: Eric Anholt <[email protected]>
---
arch/arm/configs/multi_v7_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 2823490..43a8ce0 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -438,6 +438,7 @@ CONFIG_TEGRA_WATCHDOG=m
CONFIG_MESON_WATCHDOG=y
CONFIG_DW_WATCHDOG=y
CONFIG_DIGICOLOR_WATCHDOG=y
+CONFIG_BCM2835_WDT=y
CONFIG_MFD_AS3711=y
CONFIG_MFD_AS3722=y
CONFIG_MFD_ATMEL_FLEXCOM=y
@@ -564,6 +565,7 @@ CONFIG_SND_USB_AUDIO=m
CONFIG_SND_SOC=m
CONFIG_SND_ATMEL_SOC=m
CONFIG_SND_ATMEL_SOC_WM8904=m
+CONFIG_SND_BCM2835_SOC_I2S=m
CONFIG_SND_SOC_FSL_SAI=m
CONFIG_SND_SOC_ROCKCHIP=m
CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
--
2.7.0
This approximately triples write performance for the SD card. My card
is too full of important data to collect very reliable numbers, but I
see 271.361% +/- 166.742% improvement (n=3 before, 6 after), for 'dd
if=/dev/zero of=/boot/asdf bs=1M count=3 oflag=dsync,direct'. Read
performance appears to be unaffected.
Signed-off-by: Eric Anholt <[email protected]>
---
arch/arm/configs/multi_v7_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 43a8ce0..a913520 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -642,7 +642,6 @@ CONFIG_MMC_SDHCI_SPEAR=y
CONFIG_MMC_SDHCI_S3C=y
CONFIG_MMC_SDHCI_S3C_DMA=y
CONFIG_MMC_SDHCI_BCM_KONA=y
-CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_MMC_SDHCI_ST=y
CONFIG_MMC_OMAP=y
CONFIG_MMC_OMAP_HS=y
--
2.7.0
This allows the Raspberry Pi 2 to be network booted from the
defconfig.
Signed-off-by: Eric Anholt <[email protected]>
---
arch/arm/configs/multi_v7_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index a913520..8079f7d 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -611,7 +611,7 @@ CONFIG_USB_STORAGE=y
CONFIG_USB_MUSB_HDRC=m
CONFIG_USB_MUSB_SUNXI=m
CONFIG_USB_DWC3=y
-CONFIG_USB_DWC2=m
+CONFIG_USB_DWC2=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_CHIPIDEA_HOST=y
--
2.7.0
On 03/31/2016 06:28 PM, Eric Anholt wrote:
> This approximately triples write performance for the SD card. My card
> is too full of important data to collect very reliable numbers, but I
> see 271.361% +/- 166.742% improvement (n=3 before, 6 after), for 'dd
> if=/dev/zero of=/boot/asdf bs=1M count=3 oflag=dsync,direct'. Read
> performance appears to be unaffected.
I thought that switching the defconfig wasn't possible, since this HW
module relies on the SoC core clock, and that can be asynchronously
changed by the FW running on the VideoCore. Consequently, this change
isn't safe unless the user puts non-default options in their config.txt.
The same comment applies to "[PATCH 1/4] ARM: bcm2835: Switch BCM2835 to
sdhci-iproc.c for MMC" in the other series.
On 03/31/2016 06:28 PM, Eric Anholt wrote:
> The WDT is required for reboot and I2S is used for audio devices on
> the P5 header (or BT audio on the Pi3).
Patches 1 and 3,
Acked-by: Stephen Warren <[email protected]>
Stephen Warren <[email protected]> writes:
> On 03/31/2016 06:28 PM, Eric Anholt wrote:
>> This approximately triples write performance for the SD card. My card
>> is too full of important data to collect very reliable numbers, but I
>> see 271.361% +/- 166.742% improvement (n=3 before, 6 after), for 'dd
>> if=/dev/zero of=/boot/asdf bs=1M count=3 oflag=dsync,direct'. Read
>> performance appears to be unaffected.
>
> I thought that switching the defconfig wasn't possible, since this HW
> module relies on the SoC core clock, and that can be asynchronously
> changed by the FW running on the VideoCore. Consequently, this change
> isn't safe unless the user puts non-default options in their config.txt.
>
> The same comment applies to "[PATCH 1/4] ARM: bcm2835: Switch BCM2835 to
> sdhci-iproc.c for MMC" in the other series.
I think you're thinking of SDHOST, the other controller? This is just
switching implementations for the EMMC controller so that eventually we
can delete our old implementation.
On 03/31/2016 08:01 PM, Stephen Warren wrote:
> On 03/31/2016 06:28 PM, Eric Anholt wrote:
>> This approximately triples write performance for the SD card. My card
>> is too full of important data to collect very reliable numbers, but I
>> see 271.361% +/- 166.742% improvement (n=3 before, 6 after), for 'dd
>> if=/dev/zero of=/boot/asdf bs=1M count=3 oflag=dsync,direct'. Read
>> performance appears to be unaffected.
>
> I thought that switching the defconfig wasn't possible, since this HW
> module relies on the SoC core clock, and that can be asynchronously
> changed by the FW running on the VideoCore. Consequently, this change
> isn't safe unless the user puts non-default options in their config.txt.
>
> The same comment applies to "[PATCH 1/4] ARM: bcm2835: Switch BCM2835 to
> sdhci-iproc.c for MMC" in the other series.
Ah, now I realize that sdhci-bcm2835.c and sdhci-iproc.c are two
alternative drivers for the same HW device. For some reason I got the
incorrect impression from some past email/patch discussion that
sdhci-iproc.c was a driver for the alternative SD controller in the chip.
So, there's no problem with this patch.
Acked-by: Stephen Warren <[email protected]>
(although /me wonders why sdhci-iproc.c was even added in the first
place given sdhci-bcm2835.c pre-dates it by over 2 years, and equally
why the new driver is any faster given it looks almost identical and
accesses the same HW, but I suppose it doesn't matter).
Hi,
> Stephen Warren <[email protected]> hat am 1. April 2016 um 18:58
> geschrieben:
>
>
> On 03/31/2016 08:01 PM, Stephen Warren wrote:
> > On 03/31/2016 06:28 PM, Eric Anholt wrote:
> >> This approximately triples write performance for the SD card. My card
> >> is too full of important data to collect very reliable numbers, but I
> >> see 271.361% +/- 166.742% improvement (n=3 before, 6 after), for 'dd
> >> if=/dev/zero of=/boot/asdf bs=1M count=3 oflag=dsync,direct'. Read
> >> performance appears to be unaffected.
> >
> > I thought that switching the defconfig wasn't possible, since this HW
> > module relies on the SoC core clock, and that can be asynchronously
> > changed by the FW running on the VideoCore. Consequently, this change
> > isn't safe unless the user puts non-default options in their config.txt.
> >
> > The same comment applies to "[PATCH 1/4] ARM: bcm2835: Switch BCM2835 to
> > sdhci-iproc.c for MMC" in the other series.
>
> Ah, now I realize that sdhci-bcm2835.c and sdhci-iproc.c are two
> alternative drivers for the same HW device. For some reason I got the
> incorrect impression from some past email/patch discussion that
> sdhci-iproc.c was a driver for the alternative SD controller in the chip.
>
> So, there's no problem with this patch.
> Acked-by: Stephen Warren <[email protected]>
>
> (although /me wonders why sdhci-iproc.c was even added in the first
> place given sdhci-bcm2835.c pre-dates it by over 2 years, and equally
> why the new driver is any faster given it looks almost identical and
> accesses the same HW, but I suppose it doesn't matter).
my old results (without DMA support) wasn't so impressing:
sdhci-bcm2835
378 kB/s WRITE
10,6 MB/s READ
sdhci-iproc
881 kB/s WRITE
10,8 MB/s READ
The performance gain comes from the more intelligent quirk handling.
sdhci-bcm2835 has a fixed delay after each write.
Regards
Stefan
>
> _______________________________________________
> linux-rpi-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-rpi-kernel