2016-04-14 04:42:49

by Alim Akhtar

Subject: [PATCH] clk: samsung: exynos7: Don't gate CMU_{CCORE, FSYS0} blocks clock

This patch adds CLK_IS_CRITICAL flag to ACLK_CCORE_133 and ACLK_FSYS0_200
clocks. These clocks are critical for accessing CMU_CCORE and CMU_FSYS0
blocks registers. Let these clocks to be enabled all the time.

Signed-off-by: Alim Akhtar <[email protected]>
---
drivers/clk/samsung/clk-exynos7.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c
index ad68d46..03a82da 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -146,7 +146,7 @@ static struct samsung_pll_rate_table pll1460x_24mhz_tbl[] __initdata = {

static struct samsung_gate_clock topc_gate_clks[] __initdata = {
GATE(ACLK_CCORE_133, "aclk_ccore_133", "dout_aclk_ccore_133",
- ENABLE_ACLK_TOPC0, 4, 0, 0),
+ ENABLE_ACLK_TOPC0, 4, CLK_IS_CRITICAL, 0),

GATE(ACLK_MSCL_532, "aclk_mscl_532", "dout_aclk_mscl_532",
ENABLE_ACLK_TOPC1, 20, 0, 0),
@@ -539,7 +539,8 @@ static struct samsung_gate_clock top1_gate_clks[] __initdata = {
ENABLE_SCLK_TOP1_FSYS11, 12, CLK_SET_RATE_PARENT, 0),

GATE(CLK_ACLK_FSYS0_200, "aclk_fsys0_200", "dout_aclk_fsys0_200",
- ENABLE_ACLK_TOP13, 28, CLK_SET_RATE_PARENT, 0),
+ ENABLE_ACLK_TOP13, 28, CLK_SET_RATE_PARENT |
+ CLK_IS_CRITICAL, 0),
GATE(CLK_ACLK_FSYS1_200, "aclk_fsys1_200", "dout_aclk_fsys1_200",
ENABLE_ACLK_TOP13, 24, CLK_SET_RATE_PARENT, 0),

--
1.7.10.4

2016-04-14 07:51:06

by Krzysztof Kozlowski

Subject: Re: [PATCH] clk: samsung: exynos7: Don't gate CMU_{CCORE, FSYS0} blocks clock

On 04/14/2016 06:42 AM, Alim Akhtar wrote:
> This patch adds CLK_IS_CRITICAL flag to ACLK_CCORE_133 and ACLK_FSYS0_200
> clocks. These clocks are critical for accessing CMU_CCORE and CMU_FSYS0
> blocks registers. Let these clocks to be enabled all the time.
>
> Signed-off-by: Alim Akhtar <[email protected]>
> ---
> drivers/clk/samsung/clk-exynos7.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)

Reviewed-by: Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof

2016-04-15 12:37:13

by Alim Akhtar

Subject: Re: [PATCH] clk: samsung: exynos7: Don't gate CMU_{CCORE, FSYS0} blocks clock

On 04/14/2016 01:20 PM, Krzysztof Kozlowski wrote:
> On 04/14/2016 06:42 AM, Alim Akhtar wrote:
>> This patch adds CLK_IS_CRITICAL flag to ACLK_CCORE_133 and ACLK_FSYS0_200
>> clocks. These clocks are critical for accessing CMU_CCORE and CMU_FSYS0
>> blocks registers. Let these clocks to be enabled all the time.
>>
>> Signed-off-by: Alim Akhtar <[email protected]>
>> ---
>> drivers/clk/samsung/clk-exynos7.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> Reviewed-by: Krzysztof Kozlowski <[email protected]>
>
Thanks Krzysztof,
Sylwester, do you have any concern here?

> Best regards,
> Krzysztof
>
>

2016-04-15 16:34:26

by Sylwester Nawrocki

Subject: Re: [PATCH] clk: samsung: exynos7: Don't gate CMU_{CCORE, FSYS0} blocks clock

On 04/15/2016 02:37 PM, Alim Akhtar wrote:
> On 04/14/2016 01:20 PM, Krzysztof Kozlowski wrote:
>> > On 04/14/2016 06:42 AM, Alim Akhtar wrote:
>>> >> This patch adds CLK_IS_CRITICAL flag to ACLK_CCORE_133 and ACLK_FSYS0_200
>>> >> clocks. These clocks are critical for accessing CMU_CCORE and CMU_FSYS0
>>> >> blocks registers. Let these clocks to be enabled all the time.
>>> >>
>>> >> Signed-off-by: Alim Akhtar <[email protected]>
>>> >> ---
>>> >> drivers/clk/samsung/clk-exynos7.c | 5 +++--
>>> >> 1 file changed, 3 insertions(+), 2 deletions(-)
>> >
>> > Reviewed-by: Krzysztof Kozlowski <[email protected]>
>> >
> Thanks Krzysztof,
> Sylwester, do you have any concern here?

I'm fine with the patch, if it fixes all the issues for you.
I will apply it and will likely send it upstream after v4.7-rc1 release.

--
Regards,
Sylwester