From: Xiong Zhang <[email protected]>
Add function to switch PMI handler since passthrough PMU and host PMU will
use different interrupt vectors.
Signed-off-by: Xiong Zhang <[email protected]>
Signed-off-by: Mingwei Zhang <[email protected]>
---
arch/x86/events/core.c | 15 +++++++++++++++
arch/x86/include/asm/perf_event.h | 3 +++
2 files changed, 18 insertions(+)
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 40ad1425ffa2..3f87894d8c8e 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -701,6 +701,21 @@ struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data)
}
EXPORT_SYMBOL_GPL(perf_guest_get_msrs);
+void perf_guest_switch_to_host_pmi_vector(void)
+{
+ lockdep_assert_irqs_disabled();
+
+ apic_write(APIC_LVTPC, APIC_DM_NMI);
+}
+EXPORT_SYMBOL_GPL(perf_guest_switch_to_host_pmi_vector);
+
+void perf_guest_switch_to_kvm_pmi_vector(void)
+{
+ lockdep_assert_irqs_disabled();
+
+ apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR);
+}
+EXPORT_SYMBOL_GPL(perf_guest_switch_to_kvm_pmi_vector);
/*
* There may be PMI landing after enabled=0. The PMI hitting could be before or
* after disable_all.
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index 2618ec7c3d1d..021ab362a061 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -573,6 +573,9 @@ static inline void perf_events_lapic_init(void) { }
static inline void perf_check_microcode(void) { }
#endif
+extern void perf_guest_switch_to_host_pmi_vector(void);
+extern void perf_guest_switch_to_kvm_pmi_vector(void);
+
#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
extern struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data);
extern void x86_perf_get_lbr(struct x86_pmu_lbr *lbr);
--
2.34.1
On Fri, Jan 26, 2024, Xiong Zhang wrote:
> From: Xiong Zhang <[email protected]>
>
> Add function to switch PMI handler since passthrough PMU and host PMU will
> use different interrupt vectors.
>
> Signed-off-by: Xiong Zhang <[email protected]>
> Signed-off-by: Mingwei Zhang <[email protected]>
> ---
> arch/x86/events/core.c | 15 +++++++++++++++
> arch/x86/include/asm/perf_event.h | 3 +++
> 2 files changed, 18 insertions(+)
>
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 40ad1425ffa2..3f87894d8c8e 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -701,6 +701,21 @@ struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data)
> }
> EXPORT_SYMBOL_GPL(perf_guest_get_msrs);
>
> +void perf_guest_switch_to_host_pmi_vector(void)
> +{
> + lockdep_assert_irqs_disabled();
> +
> + apic_write(APIC_LVTPC, APIC_DM_NMI);
> +}
> +EXPORT_SYMBOL_GPL(perf_guest_switch_to_host_pmi_vector);
> +
> +void perf_guest_switch_to_kvm_pmi_vector(void)
> +{
> + lockdep_assert_irqs_disabled();
> +
> + apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR);
> +}
> +EXPORT_SYMBOL_GPL(perf_guest_switch_to_kvm_pmi_vector);
Why slice and dice the context switch if it's all in perf? Just do this in
perf_guest_enter().
On Thu, Apr 11, 2024, Sean Christopherson wrote:
> On Fri, Jan 26, 2024, Xiong Zhang wrote:
> > From: Xiong Zhang <[email protected]>
> >
> > Add function to switch PMI handler since passthrough PMU and host PMU will
> > use different interrupt vectors.
> >
> > Signed-off-by: Xiong Zhang <[email protected]>
> > Signed-off-by: Mingwei Zhang <[email protected]>
> > ---
> > arch/x86/events/core.c | 15 +++++++++++++++
> > arch/x86/include/asm/perf_event.h | 3 +++
> > 2 files changed, 18 insertions(+)
> >
> > diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> > index 40ad1425ffa2..3f87894d8c8e 100644
> > --- a/arch/x86/events/core.c
> > +++ b/arch/x86/events/core.c
> > @@ -701,6 +701,21 @@ struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data)
> > }
> > EXPORT_SYMBOL_GPL(perf_guest_get_msrs);
> >
> > +void perf_guest_switch_to_host_pmi_vector(void)
> > +{
> > + lockdep_assert_irqs_disabled();
> > +
> > + apic_write(APIC_LVTPC, APIC_DM_NMI);
> > +}
> > +EXPORT_SYMBOL_GPL(perf_guest_switch_to_host_pmi_vector);
> > +
> > +void perf_guest_switch_to_kvm_pmi_vector(void)
> > +{
> > + lockdep_assert_irqs_disabled();
> > +
> > + apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR);
> > +}
> > +EXPORT_SYMBOL_GPL(perf_guest_switch_to_kvm_pmi_vector);
>
> Why slice and dice the context switch if it's all in perf? Just do this in
> perf_guest_enter().
Ah, because perf_guest_enter() isn't x86-specific.
That can be solved by having the exported APIs be arch specific, e.g.
x86_perf_guest_enter(), and making perf_guest_enter() a perf-internal API.
That has the advantage of making it impossible to call perf_guest_enter() on an
unsupported architecture (modulo perf bugs).
On 4/12/2024 3:34 AM, Sean Christopherson wrote:
> On Thu, Apr 11, 2024, Sean Christopherson wrote:
>> On Fri, Jan 26, 2024, Xiong Zhang wrote:
>>> From: Xiong Zhang <[email protected]>
>>>
>>> Add function to switch PMI handler since passthrough PMU and host PMU will
>>> use different interrupt vectors.
>>>
>>> Signed-off-by: Xiong Zhang <[email protected]>
>>> Signed-off-by: Mingwei Zhang <[email protected]>
>>> ---
>>> arch/x86/events/core.c | 15 +++++++++++++++
>>> arch/x86/include/asm/perf_event.h | 3 +++
>>> 2 files changed, 18 insertions(+)
>>>
>>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>>> index 40ad1425ffa2..3f87894d8c8e 100644
>>> --- a/arch/x86/events/core.c
>>> +++ b/arch/x86/events/core.c
>>> @@ -701,6 +701,21 @@ struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data)
>>> }
>>> EXPORT_SYMBOL_GPL(perf_guest_get_msrs);
>>>
>>> +void perf_guest_switch_to_host_pmi_vector(void)
>>> +{
>>> + lockdep_assert_irqs_disabled();
>>> +
>>> + apic_write(APIC_LVTPC, APIC_DM_NMI);
>>> +}
>>> +EXPORT_SYMBOL_GPL(perf_guest_switch_to_host_pmi_vector);
>>> +
>>> +void perf_guest_switch_to_kvm_pmi_vector(void)
>>> +{
>>> + lockdep_assert_irqs_disabled();
>>> +
>>> + apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR);
>>> +}
>>> +EXPORT_SYMBOL_GPL(perf_guest_switch_to_kvm_pmi_vector);
>>
>> Why slice and dice the context switch if it's all in perf? Just do this in
>> perf_guest_enter().
>
> Ah, because perf_guest_enter() isn't x86-specific.
>
> That can be solved by having the exported APIs be arch specific, e.g.
> x86_perf_guest_enter(), and making perf_guest_enter() a perf-internal API.
>
> That has the advantage of making it impossible to call perf_guest_enter() on an
> unsupported architecture (modulo perf bugs).
>
Make sense. I will try it.
thanks
On 4/12/2024 3:17 AM, Sean Christopherson wrote:
> On Fri, Jan 26, 2024, Xiong Zhang wrote:
>> From: Xiong Zhang <[email protected]>
>>
>> Add function to switch PMI handler since passthrough PMU and host PMU will
>> use different interrupt vectors.
>>
>> Signed-off-by: Xiong Zhang <[email protected]>
>> Signed-off-by: Mingwei Zhang <[email protected]>
>> ---
>> arch/x86/events/core.c | 15 +++++++++++++++
>> arch/x86/include/asm/perf_event.h | 3 +++
>> 2 files changed, 18 insertions(+)
>>
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index 40ad1425ffa2..3f87894d8c8e 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -701,6 +701,21 @@ struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data)
>> }
>> EXPORT_SYMBOL_GPL(perf_guest_get_msrs);
>>
>> +void perf_guest_switch_to_host_pmi_vector(void)
>> +{
>> + lockdep_assert_irqs_disabled();
>> +
>> + apic_write(APIC_LVTPC, APIC_DM_NMI);
>> +}
>> +EXPORT_SYMBOL_GPL(perf_guest_switch_to_host_pmi_vector);
>> +
>> +void perf_guest_switch_to_kvm_pmi_vector(void)
>> +{
>> + lockdep_assert_irqs_disabled();
>> +
>> + apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR);
>> +}
>> +EXPORT_SYMBOL_GPL(perf_guest_switch_to_kvm_pmi_vector);
>
> Why slice and dice the context switch if it's all in perf? Just do this in
> perf_guest_enter().
>
As perf_guest_enter() is in perf core which manages all PMUs, while switch_pmi_vector is for x86 core PMU only, so switch_pmi_vector is put in x86 pmu driver. pmu driver can call perf core function directly, perf core manage pmu through pmu->ops and pmu->flags. If switch_pmi_vector is called in perf_guest_enter, extra interfaces will be added into pmu->ops, this impacts other PMU driver.