2016-12-23 04:54:24

by Zoran Markovic

Subject: [RFC PATCHv2 2/4] clk: mdm9615: Add EBI2 clock

Add definition of EBI2 clock used by MDM9615 NAND controller.

Cc: Andy Gross <[email protected]>
Cc: David Brown <[email protected]>
Cc: Michael Turquette <[email protected]>
Cc: Stephen Boyd <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Neil Armstrong <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Zoran Markovic <[email protected]>
---
drivers/clk/qcom/gcc-mdm9615.c | 30 ++++++++++++++++++++++++++
include/dt-bindings/clock/qcom,gcc-mdm9615.h | 3 +++
2 files changed, 33 insertions(+)

diff --git a/drivers/clk/qcom/gcc-mdm9615.c b/drivers/clk/qcom/gcc-mdm9615.c
index 581a17f..e9e98b1 100644
--- a/drivers/clk/qcom/gcc-mdm9615.c
+++ b/drivers/clk/qcom/gcc-mdm9615.c
@@ -1563,6 +1563,34 @@ enum {
},
};

+static struct clk_branch ebi2_clk = {
+ .hwcg_reg = 0x2664,
+ .hwcg_bit = 6,
+ .halt_reg = 0x2fcc,
+ .halt_bit = 23,
+ .clkr = {
+ .enable_reg = 0x2664,
+ .enable_mask = BIT(6) | BIT(4),
+ .hw.init = &(struct clk_init_data){
+ .name = "ebi2_clk",
+ .ops = &clk_branch_ops,
+ },
+ },
+};
+
+static struct clk_branch ebi2_aon_clk = {
+ .halt_reg = 0x2fcc,
+ .halt_bit = 23,
+ .clkr = {
+ .enable_reg = 0x2664,
+ .enable_mask = BIT(8),
+ .hw.init = &(struct clk_init_data){
+ .name = "ebi2_aon_clk",
+ .ops = &clk_branch_ops,
+ },
+ },
+};
+
static struct clk_hw *gcc_mdm9615_hws[] = {
&cxo.hw,
};
@@ -1637,6 +1665,8 @@ enum {
[PMIC_ARB1_H_CLK] = &pmic_arb1_h_clk.clkr,
[PMIC_SSBI2_CLK] = &pmic_ssbi2_clk.clkr,
[RPM_MSG_RAM_H_CLK] = &rpm_msg_ram_h_clk.clkr,
+ [EBI2_CLK] = &ebi2_clk.clkr,
+ [EBI2_AON_CLK] = &ebi2_aon_clk.clkr,
};

static const struct qcom_reset_map gcc_mdm9615_resets[] = {
diff --git a/include/dt-bindings/clock/qcom,gcc-mdm9615.h b/include/dt-bindings/clock/qcom,gcc-mdm9615.h
index 9ab2c40..57cdca6 100644
--- a/include/dt-bindings/clock/qcom,gcc-mdm9615.h
+++ b/include/dt-bindings/clock/qcom,gcc-mdm9615.h
@@ -323,5 +323,8 @@
#define CE3_H_CLK 305
#define USB_HS1_SYSTEM_CLK_SRC 306
#define USB_HS1_SYSTEM_CLK 307
+#define EBI2_CLK 308
+#define EBI2_AON_CLK 309
+

#endif
--
1.7.9.5

2016-12-23 19:50:49

by Neil Armstrong

Subject: Re: [RFC PATCHv2 2/4] clk: mdm9615: Add EBI2 clock

Le 23/12/2016 05:54, Zoran Markovic a ?crit :
> Add definition of EBI2 clock used by MDM9615 NAND controller.
>
> Cc: Andy Gross <[email protected]>
> Cc: David Brown <[email protected]>
> Cc: Michael Turquette <[email protected]>
> Cc: Stephen Boyd <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: Mark Rutland <[email protected]>
> Cc: Neil Armstrong <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Signed-off-by: Zoran Markovic <[email protected]>
> ---
> drivers/clk/qcom/gcc-mdm9615.c | 30 ++++++++++++++++++++++++++
> include/dt-bindings/clock/qcom,gcc-mdm9615.h | 3 +++
> 2 files changed, 33 insertions(+)
>
> diff --git a/drivers/clk/qcom/gcc-mdm9615.c b/drivers/clk/qcom/gcc-mdm9615.c
> index 581a17f..e9e98b1 100644
> --- a/drivers/clk/qcom/gcc-mdm9615.c
> +++ b/drivers/clk/qcom/gcc-mdm9615.c
> @@ -1563,6 +1563,34 @@ enum {
> },
> };
>
> +static struct clk_branch ebi2_clk = {
> + .hwcg_reg = 0x2664,
> + .hwcg_bit = 6,
> + .halt_reg = 0x2fcc,
> + .halt_bit = 23,
> + .clkr = {
> + .enable_reg = 0x2664,
> + .enable_mask = BIT(6) | BIT(4),
> + .hw.init = &(struct clk_init_data){
> + .name = "ebi2_clk",
> + .ops = &clk_branch_ops,
> + },
> + },
> +};
> +
> +static struct clk_branch ebi2_aon_clk = {
> + .halt_reg = 0x2fcc,
> + .halt_bit = 23,
> + .clkr = {
> + .enable_reg = 0x2664,
> + .enable_mask = BIT(8),
> + .hw.init = &(struct clk_init_data){
> + .name = "ebi2_aon_clk",
> + .ops = &clk_branch_ops,
> + },
> + },
> +};
> +
> static struct clk_hw *gcc_mdm9615_hws[] = {
> &cxo.hw,
> };
> @@ -1637,6 +1665,8 @@ enum {
> [PMIC_ARB1_H_CLK] = &pmic_arb1_h_clk.clkr,
> [PMIC_SSBI2_CLK] = &pmic_ssbi2_clk.clkr,
> [RPM_MSG_RAM_H_CLK] = &rpm_msg_ram_h_clk.clkr,
> + [EBI2_CLK] = &ebi2_clk.clkr,
> + [EBI2_AON_CLK] = &ebi2_aon_clk.clkr,
> };
>
> static const struct qcom_reset_map gcc_mdm9615_resets[] = {
> diff --git a/include/dt-bindings/clock/qcom,gcc-mdm9615.h b/include/dt-bindings/clock/qcom,gcc-mdm9615.h
> index 9ab2c40..57cdca6 100644
> --- a/include/dt-bindings/clock/qcom,gcc-mdm9615.h
> +++ b/include/dt-bindings/clock/qcom,gcc-mdm9615.h
> @@ -323,5 +323,8 @@
> #define CE3_H_CLK 305
> #define USB_HS1_SYSTEM_CLK_SRC 306
> #define USB_HS1_SYSTEM_CLK 307
> +#define EBI2_CLK 308
> +#define EBI2_AON_CLK 309
> +
>
> #endif
>

Hi Zoran,

Thanks for this patch, we did not found the definition for these clocks at all !

Acked-by: Neil Armstrong <[email protected]>

Neil