2019-03-30 12:05:41

by Masahiro Yamada

[permalink] [raw]
Subject: [PATCH 1/6] kbuild: pass $(MAKECMDGOALS) to sub-make as is

Manipulating $(MAKECMDGOALS) for sub-make seems odd to me.

[1] 'make O=foo sub-make' is turned into 'make O=foo', which builds
the default targets. It would make sense to terminate the build with:

*** No rule to make target 'sub-make'. Stop.

[2] 'make O=foo defconfig _all' is turned into 'make O=foo defconfig',
which changes the behavior.

Let's pass $(MAKECMDGOALS) as is.

Signed-off-by: Masahiro Yamada <[email protected]>
---

Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 92ad066..9cbd367 100644
--- a/Makefile
+++ b/Makefile
@@ -168,7 +168,7 @@ $(filter-out _all sub-make $(lastword $(MAKEFILE_LIST)), $(MAKECMDGOALS)) _all:
sub-make:
$(Q)$(MAKE) \
$(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \
- -f $(CURDIR)/Makefile $(filter-out _all sub-make,$(MAKECMDGOALS))
+ -f $(CURDIR)/Makefile $(MAKECMDGOALS)

endif # need-sub-make
endif # sub_make_done
--
2.7.4



2019-03-30 12:05:28

by Masahiro Yamada

[permalink] [raw]
Subject: [PATCH 4/6] kbuild: mkmakefile: generate a simple wrapper of top Makefile

Now that Kbuild is able to start from any directory, the generated
Makefile can simply wrap the top Makefile.

Signed-off-by: Masahiro Yamada <[email protected]>
---

scripts/mkmakefile | 20 ++------------------
1 file changed, 2 insertions(+), 18 deletions(-)

diff --git a/scripts/mkmakefile b/scripts/mkmakefile
index 31de468..4d0faeb 100755
--- a/scripts/mkmakefile
+++ b/scripts/mkmakefile
@@ -12,22 +12,6 @@ if [ "${quiet}" != "silent_" ]; then
fi

cat << EOF > Makefile
-# Automatically generated by $0: don't edit
-
-ifeq ("\$(origin V)", "command line")
-VERBOSE := \$(V)
-endif
-ifneq (\$(VERBOSE),1)
-Q := @
-endif
-
-MAKEFLAGS += --no-print-directory
-
-.PHONY: __sub-make \$(MAKECMDGOALS)
-
-__sub-make:
- \$(Q)\$(MAKE) -C $1 O=\$(CURDIR) \$(MAKECMDGOALS)
-
-\$(filter-out __sub-make, \$(MAKECMDGOALS)): __sub-make
- @:
+# Automatically generated by $(realpath $0): don't edit
+include $(realpath $1/Makefile)
EOF
--
2.7.4


2019-03-30 12:05:28

by Masahiro Yamada

[permalink] [raw]
Subject: [PATCH 2/6] kbuild: allow Kbuild to start from any directory

Kbuild always runs in the top of the output directory.

If Make starts in the source directory with O=, it relocates the
working directory to the location specified by O=.

Also, users can start build from the output directory by using the
Makefile generated by scripts/mkmakefile.

With a little more effort, Kbuild will be able to start from any
directory path.

This commit allows to specify the source directory by using
the -f option.

For example, you can do:

$ cd path/to/output/dir
$ make -f path/to/source/dir/Makefile

Or, for the equivalent behavior, you can do:

$ make O=path/to/output/dir -f path/to/source/dir/Makefile

KBUILD_SRC is now deprecated.

Signed-off-by: Masahiro Yamada <[email protected]>
---

Makefile | 87 +++++++++++++++++++++++++++++++++++++---------------------------
1 file changed, 50 insertions(+), 37 deletions(-)

diff --git a/Makefile b/Makefile
index 9cbd367..1b2a70e 100644
--- a/Makefile
+++ b/Makefile
@@ -96,56 +96,65 @@ endif

export quiet Q KBUILD_VERBOSE

-# kbuild supports saving output files in a separate directory.
-# To locate output files in a separate directory two syntaxes are supported.
-# In both cases the working directory must be the root of the kernel src.
+# Kbuild will save output files in the current working directory.
+# This does not need to match to the root of the kernel source tree.
+#
+# For example, you can do this:
+#
+# cd /dir/to/store/output/files; make -f /dir/to/kernel/source/Makefile
+#
+# If you want to save output files in a different location, there are
+# two syntaxes to specify it.
+#
# 1) O=
# Use "make O=dir/to/store/output/files/"
#
# 2) Set KBUILD_OUTPUT
-# Set the environment variable KBUILD_OUTPUT to point to the directory
-# where the output files shall be placed.
-# export KBUILD_OUTPUT=dir/to/store/output/files/
-# make
+# Set the environment variable KBUILD_OUTPUT to point to the output directory.
+# export KBUILD_OUTPUT=dir/to/store/output/files/; make
#
# The O= assignment takes precedence over the KBUILD_OUTPUT environment
# variable.

-# KBUILD_SRC is not intended to be used by the regular user (for now),
-# it is set on invocation of make with KBUILD_OUTPUT or O= specified.
-
-# OK, Make called in directory where kernel src resides
-# Do we want to locate output files in a separate directory?
+# Do we want to change the working directory?
ifeq ("$(origin O)", "command line")
KBUILD_OUTPUT := $(O)
endif

-ifneq ($(words $(subst :, ,$(CURDIR))), 1)
- $(error main directory cannot contain spaces nor colons)
+ifneq ($(KBUILD_OUTPUT),)
+# Make's built-in functions such as $(abspath ...), $(realpath ...) cannot
+# expand a shell special character '~'. We use a bit tredious way to handle it.
+abs_objtree := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) && pwd)
+$(if $(abs_objtree),, \
+ $(error failed to create output directory "$(KBUILD_OUTPUT)"))
+
+# $(realpath ...) resolves symlinks
+abs_objtree := $(realpath $(abs_objtree))
+else
+abs_objtree := $(CURDIR)
+endif # ifneq ($(KBUILD_OUTPUT),)
+
+ifeq ($(abs_objtree),$(CURDIR))
+# Suppress "Entering directory ..." unless we are changing the work directory.
+MAKEFLAGS += --no-print-directory
+else
+need-sub-make := 1
endif

-ifneq ($(KBUILD_OUTPUT),)
-# check that the output directory actually exists
-saved-output := $(KBUILD_OUTPUT)
-KBUILD_OUTPUT := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) \
- && pwd)
-$(if $(KBUILD_OUTPUT),, \
- $(error failed to create output directory "$(saved-output)"))
+abs_srctree := $(realpath $(dir $(lastword $(MAKEFILE_LIST))))
+
+ifneq ($(words $(subst :, ,$(abs_srctree))), 1)
+$(error source directory cannot contain spaces or colons)
+endif

+ifneq ($(abs_srctree),$(abs_objtree))
# Look for make include files relative to root of kernel src
#
# This does not become effective immediately because MAKEFLAGS is re-parsed
-# once after the Makefile is read. It is OK since we are going to invoke
-# 'sub-make' below.
-MAKEFLAGS += --include-dir=$(CURDIR)
-
+# once after the Makefile is read. We need to invoke sub-make.
+MAKEFLAGS += --include-dir=$(abs_srctree)
need-sub-make := 1
-else
-
-# Do not print "Entering directory ..." at all for in-tree build.
-MAKEFLAGS += --no-print-directory
-
-endif # ifneq ($(KBUILD_OUTPUT),)
+endif

ifneq ($(filter 3.%,$(MAKE_VERSION)),)
# 'MAKEFLAGS += -rR' does not immediately become effective for GNU Make 3.x
@@ -155,6 +164,7 @@ need-sub-make := 1
$(lastword $(MAKEFILE_LIST)): ;
endif

+export abs_srctree abs_objtree
export sub_make_done := 1

ifeq ($(need-sub-make),1)
@@ -166,9 +176,7 @@ $(filter-out _all sub-make $(lastword $(MAKEFILE_LIST)), $(MAKECMDGOALS)) _all:

# Invoke a second make in the output directory, passing relevant variables
sub-make:
- $(Q)$(MAKE) \
- $(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \
- -f $(CURDIR)/Makefile $(MAKECMDGOALS)
+ $(Q)$(MAKE) -C $(abs_objtree) -f $(abs_srctree)/Makefile $(MAKECMDGOALS)

endif # need-sub-make
endif # sub_make_done
@@ -213,16 +221,21 @@ ifeq ("$(origin M)", "command line")
KBUILD_EXTMOD := $(M)
endif

-ifeq ($(KBUILD_SRC),)
+ifeq ($(abs_srctree),$(abs_objtree))
# building in the source tree
srctree := .
else
- ifeq ($(KBUILD_SRC)/,$(dir $(CURDIR)))
+ ifeq ($(abs_srctree)/,$(dir $(abs_objtree)))
# building in a subdirectory of the source tree
srctree := ..
else
- srctree := $(KBUILD_SRC)
+ srctree := $(abs_srctree)
endif
+
+ # TODO:
+ # KBUILD_SRC is only used to distinguish in-tree/out-of-tree build.
+ # Replace it with $(srctree) or something.
+ KBUILD_SRC := $(abs_srctree)
endif

export KBUILD_CHECKSRC KBUILD_EXTMOD KBUILD_SRC
--
2.7.4


2019-03-30 12:06:42

by Masahiro Yamada

[permalink] [raw]
Subject: [PATCH 6/6] memory: squash drivers/memory/Makefile.asm-offsets

drivers/memory/Makefile.asm-offsets is small enough, and included
from a single place.

Squash it into drivers/memory/Makefile.

Signed-off-by: Masahiro Yamada <[email protected]>
---

drivers/memory/Makefile | 5 ++++-
drivers/memory/Makefile.asm-offsets | 4 ----
2 files changed, 4 insertions(+), 5 deletions(-)
delete mode 100644 drivers/memory/Makefile.asm-offsets

diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index 90161de..aaf6771 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -28,6 +28,9 @@ ti-emif-sram-objs := ti-emif-pm.o ti-emif-sram-pm.o

AFLAGS_ti-emif-sram-pm.o :=-Wa,-march=armv7-a

-include drivers/memory/Makefile.asm-offsets
+include/generated/ti-emif-asm-offsets.h: drivers/memory/emif-asm-offsets.s FORCE
+ $(call filechk,offsets,__TI_EMIF_ASM_OFFSETS_H__)
+
+targets += emif-asm-offsets.s

drivers/memory/ti-emif-sram-pm.o: include/generated/ti-emif-asm-offsets.h
diff --git a/drivers/memory/Makefile.asm-offsets b/drivers/memory/Makefile.asm-offsets
deleted file mode 100644
index 0447e17..0000000
--- a/drivers/memory/Makefile.asm-offsets
+++ /dev/null
@@ -1,4 +0,0 @@
-include/generated/ti-emif-asm-offsets.h: drivers/memory/emif-asm-offsets.s FORCE
- $(call filechk,offsets,__TI_EMIF_ASM_OFFSETS_H__)
-
-targets += emif-asm-offsets.s
--
2.7.4


2019-03-30 12:07:38

by Masahiro Yamada

[permalink] [raw]
Subject: [PATCH 3/6] kbuild: mkmakefile: do not check the generated Makefile marker

This hunk was added to avoid accidental overwrite of the top Makefile
in case O= points to the top of the source tree.

As commit 4f1127e20437 ("kbuild: fix infinite make recursion"),
it caused some troubles in the past because Kbuild assumes O=
as out-of-tree build, while it actually works in the source tree.

Now this works more properly; if O= points to the source directory,
it is handled as in-tree build. So, this sanity check is unneeded.

Signed-off-by: Masahiro Yamada <[email protected]>
---

scripts/mkmakefile | 6 ------
1 file changed, 6 deletions(-)

diff --git a/scripts/mkmakefile b/scripts/mkmakefile
index 412f13f..31de468 100755
--- a/scripts/mkmakefile
+++ b/scripts/mkmakefile
@@ -7,12 +7,6 @@
# Usage
# $1 - Kernel src directory

-# Only overwrite automatically generated Makefiles
-# (so we do not overwrite kernel Makefile)
-if test -e Makefile && ! grep -q Automatically Makefile
-then
- exit 0
-fi
if [ "${quiet}" != "silent_" ]; then
echo " GEN Makefile"
fi
--
2.7.4


2019-03-30 12:07:58

by Masahiro Yamada

[permalink] [raw]
Subject: [PATCH 5/6] kbuild: use $(srctree) instead of KBUILD_SRC to check out-of-tree build

KBUILD_SRC was conventionally used for some different purposes:
[1] To remember the source tree path
[2] As a flag to check if sub-make is already done
[3] As a flag to check if Kbuild runs out of tree

For [1], we do not need to remember it because the top Makefile
can compute it by $(realpath $(dir $(lastword $(MAKEFILE_LIST))))

[2] has been replaced with self-commenting 'sub_make_done'.

For [3], we can distinguish in-tree/out-of-tree by comparing
$(srctree) and '.'

This commit converts [3] to prepare for the KBUILD_SRC removal.

Signed-off-by: Masahiro Yamada <[email protected]>
---

Makefile | 6 +++---
scripts/Makefile.build | 2 +-
scripts/Makefile.host | 2 +-
scripts/Makefile.lib | 2 +-
scripts/Makefile.modbuiltin | 2 +-
scripts/gdb/linux/Makefile | 2 +-
scripts/tags.sh | 2 +-
7 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/Makefile b/Makefile
index 1b2a70e..fa441ca 100644
--- a/Makefile
+++ b/Makefile
@@ -448,7 +448,7 @@ USERINCLUDE := \
LINUXINCLUDE := \
-I$(srctree)/arch/$(SRCARCH)/include \
-I$(objtree)/arch/$(SRCARCH)/include/generated \
- $(if $(KBUILD_SRC), -I$(srctree)/include) \
+ $(if $(filter .,$(srctree)),,-I$(srctree)/include) \
-I$(objtree)/include \
$(USERINCLUDE)

@@ -509,7 +509,7 @@ PHONY += outputmakefile
# At the same time when output Makefile generated, generate .gitignore to
# ignore whole output directory
outputmakefile:
-ifneq ($(KBUILD_SRC),)
+ifneq ($(srctree),.)
$(Q)ln -fsn $(srctree) source
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile $(srctree)
$(Q)test -e .gitignore || \
@@ -1087,7 +1087,7 @@ PHONY += prepare archprepare prepare1 prepare3
# and if so do:
# 1) Check that make has not been executed in the kernel src $(srctree)
prepare3: include/config/kernel.release
-ifneq ($(KBUILD_SRC),)
+ifneq ($(srctree),.)
@$(kecho) ' Using $(srctree) as source for kernel'
$(Q)if [ -f $(srctree)/.config -o -d $(srctree)/include/config ]; then \
echo >&2 " $(srctree) is not clean, please run 'make mrproper'"; \
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 76ca30c..9dddfb6 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -501,7 +501,7 @@ existing-targets := $(wildcard $(sort $(targets)))

-include $(foreach f,$(existing-targets),$(dir $(f)).$(notdir $(f)).cmd)

-ifneq ($(KBUILD_SRC),)
+ifneq ($(srctree),.)
# Create directories for object files if they do not exist
obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets))))
# If targets exist, their directories apparently exist. Skip mkdir.
diff --git a/scripts/Makefile.host b/scripts/Makefile.host
index a115259..73b8041 100644
--- a/scripts/Makefile.host
+++ b/scripts/Makefile.host
@@ -71,7 +71,7 @@ __hostc_flags = $(_hostc_flags)
__hostcxx_flags = $(_hostcxx_flags)

ifeq ($(KBUILD_EXTMOD),)
-ifneq ($(KBUILD_SRC),)
+ifneq ($(srctree),.)
__hostc_flags = -I$(obj) $(call flags,_hostc_flags)
__hostcxx_flags = -I$(obj) $(call flags,_hostcxx_flags)
endif
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 8a1f64f..41e98fa 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -144,7 +144,7 @@ __cpp_flags = $(_cpp_flags)
# If building the kernel in a separate objtree expand all occurrences
# of -Idir to -I$(srctree)/dir except for absolute paths (starting with '/').
ifeq ($(KBUILD_EXTMOD),)
-ifneq ($(KBUILD_SRC),)
+ifneq ($(srctree),.)

# -I$(obj) locates generated .h files
# $(call addtree,-I$(obj)) locates .h files in srctree, from generated .c files
diff --git a/scripts/Makefile.modbuiltin b/scripts/Makefile.modbuiltin
index a072a42..ea90a90 100644
--- a/scripts/Makefile.modbuiltin
+++ b/scripts/Makefile.modbuiltin
@@ -15,7 +15,7 @@ include include/config/tristate.conf

include scripts/Kbuild.include

-ifneq ($(KBUILD_SRC),)
+ifneq ($(srctree),.)
# Create output directory if not already present
_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
endif
diff --git a/scripts/gdb/linux/Makefile b/scripts/gdb/linux/Makefile
index 3df395a..9fd3d8e 100644
--- a/scripts/gdb/linux/Makefile
+++ b/scripts/gdb/linux/Makefile
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0

-ifneq ($(KBUILD_SRC),)
+ifneq ($(srctree),.)

symlinks := $(patsubst $(srctree)/$(src)/%,%,$(wildcard $(srctree)/$(src)/*.py))

diff --git a/scripts/tags.sh b/scripts/tags.sh
index f470d99..6a55180 100755
--- a/scripts/tags.sh
+++ b/scripts/tags.sh
@@ -19,7 +19,7 @@ ignore="$ignore ( -name *.mod.c ) -prune -o"
# Do not use full path if we do not use O=.. builds
# Use make O=. {tags|cscope}
# to force full paths for a non-O= build
-if [ "${KBUILD_SRC}" = "" ]; then
+if [ "${srctree}" = "." ]; then
tree=
else
tree=${srctree}/
--
2.7.4


2019-04-02 04:49:31

by Kieran Bingham

[permalink] [raw]
Subject: Re: [PATCH 2/6] kbuild: allow Kbuild to start from any directory

Hi Yamada-san,

Thank you for the patches,

I like the direction this series is taking.

Small spelling error spotted below...
But as I've now gone through all of it I'll offer

Reviewed-by: Kieran Bingham <[email protected]>


On 30/03/2019 12:04, Masahiro Yamada wrote:
> Kbuild always runs in the top of the output directory.
>
> If Make starts in the source directory with O=, it relocates the
> working directory to the location specified by O=.
>
> Also, users can start build from the output directory by using the
> Makefile generated by scripts/mkmakefile.
>
> With a little more effort, Kbuild will be able to start from any
> directory path.
>
> This commit allows to specify the source directory by using
> the -f option.
>
> For example, you can do:
>
> $ cd path/to/output/dir
> $ make -f path/to/source/dir/Makefile
>
> Or, for the equivalent behavior, you can do:
>
> $ make O=path/to/output/dir -f path/to/source/dir/Makefile
>
> KBUILD_SRC is now deprecated.
>
> Signed-off-by: Masahiro Yamada <[email protected]>
> ---
>
> Makefile | 87 +++++++++++++++++++++++++++++++++++++---------------------------
> 1 file changed, 50 insertions(+), 37 deletions(-)
>
> diff --git a/Makefile b/Makefile
> index 9cbd367..1b2a70e 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -96,56 +96,65 @@ endif
>
> export quiet Q KBUILD_VERBOSE
>
> -# kbuild supports saving output files in a separate directory.
> -# To locate output files in a separate directory two syntaxes are supported.
> -# In both cases the working directory must be the root of the kernel src.
> +# Kbuild will save output files in the current working directory.
> +# This does not need to match to the root of the kernel source tree.
> +#
> +# For example, you can do this:
> +#
> +# cd /dir/to/store/output/files; make -f /dir/to/kernel/source/Makefile
> +#
> +# If you want to save output files in a different location, there are
> +# two syntaxes to specify it.
> +#
> # 1) O=
> # Use "make O=dir/to/store/output/files/"
> #
> # 2) Set KBUILD_OUTPUT
> -# Set the environment variable KBUILD_OUTPUT to point to the directory
> -# where the output files shall be placed.
> -# export KBUILD_OUTPUT=dir/to/store/output/files/
> -# make
> +# Set the environment variable KBUILD_OUTPUT to point to the output directory.
> +# export KBUILD_OUTPUT=dir/to/store/output/files/; make
> #
> # The O= assignment takes precedence over the KBUILD_OUTPUT environment
> # variable.
>
> -# KBUILD_SRC is not intended to be used by the regular user (for now),
> -# it is set on invocation of make with KBUILD_OUTPUT or O= specified.
> -
> -# OK, Make called in directory where kernel src resides
> -# Do we want to locate output files in a separate directory?
> +# Do we want to change the working directory?
> ifeq ("$(origin O)", "command line")
> KBUILD_OUTPUT := $(O)
> endif
>
> -ifneq ($(words $(subst :, ,$(CURDIR))), 1)
> - $(error main directory cannot contain spaces nor colons)
> +ifneq ($(KBUILD_OUTPUT),)
> +# Make's built-in functions such as $(abspath ...), $(realpath ...) cannot
> +# expand a shell special character '~'. We use a bit tredious way to handle it.

very minor, but I noticed while looking through the series ^^

s/bit tredious/somewhat tedious/



> +abs_objtree := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) && pwd)
> +$(if $(abs_objtree),, \
> + $(error failed to create output directory "$(KBUILD_OUTPUT)"))
> +
> +# $(realpath ...) resolves symlinks
> +abs_objtree := $(realpath $(abs_objtree))
> +else
> +abs_objtree := $(CURDIR)
> +endif # ifneq ($(KBUILD_OUTPUT),)
> +
> +ifeq ($(abs_objtree),$(CURDIR))
> +# Suppress "Entering directory ..." unless we are changing the work directory.
> +MAKEFLAGS += --no-print-directory
> +else
> +need-sub-make := 1
> endif
>
> -ifneq ($(KBUILD_OUTPUT),)
> -# check that the output directory actually exists
> -saved-output := $(KBUILD_OUTPUT)
> -KBUILD_OUTPUT := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) \
> - && pwd)
> -$(if $(KBUILD_OUTPUT),, \
> - $(error failed to create output directory "$(saved-output)"))
> +abs_srctree := $(realpath $(dir $(lastword $(MAKEFILE_LIST))))
> +
> +ifneq ($(words $(subst :, ,$(abs_srctree))), 1)
> +$(error source directory cannot contain spaces or colons)
> +endif
>
> +ifneq ($(abs_srctree),$(abs_objtree))
> # Look for make include files relative to root of kernel src
> #
> # This does not become effective immediately because MAKEFLAGS is re-parsed
> -# once after the Makefile is read. It is OK since we are going to invoke
> -# 'sub-make' below.
> -MAKEFLAGS += --include-dir=$(CURDIR)
> -
> +# once after the Makefile is read. We need to invoke sub-make.
> +MAKEFLAGS += --include-dir=$(abs_srctree)
> need-sub-make := 1
> -else
> -
> -# Do not print "Entering directory ..." at all for in-tree build.
> -MAKEFLAGS += --no-print-directory
> -
> -endif # ifneq ($(KBUILD_OUTPUT),)
> +endif
>
> ifneq ($(filter 3.%,$(MAKE_VERSION)),)
> # 'MAKEFLAGS += -rR' does not immediately become effective for GNU Make 3.x
> @@ -155,6 +164,7 @@ need-sub-make := 1
> $(lastword $(MAKEFILE_LIST)): ;
> endif
>
> +export abs_srctree abs_objtree
> export sub_make_done := 1
>
> ifeq ($(need-sub-make),1)
> @@ -166,9 +176,7 @@ $(filter-out _all sub-make $(lastword $(MAKEFILE_LIST)), $(MAKECMDGOALS)) _all:
>
> # Invoke a second make in the output directory, passing relevant variables
> sub-make:
> - $(Q)$(MAKE) \
> - $(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \
> - -f $(CURDIR)/Makefile $(MAKECMDGOALS)
> + $(Q)$(MAKE) -C $(abs_objtree) -f $(abs_srctree)/Makefile $(MAKECMDGOALS)
>
> endif # need-sub-make
> endif # sub_make_done
> @@ -213,16 +221,21 @@ ifeq ("$(origin M)", "command line")
> KBUILD_EXTMOD := $(M)
> endif
>
> -ifeq ($(KBUILD_SRC),)
> +ifeq ($(abs_srctree),$(abs_objtree))
> # building in the source tree
> srctree := .
> else
> - ifeq ($(KBUILD_SRC)/,$(dir $(CURDIR)))
> + ifeq ($(abs_srctree)/,$(dir $(abs_objtree)))
> # building in a subdirectory of the source tree
> srctree := ..
> else
> - srctree := $(KBUILD_SRC)
> + srctree := $(abs_srctree)
> endif
> +
> + # TODO:
> + # KBUILD_SRC is only used to distinguish in-tree/out-of-tree build.
> + # Replace it with $(srctree) or something.
> + KBUILD_SRC := $(abs_srctree)
> endif
>
> export KBUILD_CHECKSRC KBUILD_EXTMOD KBUILD_SRC
>


--
--
Kieran

2019-04-02 08:05:13

by Kieran Bingham

[permalink] [raw]
Subject: Re: [PATCH 4/6] kbuild: mkmakefile: generate a simple wrapper of top Makefile

Hi Yamada-san,

On 30/03/2019 12:04, Masahiro Yamada wrote:
> Now that Kbuild is able to start from any directory, the generated
> Makefile can simply wrap the top Makefile.

This is a really nice simplification :)

Reviewed-by: Kieran Bingham <[email protected]>

> Signed-off-by: Masahiro Yamada <[email protected]>
> ---
>
> scripts/mkmakefile | 20 ++------------------
> 1 file changed, 2 insertions(+), 18 deletions(-)
>
> diff --git a/scripts/mkmakefile b/scripts/mkmakefile
> index 31de468..4d0faeb 100755
> --- a/scripts/mkmakefile
> +++ b/scripts/mkmakefile
> @@ -12,22 +12,6 @@ if [ "${quiet}" != "silent_" ]; then
> fi
>
> cat << EOF > Makefile
> -# Automatically generated by $0: don't edit
> -
> -ifeq ("\$(origin V)", "command line")
> -VERBOSE := \$(V)
> -endif
> -ifneq (\$(VERBOSE),1)
> -Q := @
> -endif
> -
> -MAKEFLAGS += --no-print-directory
> -
> -.PHONY: __sub-make \$(MAKECMDGOALS)
> -
> -__sub-make:
> - \$(Q)\$(MAKE) -C $1 O=\$(CURDIR) \$(MAKECMDGOALS)
> -
> -\$(filter-out __sub-make, \$(MAKECMDGOALS)): __sub-make
> - @:
> +# Automatically generated by $(realpath $0): don't edit
> +include $(realpath $1/Makefile)
> EOF
>


--
--
Kieran

2019-04-02 14:26:20

by Masahiro Yamada

[permalink] [raw]
Subject: Re: [PATCH 2/6] kbuild: allow Kbuild to start from any directory

Hi Kieran,


On Tue, Apr 2, 2019 at 1:41 PM Kieran Bingham <[email protected]> wrote:
>
> Hi Yamada-san,
>
> Thank you for the patches,
>
> I like the direction this series is taking.
>
> Small spelling error spotted below...
> But as I've now gone through all of it I'll offer
>
> Reviewed-by: Kieran Bingham <[email protected]>
>
>
> On 30/03/2019 12:04, Masahiro Yamada wrote:
> > Kbuild always runs in the top of the output directory.
> >
> > If Make starts in the source directory with O=, it relocates the
> > working directory to the location specified by O=.
> >
> > Also, users can start build from the output directory by using the
> > Makefile generated by scripts/mkmakefile.
> >
> > With a little more effort, Kbuild will be able to start from any
> > directory path.
> >
> > This commit allows to specify the source directory by using
> > the -f option.
> >
> > For example, you can do:
> >
> > $ cd path/to/output/dir
> > $ make -f path/to/source/dir/Makefile
> >
> > Or, for the equivalent behavior, you can do:
> >
> > $ make O=path/to/output/dir -f path/to/source/dir/Makefile
> >
> > KBUILD_SRC is now deprecated.
> >
> > Signed-off-by: Masahiro Yamada <[email protected]>
> > ---
> >
> > Makefile | 87 +++++++++++++++++++++++++++++++++++++---------------------------
> > 1 file changed, 50 insertions(+), 37 deletions(-)
> >
> > diff --git a/Makefile b/Makefile
> > index 9cbd367..1b2a70e 100644
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -96,56 +96,65 @@ endif
> >
> > export quiet Q KBUILD_VERBOSE
> >
> > -# kbuild supports saving output files in a separate directory.
> > -# To locate output files in a separate directory two syntaxes are supported.
> > -# In both cases the working directory must be the root of the kernel src.
> > +# Kbuild will save output files in the current working directory.
> > +# This does not need to match to the root of the kernel source tree.
> > +#
> > +# For example, you can do this:
> > +#
> > +# cd /dir/to/store/output/files; make -f /dir/to/kernel/source/Makefile
> > +#
> > +# If you want to save output files in a different location, there are
> > +# two syntaxes to specify it.
> > +#
> > # 1) O=
> > # Use "make O=dir/to/store/output/files/"
> > #
> > # 2) Set KBUILD_OUTPUT
> > -# Set the environment variable KBUILD_OUTPUT to point to the directory
> > -# where the output files shall be placed.
> > -# export KBUILD_OUTPUT=dir/to/store/output/files/
> > -# make
> > +# Set the environment variable KBUILD_OUTPUT to point to the output directory.
> > +# export KBUILD_OUTPUT=dir/to/store/output/files/; make
> > #
> > # The O= assignment takes precedence over the KBUILD_OUTPUT environment
> > # variable.
> >
> > -# KBUILD_SRC is not intended to be used by the regular user (for now),
> > -# it is set on invocation of make with KBUILD_OUTPUT or O= specified.
> > -
> > -# OK, Make called in directory where kernel src resides
> > -# Do we want to locate output files in a separate directory?
> > +# Do we want to change the working directory?
> > ifeq ("$(origin O)", "command line")
> > KBUILD_OUTPUT := $(O)
> > endif
> >
> > -ifneq ($(words $(subst :, ,$(CURDIR))), 1)
> > - $(error main directory cannot contain spaces nor colons)
> > +ifneq ($(KBUILD_OUTPUT),)
> > +# Make's built-in functions such as $(abspath ...), $(realpath ...) cannot
> > +# expand a shell special character '~'. We use a bit tredious way to handle it.
>
> very minor, but I noticed while looking through the series ^^
>
> s/bit tredious/somewhat tedious/


Oops, 'tredious' is a typo.

As a non-native, I do not understand the difference
between 'a bit' and 'somewhat', but I will apply it.

Thanks.





--
Best Regards
Masahiro Yamada

2019-04-07 09:23:34

by Masahiro Yamada

[permalink] [raw]
Subject: Re: [PATCH 1/6] kbuild: pass $(MAKECMDGOALS) to sub-make as is

On Sat, Mar 30, 2019 at 9:04 PM Masahiro Yamada
<[email protected]> wrote:
>
> Manipulating $(MAKECMDGOALS) for sub-make seems odd to me.
>
> [1] 'make O=foo sub-make' is turned into 'make O=foo', which builds
> the default targets. It would make sense to terminate the build with:
>
> *** No rule to make target 'sub-make'. Stop.
>
> [2] 'make O=foo defconfig _all' is turned into 'make O=foo defconfig',
> which changes the behavior.
>
> Let's pass $(MAKECMDGOALS) as is.
>
> Signed-off-by: Masahiro Yamada <[email protected]>
> ---

Series, applied to linux-kbuild.


> Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Makefile b/Makefile
> index 92ad066..9cbd367 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -168,7 +168,7 @@ $(filter-out _all sub-make $(lastword $(MAKEFILE_LIST)), $(MAKECMDGOALS)) _all:
> sub-make:
> $(Q)$(MAKE) \
> $(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \
> - -f $(CURDIR)/Makefile $(filter-out _all sub-make,$(MAKECMDGOALS))
> + -f $(CURDIR)/Makefile $(MAKECMDGOALS)
>
> endif # need-sub-make
> endif # sub_make_done
> --
> 2.7.4
>


--
Best Regards
Masahiro Yamada