This patchset remove some code related to other chips.
Code related to MCS index values bigger than 7 and
smaller than 32, unsupported multiple spatial streams,
rf paths, rf types.
Some code cleaning in removal sites is done as well.
Tested-on: Lenovo ideapad MiiX 300-10IBY
Fabio Aiuto (21):
staging: rtl8723bs: remove code related to unsupported MCS index
values
staging: rtl8723bs: remove unneeded loop
staging: rtl8723bs: do some code cleaning in modified function
staging: rtl8723bs: move function to file hal/odm_HWConfig.c
staging: rtl8723bs: remove empty files
staging: rtl8723bs: remove wrapping static function
staging: rtl8723bs: beautify function ODM_PhyStatusQuery()
staging: rtl8723bs: fix right side of condition
staging: rtl8723bs: clean driver from unused RF paths
staging: rtl8723bs: remove unused macros
staging: rtl8723bs: remove unused struct member
staging: rtl8723bs: remove rf type branching (first patch)
staging: rtl8723bs: remove rf type branching (second patch)
staging: rtl8723bs: remove rf type branching (third patch)
staging: rtl8723bs: remove rf type branching (fourth patch)
staging: rtl8723bs: remove unused rtw_rf_config module param
staging: rtl8723bs: remove unused macro in include/hal_data.h
staging: rtl8723bs: remove RF_*TX enum
staging: rtl8723bs: use MAX_RF_PATH_NUM as ceiling to rf path index
staging: rtl8723bs: fix tx power tables size
staging: rtl8723bs: remove unused RF_*T*R enum
drivers/staging/rtl8723bs/Makefile | 1 -
drivers/staging/rtl8723bs/core/rtw_ap.c | 8 +-
drivers/staging/rtl8723bs/core/rtw_debug.c | 18 +-
.../staging/rtl8723bs/core/rtw_ieee80211.c | 73 +--
.../staging/rtl8723bs/core/rtw_ioctl_set.c | 6 +-
drivers/staging/rtl8723bs/core/rtw_mlme.c | 36 +-
.../staging/rtl8723bs/core/rtw_wlan_util.c | 38 +-
.../staging/rtl8723bs/hal/HalHWImg8723B_BB.c | 17 +-
.../staging/rtl8723bs/hal/HalHWImg8723B_RF.c | 86 +---
drivers/staging/rtl8723bs/hal/HalPhyRf.c | 52 +-
.../staging/rtl8723bs/hal/HalPhyRf_8723B.c | 164 +++----
drivers/staging/rtl8723bs/hal/hal_com.c | 165 +------
.../staging/rtl8723bs/hal/hal_com_phycfg.c | 446 +++---------------
drivers/staging/rtl8723bs/hal/odm.c | 52 +-
drivers/staging/rtl8723bs/hal/odm.h | 25 -
.../staging/rtl8723bs/hal/odm_CfoTracking.c | 36 +-
.../staging/rtl8723bs/hal/odm_CfoTracking.h | 2 +-
drivers/staging/rtl8723bs/hal/odm_DIG.c | 3 +-
drivers/staging/rtl8723bs/hal/odm_HWConfig.c | 341 ++++++-------
drivers/staging/rtl8723bs/hal/odm_HWConfig.h | 29 +-
.../staging/rtl8723bs/hal/odm_NoiseMonitor.c | 23 +-
drivers/staging/rtl8723bs/hal/odm_RTL8723B.c | 36 --
drivers/staging/rtl8723bs/hal/odm_RTL8723B.h | 14 -
.../rtl8723bs/hal/odm_RegConfig8723B.c | 7 +-
.../rtl8723bs/hal/odm_RegConfig8723B.h | 11 +-
.../staging/rtl8723bs/hal/odm_RegDefine11N.h | 2 -
drivers/staging/rtl8723bs/hal/odm_precomp.h | 1 -
drivers/staging/rtl8723bs/hal/odm_reg.h | 4 -
drivers/staging/rtl8723bs/hal/rtl8723b_dm.c | 10 -
.../staging/rtl8723bs/hal/rtl8723b_hal_init.c | 19 +-
.../staging/rtl8723bs/hal/rtl8723b_phycfg.c | 42 +-
.../staging/rtl8723bs/hal/rtl8723b_rf6052.c | 21 +-
.../staging/rtl8723bs/hal/rtl8723bs_recv.c | 2 +-
drivers/staging/rtl8723bs/hal/sdio_halinit.c | 2 -
.../rtl8723bs/include/Hal8192CPhyReg.h | 4 -
drivers/staging/rtl8723bs/include/HalVerDef.h | 18 -
drivers/staging/rtl8723bs/include/drv_types.h | 1 -
drivers/staging/rtl8723bs/include/hal_com.h | 35 +-
.../rtl8723bs/include/hal_com_phycfg.h | 20 +-
.../staging/rtl8723bs/include/hal_com_reg.h | 19 -
drivers/staging/rtl8723bs/include/hal_data.h | 24 +-
drivers/staging/rtl8723bs/include/hal_pg.h | 8 +-
drivers/staging/rtl8723bs/include/hal_phy.h | 3 +-
drivers/staging/rtl8723bs/include/ieee80211.h | 26 +-
.../staging/rtl8723bs/include/rtl8723b_xmit.h | 8 -
drivers/staging/rtl8723bs/include/rtw_rf.h | 10 -
.../staging/rtl8723bs/os_dep/ioctl_cfg80211.c | 23 +-
drivers/staging/rtl8723bs/os_dep/os_intfs.c | 4 -
48 files changed, 501 insertions(+), 1494 deletions(-)
delete mode 100644 drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
delete mode 100644 drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
--
2.20.1
remove unneeded loop over multiple spatial streams
as phy only works on 1 spatial stream.
Removed commented code, removed condition
always satisfied, beautified comments.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/odm_HWConfig.c | 43 +++++++++-----------
1 file changed, 20 insertions(+), 23 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
index 17a5850183ad..af4d5ab1b382 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
@@ -78,7 +78,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(
struct odm_packet_info *pPktinfo
)
{
- u8 i, Max_spatial_stream;
+ u8 i;
s8 rx_pwr[4], rx_pwr_all = 0;
u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
u8 RSSI, total_rssi = 0;
@@ -182,30 +182,27 @@ static void odm_RxPhyStatus92CSeries_Parsing(
pPhyInfo->rx_power = rx_pwr_all;
pPhyInfo->recv_signal_power = rx_pwr_all;
- {/* pMgntInfo->CustomerID != RT_CID_819x_Lenovo */
- /* */
- /* (3)EVM of HT rate */
- /* */
- Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
-
- for (i = 0; i < Max_spatial_stream; i++) {
- /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
- /* fill most significant bit to "zero" when doing shifting operation which may change a negative */
- /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
- EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
-
- /* if (pPktinfo->bPacketMatchBSSID) */
- {
- if (i == ODM_RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
- pPhyInfo->signal_quality = (u8)(EVM & 0xff);
-
- pPhyInfo->rx_mimo_signal_quality[i] = (u8)(EVM & 0xff);
- }
- }
- }
+ /*
+ * (3)EVM of HT rate
+ *
+ * Only spatial stream 1 makes sense
+ *
+ * Do not use shift operation like "rx_evmX >>= 1"
+ * because the compiler of free build environment
+ * fill most significant bit to "zero" when doing
+ * shifting operation which may change a negative
+ * value to positive one, then the dbm value (which
+ * is supposed to be negative) is not correct
+ * anymore.
+ */
+ EVM = odm_EVMdbToPercentage(pPhyStaRpt->stream_rxevm[0]); /* dbm */
+
+ /* Fill value in RFD, Get the first spatial stream only */
+ pPhyInfo->signal_quality = (u8)(EVM & 0xff);
+
+ pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_A] = (u8)(EVM & 0xff);
ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail);
-
}
/* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
--
2.20.1
remove code related to MCS index from 8 to 31 for
rtl8723bs works only with index from 0 to 7 and
index 32.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/hal_com.c | 144 ---------
.../staging/rtl8723bs/hal/hal_com_phycfg.c | 275 +-----------------
drivers/staging/rtl8723bs/hal/odm_HWConfig.c | 5 +-
.../staging/rtl8723bs/hal/odm_RegDefine11N.h | 2 -
drivers/staging/rtl8723bs/hal/odm_reg.h | 4 -
drivers/staging/rtl8723bs/include/hal_com.h | 35 +--
.../rtl8723bs/include/hal_com_phycfg.h | 3 -
.../staging/rtl8723bs/include/hal_com_reg.h | 19 --
drivers/staging/rtl8723bs/include/ieee80211.h | 24 --
.../staging/rtl8723bs/include/rtl8723b_xmit.h | 8 -
10 files changed, 8 insertions(+), 511 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/hal_com.c b/drivers/staging/rtl8723bs/hal/hal_com.c
index fbe6b64aa1fb..7dd49c8538e4 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com.c
@@ -222,78 +222,6 @@ u8 MRateToHwRate(u8 rate)
case MGN_MCS7:
ret = DESC_RATEMCS7;
break;
- case MGN_MCS8:
- ret = DESC_RATEMCS8;
- break;
- case MGN_MCS9:
- ret = DESC_RATEMCS9;
- break;
- case MGN_MCS10:
- ret = DESC_RATEMCS10;
- break;
- case MGN_MCS11:
- ret = DESC_RATEMCS11;
- break;
- case MGN_MCS12:
- ret = DESC_RATEMCS12;
- break;
- case MGN_MCS13:
- ret = DESC_RATEMCS13;
- break;
- case MGN_MCS14:
- ret = DESC_RATEMCS14;
- break;
- case MGN_MCS15:
- ret = DESC_RATEMCS15;
- break;
- case MGN_MCS16:
- ret = DESC_RATEMCS16;
- break;
- case MGN_MCS17:
- ret = DESC_RATEMCS17;
- break;
- case MGN_MCS18:
- ret = DESC_RATEMCS18;
- break;
- case MGN_MCS19:
- ret = DESC_RATEMCS19;
- break;
- case MGN_MCS20:
- ret = DESC_RATEMCS20;
- break;
- case MGN_MCS21:
- ret = DESC_RATEMCS21;
- break;
- case MGN_MCS22:
- ret = DESC_RATEMCS22;
- break;
- case MGN_MCS23:
- ret = DESC_RATEMCS23;
- break;
- case MGN_MCS24:
- ret = DESC_RATEMCS24;
- break;
- case MGN_MCS25:
- ret = DESC_RATEMCS25;
- break;
- case MGN_MCS26:
- ret = DESC_RATEMCS26;
- break;
- case MGN_MCS27:
- ret = DESC_RATEMCS27;
- break;
- case MGN_MCS28:
- ret = DESC_RATEMCS28;
- break;
- case MGN_MCS29:
- ret = DESC_RATEMCS29;
- break;
- case MGN_MCS30:
- ret = DESC_RATEMCS30;
- break;
- case MGN_MCS31:
- ret = DESC_RATEMCS31;
- break;
default:
break;
}
@@ -366,78 +294,6 @@ u8 HwRateToMRate(u8 rate)
case DESC_RATEMCS7:
ret_rate = MGN_MCS7;
break;
- case DESC_RATEMCS8:
- ret_rate = MGN_MCS8;
- break;
- case DESC_RATEMCS9:
- ret_rate = MGN_MCS9;
- break;
- case DESC_RATEMCS10:
- ret_rate = MGN_MCS10;
- break;
- case DESC_RATEMCS11:
- ret_rate = MGN_MCS11;
- break;
- case DESC_RATEMCS12:
- ret_rate = MGN_MCS12;
- break;
- case DESC_RATEMCS13:
- ret_rate = MGN_MCS13;
- break;
- case DESC_RATEMCS14:
- ret_rate = MGN_MCS14;
- break;
- case DESC_RATEMCS15:
- ret_rate = MGN_MCS15;
- break;
- case DESC_RATEMCS16:
- ret_rate = MGN_MCS16;
- break;
- case DESC_RATEMCS17:
- ret_rate = MGN_MCS17;
- break;
- case DESC_RATEMCS18:
- ret_rate = MGN_MCS18;
- break;
- case DESC_RATEMCS19:
- ret_rate = MGN_MCS19;
- break;
- case DESC_RATEMCS20:
- ret_rate = MGN_MCS20;
- break;
- case DESC_RATEMCS21:
- ret_rate = MGN_MCS21;
- break;
- case DESC_RATEMCS22:
- ret_rate = MGN_MCS22;
- break;
- case DESC_RATEMCS23:
- ret_rate = MGN_MCS23;
- break;
- case DESC_RATEMCS24:
- ret_rate = MGN_MCS24;
- break;
- case DESC_RATEMCS25:
- ret_rate = MGN_MCS25;
- break;
- case DESC_RATEMCS26:
- ret_rate = MGN_MCS26;
- break;
- case DESC_RATEMCS27:
- ret_rate = MGN_MCS27;
- break;
- case DESC_RATEMCS28:
- ret_rate = MGN_MCS28;
- break;
- case DESC_RATEMCS29:
- ret_rate = MGN_MCS29;
- break;
- case DESC_RATEMCS30:
- ret_rate = MGN_MCS30;
- break;
- case DESC_RATEMCS31:
- ret_rate = MGN_MCS31;
- break;
default:
break;
}
diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
index 4fb2884fce38..03c174aab08d 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
@@ -29,15 +29,6 @@ u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath,
case HT_MCS0_MCS7:
value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2];
break;
- case HT_MCS8_MCS15:
- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3];
- break;
- case HT_MCS16_MCS23:
- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4];
- break;
- case HT_MCS24_MCS31:
- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5];
- break;
default:
break;
}
@@ -69,15 +60,6 @@ phy_SetTxPowerByRateBase(
case HT_MCS0_MCS7:
pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2] = Value;
break;
- case HT_MCS8_MCS15:
- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][3] = Value;
- break;
- case HT_MCS16_MCS23:
- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][4] = Value;
- break;
- case HT_MCS24_MCS31:
- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][5] = Value;
- break;
default:
break;
}
@@ -99,13 +81,6 @@ struct adapter *padapter
base = PHY_GetTxPowerByRate(padapter, path, RF_1TX, MGN_MCS7);
phy_SetTxPowerByRateBase(padapter, path, HT_MCS0_MCS7, RF_1TX, base);
-
- base = PHY_GetTxPowerByRate(padapter, path, RF_2TX, MGN_MCS15);
- phy_SetTxPowerByRateBase(padapter, path, HT_MCS8_MCS15, RF_2TX, base);
-
- base = PHY_GetTxPowerByRate(padapter, path, RF_3TX, MGN_MCS23);
- phy_SetTxPowerByRateBase(padapter, path, HT_MCS16_MCS23, RF_3TX, base);
-
}
}
@@ -266,33 +241,6 @@ PHY_GetRateValuesOfTxPowerByRate(
*RateNum = 4;
break;
- case rTxAGC_A_Mcs11_Mcs08:
- case rTxAGC_B_Mcs11_Mcs08:
- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS8);
- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS9);
- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS10);
- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS11);
- for (i = 0; i < 4; ++i) {
- PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
- ((Value >> (i * 8)) & 0xF));
- }
- *RateNum = 4;
- break;
-
- case rTxAGC_A_Mcs15_Mcs12:
- case rTxAGC_B_Mcs15_Mcs12:
- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS12);
- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS13);
- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS14);
- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS15);
- for (i = 0; i < 4; ++i) {
- PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
- ((Value >> (i * 8)) & 0xF));
- }
- *RateNum = 4;
-
- break;
-
case rTxAGC_B_CCK1_55_Mcs32:
RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_1M);
RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_2M);
@@ -379,66 +327,6 @@ PHY_GetRateValuesOfTxPowerByRate(
*RateNum = 4;
break;
- case 0xC34:
- case 0xE34:
- case 0x1834:
- case 0x1a34:
- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS8);
- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS9);
- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS10);
- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS11);
- for (i = 0; i < 4; ++i) {
- PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
- ((Value >> (i * 8)) & 0xF));
- }
- *RateNum = 4;
- break;
-
- case 0xC38:
- case 0xE38:
- case 0x1838:
- case 0x1a38:
- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS12);
- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS13);
- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS14);
- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS15);
- for (i = 0; i < 4; ++i) {
- PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
- ((Value >> (i * 8)) & 0xF));
- }
- *RateNum = 4;
- break;
-
- case 0xCD8:
- case 0xED8:
- case 0x18D8:
- case 0x1aD8:
- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS16);
- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS17);
- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS18);
- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS19);
- for (i = 0; i < 4; ++i) {
- PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
- ((Value >> (i * 8)) & 0xF));
- }
- *RateNum = 4;
- break;
-
- case 0xCDC:
- case 0xEDC:
- case 0x18DC:
- case 0x1aDC:
- RateIndex[0] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS20);
- RateIndex[1] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS21);
- RateIndex[2] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS22);
- RateIndex[3] = PHY_GetRateIndexOfTxPowerByRate(MGN_MCS23);
- for (i = 0; i < 4; ++i) {
- PwrByRateVal[i] = (s8) ((((Value >> (i * 8 + 4)) & 0xF)) * 10 +
- ((Value >> (i * 8)) & 0xF));
- }
- *RateNum = 4;
- break;
-
default:
break;
}
@@ -530,13 +418,6 @@ struct adapter *padapter
u8 mcs0_7Rates[8] = {
MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7
};
- u8 mcs8_15Rates[8] = {
- MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15
- };
- u8 mcs16_23Rates[8] = {
- MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23
- };
-
for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_D; ++path) {
for (txNum = RF_1TX; txNum < RF_MAX_TX_NUM; ++txNum) {
/* CCK */
@@ -560,19 +441,6 @@ struct adapter *padapter
PHY_SetTxPowerByRate(padapter, path, txNum, mcs0_7Rates[i], value - base);
}
- /* HT MCS8~15 */
- base = PHY_GetTxPowerByRate(padapter, path, txNum, MGN_MCS15);
- for (i = 0; i < sizeof(mcs8_15Rates); ++i) {
- value = PHY_GetTxPowerByRate(padapter, path, txNum, mcs8_15Rates[i]);
- PHY_SetTxPowerByRate(padapter, path, txNum, mcs8_15Rates[i], value - base);
- }
-
- /* HT MCS16~23 */
- base = PHY_GetTxPowerByRate(padapter, path, txNum, MGN_MCS23);
- for (i = 0; i < sizeof(mcs16_23Rates); ++i) {
- value = PHY_GetTxPowerByRate(padapter, path, txNum, mcs16_23Rates[i]);
- PHY_SetTxPowerByRate(padapter, path, txNum, mcs16_23Rates[i], value - base);
- }
}
}
}
@@ -614,27 +482,6 @@ void PHY_SetTxPowerIndexByRateSection(
Channel, htRates1T,
ARRAY_SIZE(htRates1T));
- } else if (RateSection == HT_MCS8_MCS15) {
- u8 htRates2T[] = {MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11, MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15};
- PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
- pHalData->CurrentChannelBW,
- Channel, htRates2T,
- ARRAY_SIZE(htRates2T));
-
- } else if (RateSection == HT_MCS16_MCS23) {
- u8 htRates3T[] = {MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19, MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23};
- PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
- pHalData->CurrentChannelBW,
- Channel, htRates3T,
- ARRAY_SIZE(htRates3T));
-
- } else if (RateSection == HT_MCS24_MCS31) {
- u8 htRates4T[] = {MGN_MCS24, MGN_MCS25, MGN_MCS26, MGN_MCS27, MGN_MCS28, MGN_MCS29, MGN_MCS30, MGN_MCS31};
- PHY_SetTxPowerIndexByRateArray(padapter, RFPath,
- pHalData->CurrentChannelBW,
- Channel, htRates4T,
- ARRAY_SIZE(htRates4T));
-
}
}
@@ -663,25 +510,11 @@ u8 PHY_GetTxPowerIndexBase(
txPower += pHalData->OFDM_24G_Diff[RFPath][TX_1S];
if (BandWidth == CHANNEL_WIDTH_20) { /* BW20-1S, BW20-2S */
- if (MGN_MCS0 <= Rate && Rate <= MGN_MCS31)
+ if (MGN_MCS0 <= Rate && Rate <= MGN_MCS7)
txPower += pHalData->BW20_24G_Diff[RFPath][TX_1S];
- if (MGN_MCS8 <= Rate && Rate <= MGN_MCS31)
- txPower += pHalData->BW20_24G_Diff[RFPath][TX_2S];
- if (MGN_MCS16 <= Rate && Rate <= MGN_MCS31)
- txPower += pHalData->BW20_24G_Diff[RFPath][TX_3S];
- if (MGN_MCS24 <= Rate && Rate <= MGN_MCS31)
- txPower += pHalData->BW20_24G_Diff[RFPath][TX_4S];
-
} else if (BandWidth == CHANNEL_WIDTH_40) { /* BW40-1S, BW40-2S */
- if (MGN_MCS0 <= Rate && Rate <= MGN_MCS31)
+ if (MGN_MCS0 <= Rate && Rate <= MGN_MCS7)
txPower += pHalData->BW40_24G_Diff[RFPath][TX_1S];
- if (MGN_MCS8 <= Rate && Rate <= MGN_MCS31)
- txPower += pHalData->BW40_24G_Diff[RFPath][TX_2S];
- if (MGN_MCS16 <= Rate && Rate <= MGN_MCS31)
- txPower += pHalData->BW40_24G_Diff[RFPath][TX_3S];
- if (MGN_MCS24 <= Rate && Rate <= MGN_MCS31)
- txPower += pHalData->BW40_24G_Diff[RFPath][TX_4S];
-
}
return txPower;
@@ -768,78 +601,6 @@ u8 PHY_GetRateIndexOfTxPowerByRate(u8 Rate)
case MGN_MCS7:
index = 19;
break;
- case MGN_MCS8:
- index = 20;
- break;
- case MGN_MCS9:
- index = 21;
- break;
- case MGN_MCS10:
- index = 22;
- break;
- case MGN_MCS11:
- index = 23;
- break;
- case MGN_MCS12:
- index = 24;
- break;
- case MGN_MCS13:
- index = 25;
- break;
- case MGN_MCS14:
- index = 26;
- break;
- case MGN_MCS15:
- index = 27;
- break;
- case MGN_MCS16:
- index = 28;
- break;
- case MGN_MCS17:
- index = 29;
- break;
- case MGN_MCS18:
- index = 30;
- break;
- case MGN_MCS19:
- index = 31;
- break;
- case MGN_MCS20:
- index = 32;
- break;
- case MGN_MCS21:
- index = 33;
- break;
- case MGN_MCS22:
- index = 34;
- break;
- case MGN_MCS23:
- index = 35;
- break;
- case MGN_MCS24:
- index = 36;
- break;
- case MGN_MCS25:
- index = 37;
- break;
- case MGN_MCS26:
- index = 38;
- break;
- case MGN_MCS27:
- index = 39;
- break;
- case MGN_MCS28:
- index = 40;
- break;
- case MGN_MCS29:
- index = 41;
- break;
- case MGN_MCS30:
- index = 42;
- break;
- case MGN_MCS31:
- index = 43;
- break;
default:
break;
}
@@ -896,19 +657,10 @@ void PHY_SetTxPowerByRate(
void PHY_SetTxPowerLevelByPath(struct adapter *Adapter, u8 channel, u8 path)
{
- struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
-
- /* if (pMgntInfo->RegNByteAccess == 0) */
- {
- PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, CCK);
+ PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, CCK);
- PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, OFDM);
- PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, HT_MCS0_MCS7);
-
- if (pHalData->NumTotalRFPath >= 2)
- PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, HT_MCS8_MCS15);
-
- }
+ PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, OFDM);
+ PHY_SetTxPowerIndexByRateSection(Adapter, path, channel, HT_MCS0_MCS7);
}
void PHY_SetTxPowerIndexByRateArray(
@@ -970,15 +722,6 @@ static s16 get_rate_sctn_idx(const u8 rate)
case MGN_MCS0: case MGN_MCS1: case MGN_MCS2: case MGN_MCS3:
case MGN_MCS4: case MGN_MCS5: case MGN_MCS6: case MGN_MCS7:
return 2;
- case MGN_MCS8: case MGN_MCS9: case MGN_MCS10: case MGN_MCS11:
- case MGN_MCS12: case MGN_MCS13: case MGN_MCS14: case MGN_MCS15:
- return 3;
- case MGN_MCS16: case MGN_MCS17: case MGN_MCS18: case MGN_MCS19:
- case MGN_MCS20: case MGN_MCS21: case MGN_MCS22: case MGN_MCS23:
- return 4;
- case MGN_MCS24: case MGN_MCS25: case MGN_MCS26: case MGN_MCS27:
- case MGN_MCS28: case MGN_MCS29: case MGN_MCS30: case MGN_MCS31:
- return 5;
default:
return -1;
}
@@ -1070,13 +813,7 @@ void PHY_ConvertTxPowerLimitToPowerIndex(struct adapter *Adapter)
for (rfPath = ODM_RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath) {
if (pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE) {
- if (rateSection == 5) /* HT 4T */
- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, RF_4TX, HT_MCS24_MCS31);
- else if (rateSection == 4) /* HT 3T */
- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, RF_3TX, HT_MCS16_MCS23);
- else if (rateSection == 3) /* HT 2T */
- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, RF_2TX, HT_MCS8_MCS15);
- else if (rateSection == 2) /* HT 1T */
+ if (rateSection == 2) /* HT 1T */
BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, RF_1TX, HT_MCS0_MCS7);
else if (rateSection == 1) /* OFDM */
BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, RF_1TX, OFDM);
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
index 859451810c48..17a5850183ad 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
@@ -186,10 +186,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(
/* */
/* (3)EVM of HT rate */
/* */
- if (pPktinfo->data_rate >= DESC_RATEMCS8 && pPktinfo->data_rate <= DESC_RATEMCS15)
- Max_spatial_stream = 2; /* both spatial stream make sense */
- else
- Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
+ Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
for (i = 0; i < Max_spatial_stream; i++) {
/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
diff --git a/drivers/staging/rtl8723bs/hal/odm_RegDefine11N.h b/drivers/staging/rtl8723bs/hal/odm_RegDefine11N.h
index 1c6c08000e27..3c71938899e0 100644
--- a/drivers/staging/rtl8723bs/hal/odm_RegDefine11N.h
+++ b/drivers/staging/rtl8723bs/hal/odm_RegDefine11N.h
@@ -111,8 +111,6 @@
#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08
#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10
#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14
-#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18
-#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C
#define ODM_REG_FPGA0_IQK_11N 0xE28
#define ODM_REG_TXIQK_TONE_A_11N 0xE30
#define ODM_REG_RXIQK_TONE_A_11N 0xE34
diff --git a/drivers/staging/rtl8723bs/hal/odm_reg.h b/drivers/staging/rtl8723bs/hal/odm_reg.h
index 1ec6ffd69dbe..a3b1f673774c 100644
--- a/drivers/staging/rtl8723bs/hal/odm_reg.h
+++ b/drivers/staging/rtl8723bs/hal/odm_reg.h
@@ -32,10 +32,8 @@
#define ODM_TXAGC_B_MCS32_5 0x838
#define ODM_TXAGC_B_MCS0_MCS3 0x83c
#define ODM_TXAGC_B_MCS4_MCS7 0x848
-#define ODM_TXAGC_B_MCS8_MCS11 0x84c
#define ODM_ANALOG_REGISTER 0x85c
#define ODM_RF_INTERFACE_OUTPUT 0x860
-#define ODM_TXAGC_B_MCS12_MCS15 0x868
#define ODM_TXAGC_B_11_A_2_11 0x86c
#define ODM_AD_DA_LSB_MASK 0x874
#define ODM_ENABLE_3_WIRE 0x88c
@@ -71,8 +69,6 @@
#define ODM_TXAGC_A_1_MCS32 0xe08
#define ODM_TXAGC_A_MCS0_MCS3 0xe10
#define ODM_TXAGC_A_MCS4_MCS7 0xe14
-#define ODM_TXAGC_A_MCS8_MCS11 0xe18
-#define ODM_TXAGC_A_MCS12_MCS15 0xe1c
/* RF REG */
#define ODM_GAIN_SETTING 0x00
diff --git a/drivers/staging/rtl8723bs/include/hal_com.h b/drivers/staging/rtl8723bs/include/hal_com.h
index 1bc332261b2a..7be0ea20bca4 100644
--- a/drivers/staging/rtl8723bs/include/hal_com.h
+++ b/drivers/staging/rtl8723bs/include/hal_com.h
@@ -45,30 +45,6 @@
#define DESC_RATEMCS5 0x11
#define DESC_RATEMCS6 0x12
#define DESC_RATEMCS7 0x13
-#define DESC_RATEMCS8 0x14
-#define DESC_RATEMCS9 0x15
-#define DESC_RATEMCS10 0x16
-#define DESC_RATEMCS11 0x17
-#define DESC_RATEMCS12 0x18
-#define DESC_RATEMCS13 0x19
-#define DESC_RATEMCS14 0x1a
-#define DESC_RATEMCS15 0x1b
-#define DESC_RATEMCS16 0x1C
-#define DESC_RATEMCS17 0x1D
-#define DESC_RATEMCS18 0x1E
-#define DESC_RATEMCS19 0x1F
-#define DESC_RATEMCS20 0x20
-#define DESC_RATEMCS21 0x21
-#define DESC_RATEMCS22 0x22
-#define DESC_RATEMCS23 0x23
-#define DESC_RATEMCS24 0x24
-#define DESC_RATEMCS25 0x25
-#define DESC_RATEMCS26 0x26
-#define DESC_RATEMCS27 0x27
-#define DESC_RATEMCS28 0x28
-#define DESC_RATEMCS29 0x29
-#define DESC_RATEMCS30 0x2A
-#define DESC_RATEMCS31 0x2B
#define HDATA_RATE(rate)\
(rate == DESC_RATE1M) ? "CCK_1M" : \
@@ -90,16 +66,7 @@
(rate == DESC_RATEMCS4) ? "MCS4" : \
(rate == DESC_RATEMCS5) ? "MCS5" : \
(rate == DESC_RATEMCS6) ? "MCS6" : \
-(rate == DESC_RATEMCS7) ? "MCS7" : \
-(rate == DESC_RATEMCS8) ? "MCS8" : \
-(rate == DESC_RATEMCS9) ? "MCS9" : \
-(rate == DESC_RATEMCS10) ? "MCS10" : \
-(rate == DESC_RATEMCS11) ? "MCS11" : \
-(rate == DESC_RATEMCS12) ? "MCS12" : \
-(rate == DESC_RATEMCS13) ? "MCS13" : \
-(rate == DESC_RATEMCS14) ? "MCS14" : \
-(rate == DESC_RATEMCS15) ? "MCS15" : "UNKNOWN"
-
+(rate == DESC_RATEMCS7) ? "MCS7" : "UNKNOWN"
enum{
UP_LINK,
diff --git a/drivers/staging/rtl8723bs/include/hal_com_phycfg.h b/drivers/staging/rtl8723bs/include/hal_com_phycfg.h
index c966d0e3e5ae..637089fed93d 100644
--- a/drivers/staging/rtl8723bs/include/hal_com_phycfg.h
+++ b/drivers/staging/rtl8723bs/include/hal_com_phycfg.h
@@ -16,9 +16,6 @@ enum rate_section {
CCK = 0,
OFDM,
HT_MCS0_MCS7,
- HT_MCS8_MCS15,
- HT_MCS16_MCS23,
- HT_MCS24_MCS31,
};
enum {
diff --git a/drivers/staging/rtl8723bs/include/hal_com_reg.h b/drivers/staging/rtl8723bs/include/hal_com_reg.h
index b2f179b48019..8213dcf48b34 100644
--- a/drivers/staging/rtl8723bs/include/hal_com_reg.h
+++ b/drivers/staging/rtl8723bs/include/hal_com_reg.h
@@ -662,15 +662,6 @@ Default: 00b.
#define RATR_MCS5 0x00020000
#define RATR_MCS6 0x00040000
#define RATR_MCS7 0x00080000
-/* MCS 2 Spatial Stream */
-#define RATR_MCS8 0x00100000
-#define RATR_MCS9 0x00200000
-#define RATR_MCS10 0x00400000
-#define RATR_MCS11 0x00800000
-#define RATR_MCS12 0x01000000
-#define RATR_MCS13 0x02000000
-#define RATR_MCS14 0x04000000
-#define RATR_MCS15 0x08000000
/* CCK */
#define RATE_1M BIT(0)
@@ -695,16 +686,6 @@ Default: 00b.
#define RATE_MCS5 BIT(17)
#define RATE_MCS6 BIT(18)
#define RATE_MCS7 BIT(19)
-/* MCS 2 Spatial Stream */
-#define RATE_MCS8 BIT(20)
-#define RATE_MCS9 BIT(21)
-#define RATE_MCS10 BIT(22)
-#define RATE_MCS11 BIT(23)
-#define RATE_MCS12 BIT(24)
-#define RATE_MCS13 BIT(25)
-#define RATE_MCS14 BIT(26)
-#define RATE_MCS15 BIT(27)
-
/* ALL CCK Rate */
#define RATE_BITMAP_ALL 0xFFFFF
diff --git a/drivers/staging/rtl8723bs/include/ieee80211.h b/drivers/staging/rtl8723bs/include/ieee80211.h
index b3a9bcce4c44..89851fa36830 100644
--- a/drivers/staging/rtl8723bs/include/ieee80211.h
+++ b/drivers/staging/rtl8723bs/include/ieee80211.h
@@ -389,30 +389,6 @@ enum {
MGN_MCS5,
MGN_MCS6,
MGN_MCS7,
- MGN_MCS8,
- MGN_MCS9,
- MGN_MCS10,
- MGN_MCS11,
- MGN_MCS12,
- MGN_MCS13,
- MGN_MCS14,
- MGN_MCS15,
- MGN_MCS16,
- MGN_MCS17,
- MGN_MCS18,
- MGN_MCS19,
- MGN_MCS20,
- MGN_MCS21,
- MGN_MCS22,
- MGN_MCS23,
- MGN_MCS24,
- MGN_MCS25,
- MGN_MCS26,
- MGN_MCS27,
- MGN_MCS28,
- MGN_MCS29,
- MGN_MCS30,
- MGN_MCS31,
MGN_UNKNOWN
};
diff --git a/drivers/staging/rtl8723bs/include/rtl8723b_xmit.h b/drivers/staging/rtl8723bs/include/rtl8723b_xmit.h
index 9dd329a5208a..ad2542d0cabe 100644
--- a/drivers/staging/rtl8723bs/include/rtl8723b_xmit.h
+++ b/drivers/staging/rtl8723bs/include/rtl8723b_xmit.h
@@ -394,14 +394,6 @@ struct txdesc_8723b {
#define DESC8723B_RATEMCS5 0x11
#define DESC8723B_RATEMCS6 0x12
#define DESC8723B_RATEMCS7 0x13
-#define DESC8723B_RATEMCS8 0x14
-#define DESC8723B_RATEMCS9 0x15
-#define DESC8723B_RATEMCS10 0x16
-#define DESC8723B_RATEMCS11 0x17
-#define DESC8723B_RATEMCS12 0x18
-#define DESC8723B_RATEMCS13 0x19
-#define DESC8723B_RATEMCS14 0x1a
-#define DESC8723B_RATEMCS15 0x1b
#define RX_HAL_IS_CCK_RATE_8723B(pDesc)\
(GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M ||\
--
2.20.1
move function odm_cck_rssi() to hal/odm_HWConfig.c.
As it is used only in this file turn it to
static.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/odm_HWConfig.c | 27 +++++++++++++++++++
drivers/staging/rtl8723bs/hal/odm_RTL8723B.c | 28 --------------------
drivers/staging/rtl8723bs/hal/odm_RTL8723B.h | 2 --
3 files changed, 27 insertions(+), 30 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
index 6d7b34fd595e..2d4d8d57ceeb 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
@@ -71,6 +71,33 @@ static u8 odm_evm_db_to_percentage(s8 value)
return ret_val;
}
+static s8 odm_cck_rssi(u8 lna_idx, u8 vga_idx)
+{
+ s8 rx_pwr_all = 0x00;
+
+ switch (lna_idx) {
+ /* 46 53 73 95 201301231630 */
+ /* 46 53 77 99 201301241630 */
+
+ case 6:
+ rx_pwr_all = -34 - (2 * vga_idx);
+ break;
+ case 4:
+ rx_pwr_all = -14 - (2 * vga_idx);
+ break;
+ case 1:
+ rx_pwr_all = 6 - (2 * vga_idx);
+ break;
+ case 0:
+ rx_pwr_all = 16 - (2 * vga_idx);
+ break;
+ default:
+ /* rx_pwr_all = -53+(2*(31-VGA_idx)); */
+ break;
+ }
+ return rx_pwr_all;
+}
+
static void odm_rx_phy_status_parsing(struct dm_odm_t *dm_odm,
struct odm_phy_info *phy_info,
u8 *phy_status,
diff --git a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
index 325f2a7ae337..66bda505c01e 100644
--- a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
+++ b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
@@ -6,31 +6,3 @@
******************************************************************************/
#include "odm_precomp.h"
-
-s8 odm_cck_rssi(u8 lna_idx, u8 vga_idx)
-{
- s8 rx_pwr_all = 0x00;
-
- switch (lna_idx) {
- /* 46 53 73 95 201301231630 */
- /* 46 53 77 99 201301241630 */
-
- case 6:
- rx_pwr_all = -34 - (2 * vga_idx);
- break;
- case 4:
- rx_pwr_all = -14 - (2 * vga_idx);
- break;
- case 1:
- rx_pwr_all = 6 - (2 * vga_idx);
- break;
- case 0:
- rx_pwr_all = 16 - (2 * vga_idx);
- break;
- default:
- /* rx_pwr_all = -53+(2*(31-VGA_idx)); */
- break;
-
- }
- return rx_pwr_all;
-}
diff --git a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
index 752f180ebd46..12b3ca90a43d 100644
--- a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
+++ b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
@@ -9,6 +9,4 @@
#define DM_DIG_MIN_NIC_8723 0x1C
-s8 odm_cck_rssi(u8 LNA_idx, u8 VGA_idx);
-
#endif
--
2.20.1
remove empty files after function move,
hal/odm_RTL8723B.h has only an unused
macro declaration.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/Makefile | 1 -
drivers/staging/rtl8723bs/hal/odm_RTL8723B.c | 8 --------
drivers/staging/rtl8723bs/hal/odm_RTL8723B.h | 12 ------------
drivers/staging/rtl8723bs/hal/odm_precomp.h | 1 -
4 files changed, 22 deletions(-)
delete mode 100644 drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
delete mode 100644 drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
diff --git a/drivers/staging/rtl8723bs/Makefile b/drivers/staging/rtl8723bs/Makefile
index fe45200ff53c..159ca1b9016b 100644
--- a/drivers/staging/rtl8723bs/Makefile
+++ b/drivers/staging/rtl8723bs/Makefile
@@ -35,7 +35,6 @@ r8723bs-y = \
hal/odm_HWConfig.o \
hal/odm_NoiseMonitor.o \
hal/odm_RegConfig8723B.o \
- hal/odm_RTL8723B.o \
hal/rtl8723b_cmd.o \
hal/rtl8723b_dm.o \
hal/rtl8723b_hal_init.o \
diff --git a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
deleted file mode 100644
index 66bda505c01e..000000000000
--- a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
+++ /dev/null
@@ -1,8 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- ******************************************************************************/
-
-#include "odm_precomp.h"
diff --git a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
deleted file mode 100644
index 12b3ca90a43d..000000000000
--- a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- ******************************************************************************/
-#ifndef __ODM_RTL8723B_H__
-#define __ODM_RTL8723B_H__
-
-#define DM_DIG_MIN_NIC_8723 0x1C
-
-#endif
diff --git a/drivers/staging/rtl8723bs/hal/odm_precomp.h b/drivers/staging/rtl8723bs/hal/odm_precomp.h
index 5041c9535e9a..edce506022a5 100644
--- a/drivers/staging/rtl8723bs/hal/odm_precomp.h
+++ b/drivers/staging/rtl8723bs/hal/odm_precomp.h
@@ -43,7 +43,6 @@
#include "HalHWImg8723B_RF.h"
#include "HalHWImg8723B_BB.h"
#include "Hal8723BReg.h"
-#include "odm_RTL8723B.h"
#include "odm_RegConfig8723B.h"
#endif /* __ODM_PRECOMP_H__ */
--
2.20.1
do some code cleaning after changes of previous commit.
Fixed comments, camel case names, variable naming conventions;
kept function names without chip series numbers (this is
just code for 8723), fixed indentations, blank lines and
other minor stuff.
Signed-off-by: Fabio Aiuto <[email protected]>
---
.../staging/rtl8723bs/hal/odm_CfoTracking.c | 26 +-
.../staging/rtl8723bs/hal/odm_CfoTracking.h | 2 +-
drivers/staging/rtl8723bs/hal/odm_HWConfig.c | 229 +++++++++---------
drivers/staging/rtl8723bs/hal/odm_HWConfig.h | 2 +-
drivers/staging/rtl8723bs/hal/odm_RTL8723B.c | 12 +-
drivers/staging/rtl8723bs/hal/odm_RTL8723B.h | 2 +-
6 files changed, 139 insertions(+), 134 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c b/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
index 0f6b9d661e39..a99d567468b2 100644
--- a/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
+++ b/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
@@ -188,26 +188,28 @@ void ODM_CfoTracking(void *pDM_VOID)
}
}
-void ODM_ParsingCFO(void *pDM_VOID, void *pPktinfo_VOID, s8 *pcfotail)
+void odm_parsing_cfo(void *dm_void, void *pkt_info_void, s8 *cfotail)
{
- struct dm_odm_t *pDM_Odm = (struct dm_odm_t *)pDM_VOID;
- struct odm_packet_info *pPktinfo = pPktinfo_VOID;
- struct cfo_tracking *pCfoTrack = &pDM_Odm->DM_CfoTrack;
+ struct dm_odm_t *dm_odm = (struct dm_odm_t *)dm_void;
+ struct odm_packet_info *pkt_info = pkt_info_void;
+ struct cfo_tracking *cfo_track = &dm_odm->DM_CfoTrack;
u8 i;
- if (!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING))
+ if (!(dm_odm->SupportAbility & ODM_BB_CFO_TRACKING))
return;
- if (pPktinfo->station_id != 0) {
- /* 3 Update CFO report for path-A & path-B */
- /* Only paht-A and path-B have CFO tail and short CFO */
+ if (pkt_info->station_id != 0) {
+ /*
+ * 3 Update CFO report for path-A & path-B
+ * Only paht-A and path-B have CFO tail and short CFO
+ */
for (i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++)
- pCfoTrack->CFO_tail[i] = (int)pcfotail[i];
+ cfo_track->CFO_tail[i] = (int)cfotail[i];
/* 3 Update packet counter */
- if (pCfoTrack->packetCount == 0xffffffff)
- pCfoTrack->packetCount = 0;
+ if (cfo_track->packetCount == 0xffffffff)
+ cfo_track->packetCount = 0;
else
- pCfoTrack->packetCount++;
+ cfo_track->packetCount++;
}
}
diff --git a/drivers/staging/rtl8723bs/hal/odm_CfoTracking.h b/drivers/staging/rtl8723bs/hal/odm_CfoTracking.h
index bb00d8c893bd..8fa6d9ec5880 100644
--- a/drivers/staging/rtl8723bs/hal/odm_CfoTracking.h
+++ b/drivers/staging/rtl8723bs/hal/odm_CfoTracking.h
@@ -34,6 +34,6 @@ void ODM_CfoTrackingInit(void *pDM_VOID);
void ODM_CfoTracking(void *pDM_VOID);
-void ODM_ParsingCFO(void *pDM_VOID, void *pPktinfo_VOID, s8 *pcfotail);
+void odm_parsing_cfo(void *pDM_VOID, void *pPktinfo_VOID, s8 *pcfotail);
#endif
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
index af4d5ab1b382..6d7b34fd595e 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
@@ -10,51 +10,51 @@
#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))
#define READ_AND_CONFIG READ_AND_CONFIG_MP
-static u8 odm_QueryRxPwrPercentage(s8 AntPower)
+static u8 odm_query_rx_pwr_percentage(s8 ant_power)
{
- if ((AntPower <= -100) || (AntPower >= 20))
+ if ((ant_power <= -100) || (ant_power >= 20))
return 0;
- else if (AntPower >= 0)
+ else if (ant_power >= 0)
return 100;
else
- return 100 + AntPower;
+ return 100 + ant_power;
}
-s32 odm_SignalScaleMapping(struct dm_odm_t *pDM_Odm, s32 CurrSig)
+s32 odm_signal_scale_mapping(struct dm_odm_t *dm_odm, s32 curr_sig)
{
- s32 RetSig = 0;
-
- if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) {
- if (CurrSig >= 51 && CurrSig <= 100)
- RetSig = 100;
- else if (CurrSig >= 41 && CurrSig <= 50)
- RetSig = 80 + ((CurrSig - 40)*2);
- else if (CurrSig >= 31 && CurrSig <= 40)
- RetSig = 66 + (CurrSig - 30);
- else if (CurrSig >= 21 && CurrSig <= 30)
- RetSig = 54 + (CurrSig - 20);
- else if (CurrSig >= 10 && CurrSig <= 20)
- RetSig = 42 + (((CurrSig - 10) * 2) / 3);
- else if (CurrSig >= 5 && CurrSig <= 9)
- RetSig = 22 + (((CurrSig - 5) * 3) / 2);
- else if (CurrSig >= 1 && CurrSig <= 4)
- RetSig = 6 + (((CurrSig - 1) * 3) / 2);
+ s32 ret_sig = 0;
+
+ if (dm_odm->SupportInterface == ODM_ITRF_SDIO) {
+ if (curr_sig >= 51 && curr_sig <= 100)
+ ret_sig = 100;
+ else if (curr_sig >= 41 && curr_sig <= 50)
+ ret_sig = 80 + ((curr_sig - 40)*2);
+ else if (curr_sig >= 31 && curr_sig <= 40)
+ ret_sig = 66 + (curr_sig - 30);
+ else if (curr_sig >= 21 && curr_sig <= 30)
+ ret_sig = 54 + (curr_sig - 20);
+ else if (curr_sig >= 10 && curr_sig <= 20)
+ ret_sig = 42 + (((curr_sig - 10) * 2) / 3);
+ else if (curr_sig >= 5 && curr_sig <= 9)
+ ret_sig = 22 + (((curr_sig - 5) * 3) / 2);
+ else if (curr_sig >= 1 && curr_sig <= 4)
+ ret_sig = 6 + (((curr_sig - 1) * 3) / 2);
else
- RetSig = CurrSig;
+ ret_sig = curr_sig;
}
- return RetSig;
+ return ret_sig;
}
-static u8 odm_EVMdbToPercentage(s8 Value)
+static u8 odm_evm_db_to_percentage(s8 value)
{
/* */
/* -33dB~0dB to 0%~99% */
/* */
s8 ret_val;
- ret_val = Value;
+ ret_val = value;
ret_val /= 2;
if (ret_val >= 0)
@@ -71,116 +71,116 @@ static u8 odm_EVMdbToPercentage(s8 Value)
return ret_val;
}
-static void odm_RxPhyStatus92CSeries_Parsing(
- struct dm_odm_t *pDM_Odm,
- struct odm_phy_info *pPhyInfo,
- u8 *pPhyStatus,
- struct odm_packet_info *pPktinfo
-)
+static void odm_rx_phy_status_parsing(struct dm_odm_t *dm_odm,
+ struct odm_phy_info *phy_info,
+ u8 *phy_status,
+ struct odm_packet_info *pkt_info)
{
u8 i;
s8 rx_pwr[4], rx_pwr_all = 0;
- u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
- u8 RSSI, total_rssi = 0;
- bool isCCKrate = false;
+ u8 evm, pwdb_all = 0, pwdb_all_bt;
+ u8 rssi, total_rssi = 0;
+ bool is_cck_rate = false;
u8 rf_rx_num = 0;
- u8 LNA_idx, VGA_idx;
- struct phy_status_rpt_8192cd_t *pPhyStaRpt = (struct phy_status_rpt_8192cd_t *)pPhyStatus;
+ u8 lna_idx, vga_idx;
+ struct phy_status_rpt_8192cd_t *phy_sta_rpt = (struct phy_status_rpt_8192cd_t *)phy_status;
- isCCKrate = pPktinfo->data_rate <= DESC_RATE11M;
- pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_A] = -1;
- pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
+ is_cck_rate = pkt_info->data_rate <= DESC_RATE11M;
+ phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = -1;
+ phy_info->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
- if (isCCKrate) {
+ if (is_cck_rate) {
u8 cck_agc_rpt;
- pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;
- /* */
- /* (1)Hardware does not provide RSSI for CCK */
- /* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
- /* */
-
- cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a;
-
- /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
- /* The RSSI formula should be modified according to the gain table */
- LNA_idx = ((cck_agc_rpt & 0xE0)>>5);
- VGA_idx = (cck_agc_rpt & 0x1F);
- rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx, VGA_idx);
- PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
- if (PWDB_ALL > 100)
- PWDB_ALL = 100;
-
- pPhyInfo->rx_pwd_ba11 = PWDB_ALL;
- pPhyInfo->bt_rx_rssi_percentage = PWDB_ALL;
- pPhyInfo->recv_signal_power = rx_pwr_all;
- /* */
+ dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
+
+ /*
+ * (1)Hardware does not provide RSSI for CCK/
+ * (2)PWDB, Average PWDB calculated by
+ * hardware (for rate adaptive)
+ */
+
+ cck_agc_rpt = phy_sta_rpt->cck_agc_rpt_ofdm_cfosho_a;
+
+ /*
+ * 2011.11.28 LukeLee: 88E use different LNA & VGA gain table
+ * The RSSI formula should be modified according to the gain table
+ */
+ lna_idx = ((cck_agc_rpt & 0xE0)>>5);
+ vga_idx = (cck_agc_rpt & 0x1F);
+ rx_pwr_all = odm_cck_rssi(lna_idx, vga_idx);
+ pwdb_all = odm_query_rx_pwr_percentage(rx_pwr_all);
+ if (pwdb_all > 100)
+ pwdb_all = 100;
+
+ phy_info->rx_pwd_ba11 = pwdb_all;
+ phy_info->bt_rx_rssi_percentage = pwdb_all;
+ phy_info->recv_signal_power = rx_pwr_all;
+
/* (3) Get Signal Quality (EVM) */
- /* */
+
/* if (pPktinfo->bPacketMatchBSSID) */
{
- u8 SQ, SQ_rpt;
+ u8 sq, sq_rpt;
- if (pPhyInfo->rx_pwd_ba11 > 40 && !pDM_Odm->bInHctTest)
- SQ = 100;
+ if (phy_info->rx_pwd_ba11 > 40 && !dm_odm->bInHctTest)
+ sq = 100;
else {
- SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
+ sq_rpt = phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all;
- if (SQ_rpt > 64)
- SQ = 0;
- else if (SQ_rpt < 20)
- SQ = 100;
+ if (sq_rpt > 64)
+ sq = 0;
+ else if (sq_rpt < 20)
+ sq = 100;
else
- SQ = ((64-SQ_rpt) * 100) / 44;
+ sq = ((64-sq_rpt) * 100) / 44;
}
- pPhyInfo->signal_quality = SQ;
- pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_A] = SQ;
- pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
+ phy_info->signal_quality = sq;
+ phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = sq;
+ phy_info->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
}
} else { /* is OFDM rate */
- pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
+ dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
- /* */
- /* (1)Get RSSI for HT rate */
- /* */
+ /*
+ * (1)Get RSSI for HT rate
+ */
for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
/* 2008/01/30 MH we will judge RF RX path now. */
- if (pDM_Odm->RFPathRxEnable & BIT(i))
+ if (dm_odm->RFPathRxEnable & BIT(i))
rf_rx_num++;
/* else */
/* continue; */
- rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain&0x3F)*2) - 110;
-
+ rx_pwr[i] = ((phy_sta_rpt->path_agc[i].gain & 0x3F) * 2) - 110;
- pPhyInfo->rx_pwr[i] = rx_pwr[i];
+ phy_info->rx_pwr[i] = rx_pwr[i];
/* Translate DBM to percentage. */
- RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
- total_rssi += RSSI;
+ rssi = odm_query_rx_pwr_percentage(rx_pwr[i]);
+ total_rssi += rssi;
- pPhyInfo->rx_mimo_signal_strength[i] = (u8) RSSI;
+ phy_info->rx_mimo_signal_strength[i] = (u8)rssi;
/* Get Rx snr value in DB */
- pPhyInfo->rx_snr[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
+ phy_info->rx_snr[i] = dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(phy_sta_rpt->path_rxsnr[i]/2);
}
+ /*
+ * (2)PWDB, Average PWDB calculated by hardware (for rate adaptive)
+ */
+ rx_pwr_all = ((phy_sta_rpt->cck_sig_qual_ofdm_pwdb_all >> 1) & 0x7f) - 110;
- /* */
- /* (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
- /* */
- rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1)&0x7f)-110;
-
- PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
+ pwdb_all_bt = pwdb_all = odm_query_rx_pwr_percentage(rx_pwr_all);
- pPhyInfo->rx_pwd_ba11 = PWDB_ALL;
- pPhyInfo->bt_rx_rssi_percentage = PWDB_ALL_BT;
- pPhyInfo->rx_power = rx_pwr_all;
- pPhyInfo->recv_signal_power = rx_pwr_all;
+ phy_info->rx_pwd_ba11 = pwdb_all;
+ phy_info->bt_rx_rssi_percentage = pwdb_all_bt;
+ phy_info->rx_power = rx_pwr_all;
+ phy_info->recv_signal_power = rx_pwr_all;
/*
* (3)EVM of HT rate
@@ -195,23 +195,26 @@ static void odm_RxPhyStatus92CSeries_Parsing(
* is supposed to be negative) is not correct
* anymore.
*/
- EVM = odm_EVMdbToPercentage(pPhyStaRpt->stream_rxevm[0]); /* dbm */
+ evm = odm_evm_db_to_percentage(phy_sta_rpt->stream_rxevm[0]); /* dbm */
/* Fill value in RFD, Get the first spatial stream only */
- pPhyInfo->signal_quality = (u8)(EVM & 0xff);
+ phy_info->signal_quality = (u8)(evm & 0xff);
- pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_A] = (u8)(EVM & 0xff);
+ phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = (u8)(evm & 0xff);
- ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail);
+ odm_parsing_cfo(dm_odm, pkt_info, phy_sta_rpt->path_cfotail);
}
- /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
- /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
- if (isCCKrate) {
- pPhyInfo->signal_strength = (u8)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/* PWDB_ALL; */
+ /*
+ * UI BSS List signal strength(in percentage), make it good
+ * looking, from 0~100.
+ * It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
+ */
+ if (is_cck_rate) {
+ phy_info->signal_strength = (u8)(odm_signal_scale_mapping(dm_odm, pwdb_all));
} else {
if (rf_rx_num != 0) {
- pPhyInfo->signal_strength = (u8)(odm_SignalScaleMapping(pDM_Odm, total_rssi /= rf_rx_num));
+ phy_info->signal_strength = (u8)(odm_signal_scale_mapping(dm_odm, total_rssi /= rf_rx_num));
}
}
}
@@ -364,17 +367,17 @@ static void odm_Process_RSSIForDM(
/* Endianness before calling this API */
/* */
static void ODM_PhyStatusQuery_92CSeries(
- struct dm_odm_t *pDM_Odm,
- struct odm_phy_info *pPhyInfo,
- u8 *pPhyStatus,
- struct odm_packet_info *pPktinfo
+ struct dm_odm_t *dm_odm,
+ struct odm_phy_info *phy_info,
+ u8 *phy_status,
+ struct odm_packet_info *pkt_info
)
{
- odm_RxPhyStatus92CSeries_Parsing(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);
+ odm_rx_phy_status_parsing(dm_odm, phy_info, phy_status, pkt_info);
- if (!pDM_Odm->RSSI_test)
- odm_Process_RSSIForDM(pDM_Odm, pPhyInfo, pPktinfo);
+ if (!dm_odm->RSSI_test)
+ odm_Process_RSSIForDM(dm_odm, phy_info, pkt_info);
}
void ODM_PhyStatusQuery(
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.h b/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
index 574f9cfe8190..c0dbf5cc8ed4 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
@@ -102,6 +102,6 @@ enum hal_status ODM_ConfigFWWithHeaderFile(
u32 *pSize
);
-s32 odm_SignalScaleMapping(struct dm_odm_t *pDM_Odm, s32 CurrSig);
+s32 odm_signal_scale_mapping(struct dm_odm_t *pDM_Odm, s32 CurrSig);
#endif
diff --git a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
index 54518ea1be6b..325f2a7ae337 100644
--- a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
+++ b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.c
@@ -7,25 +7,25 @@
#include "odm_precomp.h"
-s8 odm_CCKRSSI_8723B(u8 LNA_idx, u8 VGA_idx)
+s8 odm_cck_rssi(u8 lna_idx, u8 vga_idx)
{
s8 rx_pwr_all = 0x00;
- switch (LNA_idx) {
+ switch (lna_idx) {
/* 46 53 73 95 201301231630 */
/* 46 53 77 99 201301241630 */
case 6:
- rx_pwr_all = -34 - (2 * VGA_idx);
+ rx_pwr_all = -34 - (2 * vga_idx);
break;
case 4:
- rx_pwr_all = -14 - (2 * VGA_idx);
+ rx_pwr_all = -14 - (2 * vga_idx);
break;
case 1:
- rx_pwr_all = 6 - (2 * VGA_idx);
+ rx_pwr_all = 6 - (2 * vga_idx);
break;
case 0:
- rx_pwr_all = 16 - (2 * VGA_idx);
+ rx_pwr_all = 16 - (2 * vga_idx);
break;
default:
/* rx_pwr_all = -53+(2*(31-VGA_idx)); */
diff --git a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
index 96ef1cc41a96..752f180ebd46 100644
--- a/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
+++ b/drivers/staging/rtl8723bs/hal/odm_RTL8723B.h
@@ -9,6 +9,6 @@
#define DM_DIG_MIN_NIC_8723 0x1C
-s8 odm_CCKRSSI_8723B(u8 LNA_idx, u8 VGA_idx);
+s8 odm_cck_rssi(u8 LNA_idx, u8 VGA_idx);
#endif
--
2.20.1
remove unneeded wrapping static function in
hal/odm_HWConif.c
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/odm_HWConfig.c | 13 +------------
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
index 2d4d8d57ceeb..5e6186040484 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
@@ -393,7 +393,7 @@ static void odm_Process_RSSIForDM(
/* */
/* Endianness before calling this API */
/* */
-static void ODM_PhyStatusQuery_92CSeries(
+void ODM_PhyStatusQuery(
struct dm_odm_t *dm_odm,
struct odm_phy_info *phy_info,
u8 *phy_status,
@@ -407,17 +407,6 @@ static void ODM_PhyStatusQuery_92CSeries(
odm_Process_RSSIForDM(dm_odm, phy_info, pkt_info);
}
-void ODM_PhyStatusQuery(
- struct dm_odm_t *pDM_Odm,
- struct odm_phy_info *pPhyInfo,
- u8 *pPhyStatus,
- struct odm_packet_info *pPktinfo
-)
-{
-
- ODM_PhyStatusQuery_92CSeries(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);
-}
-
/* */
/* If you want to add a new IC, Please follow below template and generate a new one. */
/* */
--
2.20.1
beautify function ODM_PhyStatusQuery().
Fix camel case name, put more than one argument per
line, fix camel case in arugment names.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/odm_HWConfig.c | 8 ++------
drivers/staging/rtl8723bs/hal/odm_HWConfig.h | 8 ++------
drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c | 2 +-
3 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
index 5e6186040484..16d479dbd069 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
@@ -393,12 +393,8 @@ static void odm_Process_RSSIForDM(
/* */
/* Endianness before calling this API */
/* */
-void ODM_PhyStatusQuery(
- struct dm_odm_t *dm_odm,
- struct odm_phy_info *phy_info,
- u8 *phy_status,
- struct odm_packet_info *pkt_info
-)
+void odm_phy_status_query(struct dm_odm_t *dm_odm, struct odm_phy_info *phy_info,
+ u8 *phy_status, struct odm_packet_info *pkt_info)
{
odm_rx_phy_status_parsing(dm_odm, phy_info, phy_status, pkt_info);
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.h b/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
index c0dbf5cc8ed4..b2eae7d993fa 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
@@ -76,12 +76,8 @@ struct phy_status_rpt_8192cd_t {
#endif
};
-void ODM_PhyStatusQuery(
- struct dm_odm_t *pDM_Odm,
- struct odm_phy_info *pPhyInfo,
- u8 *pPhyStatus,
- struct odm_packet_info *pPktinfo
-);
+void odm_phy_status_query(struct dm_odm_t *dm_odm, struct odm_phy_info *phy_info,
+ u8 *phy_status, struct odm_packet_info *pkt_info);
enum hal_status ODM_ConfigRFWithTxPwrTrackHeaderFile(struct dm_odm_t *pDM_Odm);
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c b/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c
index 6dc5cd959b75..418016930728 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c
@@ -129,7 +129,7 @@ static void update_recvframe_phyinfo(union recv_frame *precvframe,
/* rtl8723b_query_rx_phy_status(precvframe, pphy_status); */
/* spin_lock_bh(&p_hal_data->odm_stainfo_lock); */
- ODM_PhyStatusQuery(&p_hal_data->odmpriv, p_phy_info,
+ odm_phy_status_query(&p_hal_data->odmpriv, p_phy_info,
(u8 *)pphy_status, &(pkt_info));
if (psta)
psta->rssi = pattrib->phy_info.RecvSignalPower;
--
2.20.1
TxNum value is compared against ODM_RF_PATH_D,
which is inconsistent. Compare it against
RF_MAX_TX_NUM, as in other places in the same file.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/hal_com_phycfg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
index 03c174aab08d..a47a0a1cae22 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
@@ -350,7 +350,7 @@ static void PHY_StoreTxPowerByRateNew(
if (RfPath > ODM_RF_PATH_D)
return;
- if (TxNum > ODM_RF_PATH_D)
+ if (TxNum > RF_MAX_TX_NUM)
return;
for (i = 0; i < rateNum; ++i) {
--
2.20.1
use MAX_RF_PATH_NUM as ceiling to rf path index.
Only 2 rf paths are used, not 4. Remove also
TX_POWER_BY_RATE_NUM_RF left unused.
Use RF_PATH_A as loop starting point instead of
hardcoded 0, as in other places.
Related comments modified accordingly.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/hal_com_phycfg.c | 2 +-
drivers/staging/rtl8723bs/include/hal_data.h | 12 +++++-------
drivers/staging/rtl8723bs/include/hal_pg.h | 8 +++-----
3 files changed, 9 insertions(+), 13 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
index 272a9ec7a2d3..14f34e38a327 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
@@ -347,7 +347,7 @@ void PHY_InitTxPowerByRate(struct adapter *padapter)
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
u8 rfPath, rate;
- for (rfPath = 0; rfPath < TX_PWR_BY_RATE_NUM_RF; ++rfPath)
+ for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath)
for (rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE; ++rate)
pHalData->TxPwrByRateOffset[rfPath][rate] = 0;
}
diff --git a/drivers/staging/rtl8723bs/include/hal_data.h b/drivers/staging/rtl8723bs/include/hal_data.h
index 7bbf81ce3045..db9d7587c20e 100644
--- a/drivers/staging/rtl8723bs/include/hal_data.h
+++ b/drivers/staging/rtl8723bs/include/hal_data.h
@@ -234,14 +234,12 @@ struct hal_com_data {
u8 TxPwrInPercentage;
u8 TxPwrCalibrateRate;
- /* TX power by rate table at most 4RF path. */
- /* The register is */
- /* VHT TX power by rate off setArray = */
- /* RF: at most 4*4 = ABCD = 0/1/2/3 */
- /* CCK = 0 OFDM = 1/2 HT-MCS 0-15 =3/4/56 VHT =7/8/9/10/11 */
+ /* TX power by rate table */
+ /* RF: at most 2 = AB = 0/1 */
+ /* CCK = 0 OFDM = 1 HT-MCS 0-7 = 2 */
u8 TxPwrByRateTable;
u8 TxPwrByRateBand;
- s8 TxPwrByRateOffset[TX_PWR_BY_RATE_NUM_RF][TX_PWR_BY_RATE_NUM_RATE];
+ s8 TxPwrByRateOffset[MAX_RF_PATH_NUM][TX_PWR_BY_RATE_NUM_RATE];
/* */
/* 2 Power Limit Table */
@@ -259,7 +257,7 @@ struct hal_com_data {
[MAX_RF_PATH_NUM];
/* Store the original power by rate value of the base of each rate section of rf path A & B */
- u8 TxPwrByRateBase2_4G[TX_PWR_BY_RATE_NUM_RF][MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
+ u8 TxPwrByRateBase2_4G[MAX_RF_PATH_NUM][MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
/* For power group */
u8 PwrGroupHT20[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];
diff --git a/drivers/staging/rtl8723bs/include/hal_pg.h b/drivers/staging/rtl8723bs/include/hal_pg.h
index 2d8ccc9ddebb..7cb9c441fc01 100644
--- a/drivers/staging/rtl8723bs/include/hal_pg.h
+++ b/drivers/staging/rtl8723bs/include/hal_pg.h
@@ -14,11 +14,9 @@
*/
#define MAX_TX_COUNT 4
-/* For VHT series TX power by rate table. */
-/* VHT TX power by rate off setArray = */
-/* RF: at most 4*4 = ABCD = 0/1/2/3 */
-/* CCK = 0 OFDM = 1/2 HT-MCS 0-15 =3/4/56 VHT =7/8/9/10/11 */
-#define TX_PWR_BY_RATE_NUM_RF 4
+/* TX power by rate table. */
+/* RF: = AB = 0/1 */
+/* CCK = 0 OFDM = 1 HT-MCS 0-7 = 2 */
#define TX_PWR_BY_RATE_NUM_RATE 84
#define MAX_RF_PATH_NUM 2
#define MAX_CHNL_GROUP_24G 6
--
2.20.1
rtl8723bs support only two rf paths (A and B), remove all
the others (C, D, BC, ...) as they are unused. Keep
just one enum selecting rf path, remove unused macro
indicating max rf path number, add an item in rf_path
enum for this pourpose.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/HalPhyRf.c | 52 +++---
.../staging/rtl8723bs/hal/HalPhyRf_8723B.c | 164 +++++++++---------
.../staging/rtl8723bs/hal/hal_com_phycfg.c | 22 +--
drivers/staging/rtl8723bs/hal/odm.c | 4 +-
drivers/staging/rtl8723bs/hal/odm.h | 20 ---
.../staging/rtl8723bs/hal/odm_CfoTracking.c | 2 +-
drivers/staging/rtl8723bs/hal/odm_HWConfig.c | 36 ++--
drivers/staging/rtl8723bs/hal/odm_HWConfig.h | 2 +-
.../staging/rtl8723bs/hal/odm_NoiseMonitor.c | 18 +-
.../rtl8723bs/hal/odm_RegConfig8723B.c | 4 +-
.../rtl8723bs/hal/odm_RegConfig8723B.h | 2 +-
.../staging/rtl8723bs/hal/rtl8723b_hal_init.c | 12 +-
.../staging/rtl8723bs/hal/rtl8723b_phycfg.c | 42 ++---
.../staging/rtl8723bs/hal/rtl8723b_rf6052.c | 16 +-
drivers/staging/rtl8723bs/include/hal_phy.h | 3 +-
15 files changed, 185 insertions(+), 214 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/HalPhyRf.c b/drivers/staging/rtl8723bs/hal/HalPhyRf.c
index 9c6d3bf2f2ea..7bef05a9a063 100644
--- a/drivers/staging/rtl8723bs/hal/HalPhyRf.c
+++ b/drivers/staging/rtl8723bs/hal/HalPhyRf.c
@@ -30,7 +30,7 @@ void ODM_ClearTxPowerTrackingState(struct dm_odm_t *pDM_Odm)
pDM_Odm->BbSwingIdxCck = pDM_Odm->DefaultCckIndex;
pDM_Odm->RFCalibrateInfo.CCK_index = 0;
- for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) {
+ for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->DefaultOfdmIndex;
pDM_Odm->BbSwingIdxOfdm[p] = pDM_Odm->DefaultOfdmIndex;
pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pDM_Odm->DefaultOfdmIndex;
@@ -93,7 +93,7 @@ void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter)
pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++;
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = true;
- ThermalValue = (u8)PHY_QueryRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
+ ThermalValue = (u8)PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_A, c.ThermalRegAddr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
if (
!pDM_Odm->RFCalibrateInfo.TxPowerTrackControl ||
pHalData->EEPROMThermalMeter == 0 ||
@@ -154,49 +154,49 @@ void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter)
/* 4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset */
if (ThermalValue > pHalData->EEPROMThermalMeter) {
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_A] =
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A];
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A] =
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[RF_PATH_A] =
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_A];
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_A] =
deltaSwingTableIdx_TUP_A[delta];
/* Record delta swing for mix mode power tracking */
- pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] =
+ pDM_Odm->Absolute_OFDMSwingIdx[RF_PATH_A] =
deltaSwingTableIdx_TUP_A[delta];
if (c.RfPathCount > 1) {
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_B] =
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B];
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B] =
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[RF_PATH_B] =
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_B];
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_B] =
deltaSwingTableIdx_TUP_B[delta];
/* Record delta swing for mix mode power tracking */
- pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] =
+ pDM_Odm->Absolute_OFDMSwingIdx[RF_PATH_B] =
deltaSwingTableIdx_TUP_B[delta];
}
} else {
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_A] =
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A];
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A] =
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[RF_PATH_A] =
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_A];
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_A] =
-1 * deltaSwingTableIdx_TDOWN_A[delta];
/* Record delta swing for mix mode power tracking */
- pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] =
+ pDM_Odm->Absolute_OFDMSwingIdx[RF_PATH_A] =
-1 * deltaSwingTableIdx_TDOWN_A[delta];
if (c.RfPathCount > 1) {
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_B] =
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B];
- pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B] =
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[RF_PATH_B] =
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_B];
+ pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_B] =
-1 * deltaSwingTableIdx_TDOWN_B[delta];
/* Record delta swing for mix mode power tracking */
- pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] =
+ pDM_Odm->Absolute_OFDMSwingIdx[RF_PATH_B] =
-1 * deltaSwingTableIdx_TDOWN_B[delta];
}
}
- for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
+ for (p = RF_PATH_A; p < c.RfPathCount; p++) {
if (
pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] ==
pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]
@@ -230,17 +230,17 @@ void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter)
/* else if (pDM_Odm->RFCalibrateInfo.CCK_index < 0) */
/* pDM_Odm->RFCalibrateInfo.CCK_index = 0; */
} else {
- for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
+ for (p = RF_PATH_A; p < c.RfPathCount; p++)
pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0;
}
/* Print Swing base & current */
- for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
+ for (p = RF_PATH_A; p < c.RfPathCount; p++) {
}
if (
- (pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A] != 0 ||
- pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_B] != 0) &&
+ (pDM_Odm->RFCalibrateInfo.PowerIndexOffset[RF_PATH_A] != 0 ||
+ pDM_Odm->RFCalibrateInfo.PowerIndexOffset[RF_PATH_B] != 0) &&
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl
) {
/* 4 7.2 Configure the Swing Table to adjust Tx Power. */
@@ -253,16 +253,16 @@ void ODM_TXPowerTrackingCallback_ThermalMeter(struct adapter *Adapter)
/* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */
if (ThermalValue > pHalData->EEPROMThermalMeter) {
- for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
+ for (p = RF_PATH_A; p < c.RfPathCount; p++)
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0);
} else {
- for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
+ for (p = RF_PATH_A; p < c.RfPathCount; p++)
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel);
}
/* Record last time Power Tracking result as base. */
pDM_Odm->BbSwingIdxCckBase = pDM_Odm->BbSwingIdxCck;
- for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
+ for (p = RF_PATH_A; p < c.RfPathCount; p++)
pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->BbSwingIdxOfdm[p];
/* Record last Power Tracking Thermal Value */
diff --git a/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c b/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
index c696569ae5cf..a52748f7b56e 100644
--- a/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
+++ b/drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
@@ -67,9 +67,9 @@ static void setIqkMatrix_8723B(
IqkResult_Y = IqkResult_Y | 0xFFFFFC00;
ele_C = ((IqkResult_Y * ele_D)>>8)&0x000003FF;
- /* if (RFPath == ODM_RF_PATH_A) */
+ /* if (RFPath == RF_PATH_A) */
switch (RFPath) {
- case ODM_RF_PATH_A:
+ case RF_PATH_A:
/* write new elements A, C, D to regC80 and regC94,
* element B is always 0
*/
@@ -82,7 +82,7 @@ static void setIqkMatrix_8723B(
value32 = ((IqkResult_X * ele_D)>>7)&0x01;
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, value32);
break;
- case ODM_RF_PATH_B:
+ case RF_PATH_B:
/* write new elements A, C, D to regC88 and regC9C,
* element B is always 0
*/
@@ -101,13 +101,13 @@ static void setIqkMatrix_8723B(
}
} else {
switch (RFPath) {
- case ODM_RF_PATH_A:
+ case RF_PATH_A:
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT24, 0x00);
break;
- case ODM_RF_PATH_B:
+ case RF_PATH_B:
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT28, 0x00);
@@ -380,13 +380,13 @@ static u8 phy_PathA_IQK_8723B(
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
/* enable path A PA in TXIQK mode */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87);
/* disable path B PA in TXIQK mode */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xed, bRFRegOffsetMask, 0x00020); */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x40ec1); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, bRFRegOffsetMask, 0x00020); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x40ec1); */
/* 1 Tx IQK */
/* IQK setting */
@@ -480,12 +480,12 @@ static u8 phy_PathA_RxIQK8723B(
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
/* 1 Get TXIMR setting */
/* modify RXIQK mode table */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
/* LNA2 off, PA on for Dcut */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7);
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7);
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
/* IQK setting */
@@ -564,16 +564,16 @@ static u8 phy_PathA_RxIQK8723B(
/* modify RXIQK mode table */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
/* LAN2 on, PA off for Dcut */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77);
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77);
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */
/* PA, PAD setting */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x55, bRFRegOffsetMask, 0x4021f);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x55, bRFRegOffsetMask, 0x4021f);
/* IQK setting */
@@ -631,7 +631,7 @@ static u8 phy_PathA_RxIQK8723B(
/* PA/PAD controlled by 0x0 */
/* leave IQK mode */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x780);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0x780);
/* Allen 20131125 */
tmp = (regEAC & 0x03FF0000)>>16;
@@ -666,13 +666,13 @@ static u8 phy_PathB_IQK_8723B(struct adapter *padapter)
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
/* in TXIQK mode */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x20000); */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f); */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x20000); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87); */
/* enable path B PA in TXIQK mode */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xed, 0x20, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fc1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fc1);
@@ -700,7 +700,7 @@ static u8 phy_PathB_IQK_8723B(struct adapter *padapter)
/* switch to path B */
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); */
/* GNT_BT = 0 */
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
@@ -760,13 +760,13 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
/* switch to path B */
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
/* modify RXIQK mode table */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7);
/* open PA S1 & SMIXER */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xed, 0x20, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fcd);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30fcd);
/* IQK setting */
@@ -794,7 +794,7 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
/* switch to path B */
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); */
/* GNT_BT = 0 */
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
@@ -844,19 +844,19 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
/* modify RXIQK mode table */
/* 20121009, Kordan> RF Mode = 3 */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77);
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7d77);
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); */
/* open PA S1 & close SMIXER */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xed, 0x20, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30ebd);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x30ebd);
/* PA, PAD setting */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80); */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xdf, bRFRegOffsetMask, 0xf80); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x56, bRFRegOffsetMask, 0x51000); */
/* IQK setting */
PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK, bMaskDWord, 0x01004800);
@@ -881,7 +881,7 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
/* switch to path B */
PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280);
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xeffe0); */
/* GNT_BT = 0 */
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, 0x00000800);
@@ -909,7 +909,7 @@ static u8 phy_PathB_RxIQK8723B(struct adapter *padapter, bool configPathB)
/* PA/PAD controlled by 0x0 */
/* leave IQK mode */
/* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, 0xffffff00, 0x00000000); */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_B, 0xdf, bRFRegOffsetMask, 0x180); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, 0xdf, bRFRegOffsetMask, 0x180); */
@@ -1384,7 +1384,7 @@ static void phy_IQCalibrate_8723B(
/* save RF path for 8723B */
/* Path_SEL_BB = PHY_QueryBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord); */
-/* Path_SEL_RF = PHY_QueryRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xb0, 0xfffff); */
+/* Path_SEL_RF = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfffff); */
/* MAC settings */
_PHY_MACSettingCalibration8723B(padapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup);
@@ -1406,12 +1406,12 @@ static void phy_IQCalibrate_8723B(
/* RX IQ calibration setting for 8723B D cut large current issue when leaving IPS */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xed, 0x20, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fbd);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x30000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xf7fb7);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x60fbd);
/* path A TX IQK */
for (i = 0 ; i < retryCount ; i++) {
@@ -1420,7 +1420,7 @@ static void phy_IQCalibrate_8723B(
if (PathAOK == 0x01) {
/* Path A Tx IQK Success */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
- pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_A] = PHY_QueryRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x8, bRFRegOffsetMask);
+ pDM_Odm->RFCalibrateInfo.TxLOK[RF_PATH_A] = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x8, bRFRegOffsetMask);
result[t][0] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
result[t][1] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
@@ -1452,7 +1452,7 @@ static void phy_IQCalibrate_8723B(
if (PathBOK == 0x01) {
/* Path B Tx IQK Success */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
- pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_B] = PHY_QueryRFReg(pDM_Odm->Adapter, ODM_RF_PATH_B, 0x8, bRFRegOffsetMask);
+ pDM_Odm->RFCalibrateInfo.TxLOK[RF_PATH_B] = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_B, 0x8, bRFRegOffsetMask);
result[t][4] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
result[t][5] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
@@ -1489,7 +1489,7 @@ static void phy_IQCalibrate_8723B(
/* Reload RF path */
/* PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB); */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); */
/* Allen initial gain 0xc50 */
/* Restore RX initial gain */
@@ -1526,46 +1526,46 @@ static void phy_LCCalibrate_8723B(struct dm_odm_t *pDM_Odm, bool is2T)
if ((tmpReg&0x70) != 0) {
/* 1. Read original RF mode */
/* Path-A */
- RF_Amode = PHY_QueryRFReg(padapter, ODM_RF_PATH_A, RF_AC, bMask12Bits);
+ RF_Amode = PHY_QueryRFReg(padapter, RF_PATH_A, RF_AC, bMask12Bits);
/* Path-B */
if (is2T)
- RF_Bmode = PHY_QueryRFReg(padapter, ODM_RF_PATH_B, RF_AC, bMask12Bits);
+ RF_Bmode = PHY_QueryRFReg(padapter, RF_PATH_B, RF_AC, bMask12Bits);
/* 2. Set RF mode = standby mode */
/* Path-A */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_AC, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000);
/* Path-B */
if (is2T)
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, RF_AC, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000);
}
/* 3. Read RF reg18 */
- LC_Cal = PHY_QueryRFReg(padapter, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits);
+ LC_Cal = PHY_QueryRFReg(padapter, RF_PATH_A, RF_CHNLBW, bMask12Bits);
/* 4. Set LC calibration begin bit15 */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFBE0); /* LDO ON */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFBE0); /* LDO ON */
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal|0x08000);
mdelay(100);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFFE0); /* LDO OFF */
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xB0, bRFRegOffsetMask, 0xDFFE0); /* LDO OFF */
/* Channel 10 LC calibration issue for 8723bs with 26M xtal */
if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO && pDM_Odm->PackageType >= 0x2) {
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_CHNLBW, bMask12Bits, LC_Cal);
}
/* Restore original situation */
if ((tmpReg&0x70) != 0) { /* Deal with contisuous TX case */
/* Path-A */
rtw_write8(pDM_Odm->Adapter, 0xd03, tmpReg);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_AC, bMask12Bits, RF_Amode);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_AC, bMask12Bits, RF_Amode);
/* Path-B */
if (is2T)
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, RF_AC, bMask12Bits, RF_Bmode);
} else /* Deal with Packet TX case */
rtw_write8(pDM_Odm->Adapter, REG_TXPAUSE, 0x00);
}
@@ -1625,7 +1625,7 @@ void PHY_IQCalibrate_8723B(
u8 path, bResult = SUCCESS;
struct odm_rf_cal_t *pRFCalibrateInfo = &pDM_Odm->RFCalibrateInfo;
- path = (PHY_QueryBBReg(pDM_Odm->Adapter, rS0S1_PathSwitch, bMaskByte0) == 0x00) ? ODM_RF_PATH_A : ODM_RF_PATH_B;
+ path = (PHY_QueryBBReg(pDM_Odm->Adapter, rS0S1_PathSwitch, bMaskByte0) == 0x00) ? RF_PATH_A : RF_PATH_B;
/* Restore TX IQK */
for (i = 0; i < 3; ++i) {
@@ -1649,11 +1649,11 @@ void PHY_IQCalibrate_8723B(
PHY_SetBBReg(pDM_Odm->Adapter, offset, bMaskDWord, data);
}
- if (pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_A] == 0) {
+ if (pDM_Odm->RFCalibrateInfo.TxLOK[RF_PATH_A] == 0) {
bResult = FAIL;
} else {
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXM_IDAC, bRFRegOffsetMask, pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_A]);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_B, RF_TXM_IDAC, bRFRegOffsetMask, pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_B]);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXM_IDAC, bRFRegOffsetMask, pDM_Odm->RFCalibrateInfo.TxLOK[RF_PATH_A]);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_B, RF_TXM_IDAC, bRFRegOffsetMask, pDM_Odm->RFCalibrateInfo.TxLOK[RF_PATH_B]);
}
if (bResult == SUCCESS)
@@ -1669,7 +1669,7 @@ void PHY_IQCalibrate_8723B(
GNT_BT_default = PHY_QueryBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord);
/* Save RF Path */
/* Path_SEL_BB = PHY_QueryBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord); */
-/* Path_SEL_RF = PHY_QueryRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xb0, 0xfffff); */
+/* Path_SEL_RF = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfffff); */
/* set GNT_BT = 0, pause BT traffic */
/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT12, 0x0); */
@@ -1770,15 +1770,15 @@ void PHY_IQCalibrate_8723B(
PHY_SetBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord, GNT_BT_default);
/* Restore RF Path */
/* PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, Path_SEL_BB); */
-/* PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); */
+/* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xb0, 0xfffff, Path_SEL_RF); */
/* Resotr RX mode table parameter */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xe6177);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0xed, 0x20, 0x1);
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x43, bRFRegOffsetMask, 0x300bd);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0001f);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xe6177);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, 0x20, 0x1);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0x43, bRFRegOffsetMask, 0x300bd);
/* set GNT_BT = HW control */
/* PHY_SetBBReg(pDM_Odm->Adapter, 0x764, BIT12, 0x0); */
diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
index a47a0a1cae22..3e426c975828 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
@@ -16,7 +16,7 @@ u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath,
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
u8 value = 0;
- if (RfPath > ODM_RF_PATH_D)
+ if (RfPath >= RF_PATH_MAX)
return 0;
switch (RateSection) {
@@ -47,7 +47,7 @@ phy_SetTxPowerByRateBase(
{
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
- if (RfPath > ODM_RF_PATH_D)
+ if (RfPath >= RF_PATH_MAX)
return;
switch (RateSection) {
@@ -72,7 +72,7 @@ struct adapter *padapter
{
u8 path, base;
- for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_B; ++path) {
+ for (path = RF_PATH_A; path <= RF_PATH_B; ++path) {
base = PHY_GetTxPowerByRate(padapter, path, RF_1TX, MGN_11M);
phy_SetTxPowerByRateBase(padapter, path, CCK, RF_1TX, base);
@@ -347,7 +347,7 @@ static void PHY_StoreTxPowerByRateNew(
PHY_GetRateValuesOfTxPowerByRate(padapter, RegAddr, BitMask, Data, rateIndex, PwrByRateVal, &rateNum);
- if (RfPath > ODM_RF_PATH_D)
+ if (RfPath >= RF_PATH_MAX)
return;
if (TxNum > RF_MAX_TX_NUM)
@@ -418,7 +418,7 @@ struct adapter *padapter
u8 mcs0_7Rates[8] = {
MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7
};
- for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_D; ++path) {
+ for (path = RF_PATH_A; path < RF_PATH_MAX; ++path) {
for (txNum = RF_1TX; txNum < RF_MAX_TX_NUM; ++txNum) {
/* CCK */
base = PHY_GetTxPowerByRate(padapter, path, txNum, MGN_11M);
@@ -619,7 +619,7 @@ s8 PHY_GetTxPowerByRate(
padapter->registrypriv.RegEnableTxPowerByRate == 0)
return 0;
- if (RFPath > ODM_RF_PATH_D)
+ if (RFPath >= RF_PATH_MAX)
return value;
if (TxNum >= RF_MAX_TX_NUM)
@@ -643,7 +643,7 @@ void PHY_SetTxPowerByRate(
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
u8 rateIndex = PHY_GetRateIndexOfTxPowerByRate(Rate);
- if (RFPath > ODM_RF_PATH_D)
+ if (RFPath >= RF_PATH_MAX)
return;
if (TxNum >= RF_MAX_TX_NUM)
@@ -809,9 +809,9 @@ void PHY_ConvertTxPowerLimitToPowerIndex(struct adapter *Adapter)
for (bw = 0; bw < MAX_2_4G_BANDWIDTH_NUM; ++bw) {
for (channel = 0; channel < CHANNEL_MAX_NUMBER_2G; ++channel) {
for (rateSection = 0; rateSection < MAX_RATE_SECTION_NUM; ++rateSection) {
- tempPwrLmt = pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][ODM_RF_PATH_A];
+ tempPwrLmt = pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][RF_PATH_A];
- for (rfPath = ODM_RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath) {
+ for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath) {
if (pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE) {
if (rateSection == 2) /* HT 1T */
BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, RF_1TX, HT_MCS0_MCS7);
@@ -904,10 +904,10 @@ void PHY_SetTxPowerLimit(
if (channelIndex == -1)
return;
- prevPowerLimit = pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A];
+ prevPowerLimit = pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A];
if (powerLimit < prevPowerLimit)
- pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][ODM_RF_PATH_A] = powerLimit;
+ pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A] = powerLimit;
}
void Hal_ChannelPlanToRegulation(struct adapter *Adapter, u16 ChannelPlan)
diff --git a/drivers/staging/rtl8723bs/hal/odm.c b/drivers/staging/rtl8723bs/hal/odm.c
index 45fdd51b784e..fd5656398c3d 100644
--- a/drivers/staging/rtl8723bs/hal/odm.c
+++ b/drivers/staging/rtl8723bs/hal/odm.c
@@ -718,7 +718,7 @@ void odm_TXPowerTrackingInit(struct dm_odm_t *pDM_Odm)
pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex;
pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->DefaultCckIndex;
- for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p) {
+ for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->DefaultOfdmIndex;
pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pDM_Odm->DefaultOfdmIndex;
pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = 0;
@@ -736,7 +736,7 @@ void ODM_TXPowerTrackingCheck(struct dm_odm_t *pDM_Odm)
return;
if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */
- PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03);
+ PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03);
pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
return;
diff --git a/drivers/staging/rtl8723bs/hal/odm.h b/drivers/staging/rtl8723bs/hal/odm.h
index abf6547518fb..c77fb6e341b2 100644
--- a/drivers/staging/rtl8723bs/hal/odm.h
+++ b/drivers/staging/rtl8723bs/hal/odm.h
@@ -998,26 +998,6 @@ struct dm_odm_t { /* DM_Out_Source_Dynamic_Mechanism_Structure */
#endif
};
-#define ODM_RF_PATH_MAX 2
-
-enum odm_rf_radio_path_e {
- ODM_RF_PATH_A = 0, /* Radio Path A */
- ODM_RF_PATH_B = 1, /* Radio Path B */
- ODM_RF_PATH_C = 2, /* Radio Path C */
- ODM_RF_PATH_D = 3, /* Radio Path D */
- ODM_RF_PATH_AB,
- ODM_RF_PATH_AC,
- ODM_RF_PATH_AD,
- ODM_RF_PATH_BC,
- ODM_RF_PATH_BD,
- ODM_RF_PATH_CD,
- ODM_RF_PATH_ABC,
- ODM_RF_PATH_ACD,
- ODM_RF_PATH_BCD,
- ODM_RF_PATH_ABCD,
- /* ODM_RF_PATH_MAX, Max RF number 90 support */
-};
-
enum odm_rf_content {
odm_radioa_txt = 0x1000,
odm_radiob_txt = 0x1001,
diff --git a/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c b/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
index a99d567468b2..1e084f01050e 100644
--- a/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
+++ b/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
@@ -203,7 +203,7 @@ void odm_parsing_cfo(void *dm_void, void *pkt_info_void, s8 *cfotail)
* 3 Update CFO report for path-A & path-B
* Only paht-A and path-B have CFO tail and short CFO
*/
- for (i = ODM_RF_PATH_A; i <= ODM_RF_PATH_B; i++)
+ for (i = RF_PATH_A; i <= RF_PATH_B; i++)
cfo_track->CFO_tail[i] = (int)cfotail[i];
/* 3 Update packet counter */
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
index 16d479dbd069..994b8c578e7a 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.c
@@ -113,8 +113,8 @@ static void odm_rx_phy_status_parsing(struct dm_odm_t *dm_odm,
struct phy_status_rpt_8192cd_t *phy_sta_rpt = (struct phy_status_rpt_8192cd_t *)phy_status;
is_cck_rate = pkt_info->data_rate <= DESC_RATE11M;
- phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = -1;
- phy_info->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
+ phy_info->rx_mimo_signal_quality[RF_PATH_A] = -1;
+ phy_info->rx_mimo_signal_quality[RF_PATH_B] = -1;
if (is_cck_rate) {
@@ -166,8 +166,8 @@ static void odm_rx_phy_status_parsing(struct dm_odm_t *dm_odm,
}
phy_info->signal_quality = sq;
- phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = sq;
- phy_info->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
+ phy_info->rx_mimo_signal_quality[RF_PATH_A] = sq;
+ phy_info->rx_mimo_signal_quality[RF_PATH_B] = -1;
}
} else { /* is OFDM rate */
dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
@@ -176,7 +176,7 @@ static void odm_rx_phy_status_parsing(struct dm_odm_t *dm_odm,
* (1)Get RSSI for HT rate
*/
- for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
+ for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
/* 2008/01/30 MH we will judge RF RX path now. */
if (dm_odm->RFPathRxEnable & BIT(i))
rf_rx_num++;
@@ -227,7 +227,7 @@ static void odm_rx_phy_status_parsing(struct dm_odm_t *dm_odm,
/* Fill value in RFD, Get the first spatial stream only */
phy_info->signal_quality = (u8)(evm & 0xff);
- phy_info->rx_mimo_signal_quality[ODM_RF_PATH_A] = (u8)(evm & 0xff);
+ phy_info->rx_mimo_signal_quality[RF_PATH_A] = (u8)(evm & 0xff);
odm_parsing_cfo(dm_odm, pkt_info, phy_sta_rpt->path_cfotail);
}
@@ -290,23 +290,23 @@ static void odm_Process_RSSIForDM(
if (pPktinfo->to_self || pPktinfo->is_beacon) {
if (!isCCKrate) { /* ofdm rate */
- if (pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B] == 0) {
- RSSI_Ave = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
- pDM_Odm->RSSI_A = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
+ if (pPhyInfo->rx_mimo_signal_strength[RF_PATH_B] == 0) {
+ RSSI_Ave = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
+ pDM_Odm->RSSI_A = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
pDM_Odm->RSSI_B = 0;
} else {
- pDM_Odm->RSSI_A = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
- pDM_Odm->RSSI_B = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B];
+ pDM_Odm->RSSI_A = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
+ pDM_Odm->RSSI_B = pPhyInfo->rx_mimo_signal_strength[RF_PATH_B];
if (
- pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A] >
- pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B]
+ pPhyInfo->rx_mimo_signal_strength[RF_PATH_A] >
+ pPhyInfo->rx_mimo_signal_strength[RF_PATH_B]
) {
- RSSI_max = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
- RSSI_min = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B];
+ RSSI_max = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
+ RSSI_min = pPhyInfo->rx_mimo_signal_strength[RF_PATH_B];
} else {
- RSSI_max = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B];
- RSSI_min = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
+ RSSI_max = pPhyInfo->rx_mimo_signal_strength[RF_PATH_B];
+ RSSI_min = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
}
if ((RSSI_max-RSSI_min) < 3)
@@ -411,7 +411,7 @@ void odm_phy_status_query(struct dm_odm_t *dm_odm, struct odm_phy_info *phy_info
enum hal_status ODM_ConfigRFWithHeaderFile(
struct dm_odm_t *pDM_Odm,
enum ODM_RF_Config_Type ConfigType,
- enum odm_rf_radio_path_e eRFPath
+ enum rf_path eRFPath
)
{
if (ConfigType == CONFIG_RF_RADIO)
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.h b/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
index b2eae7d993fa..2e10974ffef1 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
@@ -84,7 +84,7 @@ enum hal_status ODM_ConfigRFWithTxPwrTrackHeaderFile(struct dm_odm_t *pDM_Odm);
enum hal_status ODM_ConfigRFWithHeaderFile(
struct dm_odm_t *pDM_Odm,
enum ODM_RF_Config_Type ConfigType,
- enum odm_rf_radio_path_e eRFPath
+ enum rf_path eRFPath
);
enum hal_status ODM_ConfigBBWithHeaderFile(
diff --git a/drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c b/drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c
index ad169704f3e9..97acf75fc04e 100644
--- a/drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c
+++ b/drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c
@@ -70,17 +70,17 @@ static s16 odm_InbandNoise_Monitor_NSeries(
/* update idle time pwer report per 5us */
PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_TxGainStage, BIT25, 0);
- noise_data.value[ODM_RF_PATH_A] = (u8)(tmp4b&0xff);
- noise_data.value[ODM_RF_PATH_B] = (u8)((tmp4b&0xff00)>>8);
+ noise_data.value[RF_PATH_A] = (u8)(tmp4b&0xff);
+ noise_data.value[RF_PATH_B] = (u8)((tmp4b&0xff00)>>8);
- for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) {
+ for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) {
noise_data.sval[rf_path] = (s8)noise_data.value[rf_path];
noise_data.sval[rf_path] /= 2;
}
/* mdelay(10); */
/* msleep(10); */
- for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) {
+ for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) {
if ((noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min)) {
noise_data.valid_cnt[rf_path]++;
noise_data.sum[rf_path] += noise_data.sval[rf_path];
@@ -94,7 +94,7 @@ static s16 odm_InbandNoise_Monitor_NSeries(
/* printk("####### valid_done:%d #############\n", valid_done); */
if ((valid_done == max_rf_path) || (jiffies_to_msecs(jiffies - start) > max_time)) {
- for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) {
+ for (rf_path = RF_PATH_A; rf_path < max_rf_path; rf_path++) {
/* printk("%s PATH_%d - sum = %d, valid_cnt = %d\n", __func__, rf_path, noise_data.sum[rf_path], noise_data.valid_cnt[rf_path]); */
if (noise_data.valid_cnt[rf_path])
noise_data.sum[rf_path] /= noise_data.valid_cnt[rf_path];
@@ -106,14 +106,14 @@ static s16 odm_InbandNoise_Monitor_NSeries(
}
reg_c50 = (s32)PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XAAGCCore1, bMaskByte0);
reg_c50 &= ~BIT7;
- pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A];
- pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A];
+ pDM_Odm->noise_level.noise[RF_PATH_A] = -110 + reg_c50 + noise_data.sum[RF_PATH_A];
+ pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[RF_PATH_A];
if (max_rf_path == 2) {
reg_c58 = (s32)PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XBAGCCore1, bMaskByte0);
reg_c58 &= ~BIT7;
- pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B];
- pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B];
+ pDM_Odm->noise_level.noise[RF_PATH_B] = -110 + reg_c58 + noise_data.sum[RF_PATH_B];
+ pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[RF_PATH_B];
}
pDM_Odm->noise_level.noise_all /= max_rf_path;
diff --git a/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c b/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
index a29bd9375023..0f71b1adea40 100644
--- a/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
+++ b/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
@@ -11,7 +11,7 @@ void odm_ConfigRFReg_8723B(
struct dm_odm_t *pDM_Odm,
u32 Addr,
u32 Data,
- enum odm_rf_radio_path_e RF_PATH,
+ enum rf_path RF_PATH,
u32 RegAddr
)
{
@@ -93,7 +93,7 @@ void odm_ConfigRF_RadioA_8723B(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Data)
pDM_Odm,
Addr,
Data,
- ODM_RF_PATH_A,
+ RF_PATH_A,
Addr|maskforPhySet
);
}
diff --git a/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h b/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h
index bdd6fde49fc6..b8d4c2aa6d4d 100644
--- a/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h
+++ b/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h
@@ -10,7 +10,7 @@
void odm_ConfigRFReg_8723B(struct dm_odm_t *pDM_Odm,
u32 Addr,
u32 Data,
- enum odm_rf_radio_path_e RF_PATH,
+ enum rf_path RF_PATH,
u32 RegAddr
);
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
index 713ee0179dda..ce4f81828a65 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
@@ -2280,21 +2280,21 @@ void Hal_EfuseParseBTCoexistInfo_8723B(
tempval = hwinfo[EEPROM_RF_BT_SETTING_8723B];
if (tempval != 0xFF) {
pHalData->EEPROMBluetoothAntNum = tempval & BIT(0);
- /* EFUSE_0xC3[6] == 0, S1(Main)-ODM_RF_PATH_A; */
- /* EFUSE_0xC3[6] == 1, S0(Aux)-ODM_RF_PATH_B */
- pHalData->ant_path = (tempval & BIT(6))?ODM_RF_PATH_B:ODM_RF_PATH_A;
+ /* EFUSE_0xC3[6] == 0, S1(Main)-RF_PATH_A; */
+ /* EFUSE_0xC3[6] == 1, S0(Aux)-RF_PATH_B */
+ pHalData->ant_path = (tempval & BIT(6))? RF_PATH_B : RF_PATH_A;
} else {
pHalData->EEPROMBluetoothAntNum = Ant_x1;
if (pHalData->PackageType == PACKAGE_QFN68)
- pHalData->ant_path = ODM_RF_PATH_B;
+ pHalData->ant_path = RF_PATH_B;
else
- pHalData->ant_path = ODM_RF_PATH_A;
+ pHalData->ant_path = RF_PATH_A;
}
} else {
pHalData->EEPROMBluetoothCoexist = false;
pHalData->EEPROMBluetoothType = BT_RTL8723B;
pHalData->EEPROMBluetoothAntNum = Ant_x1;
- pHalData->ant_path = ODM_RF_PATH_A;
+ pHalData->ant_path = RF_PATH_A;
}
if (padapter->registrypriv.ant_num > 0) {
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
index ca6b548171b4..4b362320ce31 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
@@ -308,28 +308,28 @@ static void phy_InitBBRFRegisterDefinition(struct adapter *Adapter)
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
/* RF Interface Sowrtware Control */
- pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
- pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */
+ pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
+ pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */
/* RF Interface Output (and Enable) */
- pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
- pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x864 */
+ pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
+ pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x864 */
/* RF Interface (Output and) Enable */
- pHalData->PHYRegDef[ODM_RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
- pHalData->PHYRegDef[ODM_RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */
+ pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
+ pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */
- pHalData->PHYRegDef[ODM_RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
- pHalData->PHYRegDef[ODM_RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
+ pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
+ pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
- pHalData->PHYRegDef[ODM_RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
- pHalData->PHYRegDef[ODM_RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */
+ pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
+ pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */
/* Tranceiver Readback LSSI/HSPI mode */
- pHalData->PHYRegDef[ODM_RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
- pHalData->PHYRegDef[ODM_RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
- pHalData->PHYRegDef[ODM_RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
- pHalData->PHYRegDef[ODM_RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
+ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
+ pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
+ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
+ pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
}
@@ -399,7 +399,7 @@ int PHY_BBConfig8723B(struct adapter *Adapter)
msleep(1);
- PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x1, 0xfffff, 0x780);
+ PHY_SetRFReg(Adapter, RF_PATH_A, 0x1, 0xfffff, 0x780);
rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB);
@@ -453,7 +453,7 @@ void PHY_SetTxPowerIndex(
u8 Rate
)
{
- if (RFPath == ODM_RF_PATH_A || RFPath == ODM_RF_PATH_B) {
+ if (RFPath == RF_PATH_A || RFPath == RF_PATH_B) {
switch (Rate) {
case MGN_1M:
PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, PowerIndex);
@@ -538,7 +538,7 @@ u8 PHY_GetTxPowerIndex(
s8 txPower = 0, powerDiffByRate = 0, limit = 0;
txPower = (s8) PHY_GetTxPowerIndexBase(padapter, RFPath, Rate, BandWidth, Channel);
- powerDiffByRate = PHY_GetTxPowerByRate(padapter, ODM_RF_PATH_A, RF_1TX, Rate);
+ powerDiffByRate = PHY_GetTxPowerByRate(padapter, RF_PATH_A, RF_1TX, Rate);
limit = phy_get_tx_pwr_lmt(
padapter,
@@ -565,10 +565,10 @@ void PHY_SetTxPowerLevel8723B(struct adapter *Adapter, u8 Channel)
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
struct dm_odm_t *pDM_Odm = &pHalData->odmpriv;
struct fat_t *pDM_FatTable = &pDM_Odm->DM_FatTable;
- u8 RFPath = ODM_RF_PATH_A;
+ u8 RFPath = RF_PATH_A;
if (pHalData->AntDivCfg) {/* antenna diversity Enable */
- RFPath = ((pDM_FatTable->RxIdleAnt == MAIN_ANT) ? ODM_RF_PATH_A : ODM_RF_PATH_B);
+ RFPath = ((pDM_FatTable->RxIdleAnt == MAIN_ANT) ? RF_PATH_A : RF_PATH_B);
} else { /* antenna diversity disable */
RFPath = pHalData->ant_path;
}
@@ -672,8 +672,8 @@ static void phy_SwChnl8723B(struct adapter *padapter)
if (pHalData->rf_chip == RF_PSEUDO_11N)
return;
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff00) | channelToSW);
- PHY_SetRFReg(padapter, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]);
- PHY_SetRFReg(padapter, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]);
+ PHY_SetRFReg(padapter, RF_PATH_A, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]);
+ PHY_SetRFReg(padapter, RF_PATH_B, RF_CHNLBW, 0x3FF, pHalData->RfRegChnlVal[0]);
}
static void phy_SwChnlAndSetBwMode8723B(struct adapter *Adapter)
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c b/drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
index 38228b46b1ee..51865f81b1fe 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
@@ -63,14 +63,14 @@ void PHY_RF6052SetBandwidth8723B(
switch (Bandwidth) {
case CHANNEL_WIDTH_20:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10 | BIT11);
- PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
- PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
+ PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
+ PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
break;
case CHANNEL_WIDTH_40:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT10);
- PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
- PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
+ PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
+ PHY_SetRFReg(Adapter, RF_PATH_B, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
break;
default:
@@ -97,11 +97,9 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
/*----Store original RFENV control type----*/
switch (eRFPath) {
case RF_PATH_A:
- case RF_PATH_C:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
break;
case RF_PATH_B:
- case RF_PATH_D:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16);
break;
}
@@ -128,19 +126,14 @@ static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,
CONFIG_RF_RADIO, eRFPath);
break;
- case RF_PATH_C:
- case RF_PATH_D:
- break;
}
/*----Restore RFENV control type----*/
switch (eRFPath) {
case RF_PATH_A:
- case RF_PATH_C:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
break;
case RF_PATH_B:
- case RF_PATH_D:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV << 16, u4RegValue);
break;
}
@@ -163,7 +156,6 @@ int PHY_RF6052_Config8723B(struct adapter *Adapter)
/* */
/* Initialize general global value */
/* */
- /* TODO: Extend RF_PATH_C and RF_PATH_D in the future */
if (pHalData->rf_type == RF_1T1R)
pHalData->NumTotalRFPath = 1;
else
diff --git a/drivers/staging/rtl8723bs/include/hal_phy.h b/drivers/staging/rtl8723bs/include/hal_phy.h
index 861aa71cd179..3d71a4f41592 100644
--- a/drivers/staging/rtl8723bs/include/hal_phy.h
+++ b/drivers/staging/rtl8723bs/include/hal_phy.h
@@ -30,8 +30,7 @@ enum {
enum rf_path {
RF_PATH_A = 0,
RF_PATH_B,
- RF_PATH_C,
- RF_PATH_D
+ RF_PATH_MAX
};
#define TX_1S 0
--
2.20.1
remove unused rtw_rf_config module param and struct field
used to store the param value.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/include/drv_types.h | 1 -
drivers/staging/rtl8723bs/os_dep/os_intfs.c | 4 ----
2 files changed, 5 deletions(-)
diff --git a/drivers/staging/rtl8723bs/include/drv_types.h b/drivers/staging/rtl8723bs/include/drv_types.h
index d49009c75d2e..580028d28c42 100644
--- a/drivers/staging/rtl8723bs/include/drv_types.h
+++ b/drivers/staging/rtl8723bs/include/drv_types.h
@@ -132,7 +132,6 @@ struct registry_priv {
u8 lowrate_two_xmit;
- u8 rf_config;
u8 low_power;
u8 wifi_spec;/* !turbo_mode */
diff --git a/drivers/staging/rtl8723bs/os_dep/os_intfs.c b/drivers/staging/rtl8723bs/os_dep/os_intfs.c
index 128c64e0f0ab..7728eabdfe48 100644
--- a/drivers/staging/rtl8723bs/os_dep/os_intfs.c
+++ b/drivers/staging/rtl8723bs/os_dep/os_intfs.c
@@ -89,8 +89,6 @@ static int rtw_beamform_cap = 0x2;
static int rtw_lowrate_two_xmit = 1;/* Use 2 path Tx to transmit MCS0~7 and legacy mode */
-/* int rf_config = RF_1T2R; 1T2R */
-static int rtw_rf_config = RF_MAX_TYPE; /* auto */
static int rtw_low_power;
static int rtw_wifi_spec;
static int rtw_channel_plan = RT_CHANNEL_DOMAIN_MAX;
@@ -144,7 +142,6 @@ module_param(rtw_ampdu_amsdu, int, 0644);
module_param(rtw_lowrate_two_xmit, int, 0644);
-module_param(rtw_rf_config, int, 0644);
module_param(rtw_power_mgnt, int, 0644);
module_param(rtw_smart_ps, int, 0644);
module_param(rtw_low_power, int, 0644);
@@ -249,7 +246,6 @@ static void loadparam(struct adapter *padapter, struct net_device *pnetdev)
registry_par->beamform_cap = (u8)rtw_beamform_cap;
registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit;
- registry_par->rf_config = (u8)rtw_rf_config;
registry_par->low_power = (u8)rtw_low_power;
--
2.20.1
remove all function calls to rtw_get_hw_reg made to
read HW_VAR_RF_TYPE and get value of rt_type, which
is always 1T1R. Clean up code on removal sites,
keeping 1T1R code unconditionally.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/core/rtw_ap.c | 8 +-
drivers/staging/rtl8723bs/core/rtw_debug.c | 18 +----
.../staging/rtl8723bs/core/rtw_ieee80211.c | 73 +++++--------------
.../staging/rtl8723bs/core/rtw_ioctl_set.c | 6 +-
drivers/staging/rtl8723bs/core/rtw_mlme.c | 36 ++-------
.../staging/rtl8723bs/core/rtw_wlan_util.c | 38 ++--------
drivers/staging/rtl8723bs/hal/hal_com.c | 8 +-
drivers/staging/rtl8723bs/include/ieee80211.h | 2 +-
.../staging/rtl8723bs/os_dep/ioctl_cfg80211.c | 23 ++----
9 files changed, 44 insertions(+), 168 deletions(-)
diff --git a/drivers/staging/rtl8723bs/core/rtw_ap.c b/drivers/staging/rtl8723bs/core/rtw_ap.c
index 69a55482e8a0..6064dd6a76b4 100644
--- a/drivers/staging/rtl8723bs/core/rtw_ap.c
+++ b/drivers/staging/rtl8723bs/core/rtw_ap.c
@@ -1034,7 +1034,6 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
(pbss_network->ie_length - _BEACON_IE_OFFSET_)
);
if (p && ie_len > 0) {
- u8 rf_type = 0;
u8 max_rx_ampdu_factor = 0;
struct ieee80211_ht_cap *pht_cap = (struct ieee80211_ht_cap *)(p + 2);
@@ -1080,11 +1079,8 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
IEEE80211_HT_CAP_AMPDU_FACTOR & max_rx_ampdu_factor
); /* set Max Rx AMPDU size to 64K */
- rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
- if (rf_type == RF_1T1R) {
- pht_cap->mcs.rx_mask[0] = 0xff;
- pht_cap->mcs.rx_mask[1] = 0x0;
- }
+ pht_cap->mcs.rx_mask[0] = 0xff;
+ pht_cap->mcs.rx_mask[1] = 0x0;
memcpy(&pmlmepriv->htpriv.ht_cap, p + 2, ie_len);
}
diff --git a/drivers/staging/rtl8723bs/core/rtw_debug.c b/drivers/staging/rtl8723bs/core/rtw_debug.c
index 76ad1122f89f..5354fdd11c9b 100644
--- a/drivers/staging/rtl8723bs/core/rtw_debug.c
+++ b/drivers/staging/rtl8723bs/core/rtw_debug.c
@@ -58,21 +58,11 @@ static void dump_4_rf_regs(struct adapter *adapter, int path, int offset)
void rf_reg_dump(struct adapter *adapter)
{
- int i, path;
- u8 rf_type = 0;
- u8 path_nums = 0;
-
- rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
- if ((RF_1T2R == rf_type) || (RF_1T1R == rf_type))
- path_nums = 1;
- else
- path_nums = 2;
+ int i, path = 0;
netdev_dbg(adapter->pnetdev, "======= RF REG =======\n");
- for (path = 0; path < path_nums; path++) {
- netdev_dbg(adapter->pnetdev, "RF_Path(%x)\n", path);
- for (i = 0; i < 0x100; i++)
- dump_4_rf_regs(adapter, path, i);
- }
+ netdev_dbg(adapter->pnetdev, "RF_Path(%x)\n", path);
+ for (i = 0; i < 0x100; i++)
+ dump_4_rf_regs(adapter, path, i);
}
diff --git a/drivers/staging/rtl8723bs/core/rtw_ieee80211.c b/drivers/staging/rtl8723bs/core/rtw_ieee80211.c
index 795eafb7d6ff..b449be537376 100644
--- a/drivers/staging/rtl8723bs/core/rtw_ieee80211.c
+++ b/drivers/staging/rtl8723bs/core/rtw_ieee80211.c
@@ -1106,64 +1106,27 @@ void rtw_get_bcn_info(struct wlan_network *pnetwork)
}
/* show MCS rate, unit: 100Kbps */
-u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate)
+u16 rtw_mcs_rate(u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate)
{
u16 max_rate = 0;
- if (rf_type == RF_1T1R) {
- if (MCS_rate[0] & BIT(7))
- max_rate = (bw_40MHz) ? ((short_GI)?1500:1350):((short_GI)?722:650);
- else if (MCS_rate[0] & BIT(6))
- max_rate = (bw_40MHz) ? ((short_GI)?1350:1215):((short_GI)?650:585);
- else if (MCS_rate[0] & BIT(5))
- max_rate = (bw_40MHz) ? ((short_GI)?1200:1080):((short_GI)?578:520);
- else if (MCS_rate[0] & BIT(4))
- max_rate = (bw_40MHz) ? ((short_GI)?900:810):((short_GI)?433:390);
- else if (MCS_rate[0] & BIT(3))
- max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260);
- else if (MCS_rate[0] & BIT(2))
- max_rate = (bw_40MHz) ? ((short_GI)?450:405):((short_GI)?217:195);
- else if (MCS_rate[0] & BIT(1))
- max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130);
- else if (MCS_rate[0] & BIT(0))
- max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65);
- } else {
- if (MCS_rate[1]) {
- if (MCS_rate[1] & BIT(7))
- max_rate = (bw_40MHz) ? ((short_GI)?3000:2700):((short_GI)?1444:1300);
- else if (MCS_rate[1] & BIT(6))
- max_rate = (bw_40MHz) ? ((short_GI)?2700:2430):((short_GI)?1300:1170);
- else if (MCS_rate[1] & BIT(5))
- max_rate = (bw_40MHz) ? ((short_GI)?2400:2160):((short_GI)?1156:1040);
- else if (MCS_rate[1] & BIT(4))
- max_rate = (bw_40MHz) ? ((short_GI)?1800:1620):((short_GI)?867:780);
- else if (MCS_rate[1] & BIT(3))
- max_rate = (bw_40MHz) ? ((short_GI)?1200:1080):((short_GI)?578:520);
- else if (MCS_rate[1] & BIT(2))
- max_rate = (bw_40MHz) ? ((short_GI)?900:810):((short_GI)?433:390);
- else if (MCS_rate[1] & BIT(1))
- max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260);
- else if (MCS_rate[1] & BIT(0))
- max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130);
- } else {
- if (MCS_rate[0] & BIT(7))
- max_rate = (bw_40MHz) ? ((short_GI)?1500:1350):((short_GI)?722:650);
- else if (MCS_rate[0] & BIT(6))
- max_rate = (bw_40MHz) ? ((short_GI)?1350:1215):((short_GI)?650:585);
- else if (MCS_rate[0] & BIT(5))
- max_rate = (bw_40MHz) ? ((short_GI)?1200:1080):((short_GI)?578:520);
- else if (MCS_rate[0] & BIT(4))
- max_rate = (bw_40MHz) ? ((short_GI)?900:810):((short_GI)?433:390);
- else if (MCS_rate[0] & BIT(3))
- max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260);
- else if (MCS_rate[0] & BIT(2))
- max_rate = (bw_40MHz) ? ((short_GI)?450:405):((short_GI)?217:195);
- else if (MCS_rate[0] & BIT(1))
- max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130);
- else if (MCS_rate[0] & BIT(0))
- max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65);
- }
- }
+ if (MCS_rate[0] & BIT(7))
+ max_rate = (bw_40MHz) ? ((short_GI)?1500:1350):((short_GI)?722:650);
+ else if (MCS_rate[0] & BIT(6))
+ max_rate = (bw_40MHz) ? ((short_GI)?1350:1215):((short_GI)?650:585);
+ else if (MCS_rate[0] & BIT(5))
+ max_rate = (bw_40MHz) ? ((short_GI)?1200:1080):((short_GI)?578:520);
+ else if (MCS_rate[0] & BIT(4))
+ max_rate = (bw_40MHz) ? ((short_GI)?900:810):((short_GI)?433:390);
+ else if (MCS_rate[0] & BIT(3))
+ max_rate = (bw_40MHz) ? ((short_GI)?600:540):((short_GI)?289:260);
+ else if (MCS_rate[0] & BIT(2))
+ max_rate = (bw_40MHz) ? ((short_GI)?450:405):((short_GI)?217:195);
+ else if (MCS_rate[0] & BIT(1))
+ max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130);
+ else if (MCS_rate[0] & BIT(0))
+ max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65);
+
return max_rate;
}
diff --git a/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c b/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c
index 0152491455a2..5f25cbf83723 100644
--- a/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c
+++ b/drivers/staging/rtl8723bs/core/rtw_ioctl_set.c
@@ -541,7 +541,6 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter)
struct wlan_bssid_ex *pcur_bss = &pmlmepriv->cur_network.network;
struct sta_info *psta = NULL;
u8 short_GI = 0;
- u8 rf_type = 0;
if ((check_fwstate(pmlmepriv, _FW_LINKED) != true)
&& (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != true))
@@ -554,10 +553,7 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter)
short_GI = query_ra_short_GI(psta);
if (is_supported_ht(psta->wireless_mode)) {
- rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-
- max_rate = rtw_mcs_rate(rf_type,
- ((psta->bw_mode == CHANNEL_WIDTH_40)?1:0),
+ max_rate = rtw_mcs_rate(psta->bw_mode == CHANNEL_WIDTH_40 ? 1 : 0,
short_GI,
psta->htpriv.ht_cap.mcs.rx_mask);
} else {
diff --git a/drivers/staging/rtl8723bs/core/rtw_mlme.c b/drivers/staging/rtl8723bs/core/rtw_mlme.c
index 5ed13bf765d2..64961e394410 100644
--- a/drivers/staging/rtl8723bs/core/rtw_mlme.c
+++ b/drivers/staging/rtl8723bs/core/rtw_mlme.c
@@ -2313,7 +2313,7 @@ unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie, u8 *out_
enum ieee80211_max_ampdu_length_exp max_rx_ampdu_factor;
unsigned char *p;
struct ieee80211_ht_cap ht_capie;
- u8 cbw40_enable = 0, stbc_rx_enable = 0, rf_type = 0, operation_bw = 0;
+ u8 cbw40_enable = 0, stbc_rx_enable = 0, operation_bw = 0;
struct registry_priv *pregistrypriv = &padapter->registrypriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct ht_priv *phtpriv = &pmlmepriv->htpriv;
@@ -2392,25 +2392,10 @@ unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie, u8 *out_
memcpy(ht_capie.mcs.rx_mask, pmlmeext->default_supported_mcs_set, 16);
/* update default supported_mcs_set */
- rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+ if (stbc_rx_enable)
+ ht_capie.cap_info |= cpu_to_le16(IEEE80211_HT_CAP_RX_STBC_1R);/* RX STBC One spatial stream */
- switch (rf_type) {
- case RF_1T1R:
- if (stbc_rx_enable)
- ht_capie.cap_info |= cpu_to_le16(IEEE80211_HT_CAP_RX_STBC_1R);/* RX STBC One spatial stream */
-
- set_mcs_rate_by_mask(ht_capie.mcs.rx_mask, MCS_RATE_1R);
- break;
-
- case RF_2T2R:
- case RF_1T2R:
- default:
- if (stbc_rx_enable)
- ht_capie.cap_info |= cpu_to_le16(IEEE80211_HT_CAP_RX_STBC_2R);/* RX STBC two spatial stream */
-
- set_mcs_rate_by_mask(ht_capie.mcs.rx_mask, MCS_RATE_2R);
- break;
- }
+ set_mcs_rate_by_mask(ht_capie.mcs.rx_mask, MCS_RATE_1R);
{
u32 rx_packet_offset, max_recvbuf_sz;
@@ -2510,24 +2495,13 @@ void rtw_update_ht_cap(struct adapter *padapter, u8 *pie, uint ie_len, u8 channe
(le16_to_cpu(pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info) &
BIT(1)) && (pmlmeinfo->HT_info.infos[0] & BIT(2))) {
int i;
- u8 rf_type;
-
- rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
/* update the MCS set */
for (i = 0; i < 16; i++)
pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i];
/* update the MCS rates */
- switch (rf_type) {
- case RF_1T1R:
- case RF_1T2R:
- set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R);
- break;
- case RF_2T2R:
- default:
- set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R);
- }
+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R);
/* switch to the 40M Hz mode according to the AP */
/* pmlmeext->cur_bwmode = CHANNEL_WIDTH_40; */
diff --git a/drivers/staging/rtl8723bs/core/rtw_wlan_util.c b/drivers/staging/rtl8723bs/core/rtw_wlan_util.c
index 170536986476..18ba846c0b7b 100644
--- a/drivers/staging/rtl8723bs/core/rtw_wlan_util.c
+++ b/drivers/staging/rtl8723bs/core/rtw_wlan_util.c
@@ -46,16 +46,7 @@ static u8 rtw_basic_rate_ofdm[3] = {
u8 networktype_to_raid_ex(struct adapter *adapter, struct sta_info *psta)
{
- u8 raid, cur_rf_type, rf_type = RF_1T1R;
-
- rtw_hal_get_hwreg(adapter, HW_VAR_RF_TYPE, (u8 *)(&cur_rf_type));
-
- if (cur_rf_type == RF_1T1R) {
- rf_type = RF_1T1R;
- } else if (is_supported_ht(psta->wireless_mode)) {
- if (psta->ra_mask & 0xfff00000)
- rf_type = RF_2T2R;
- }
+ u8 raid;
switch (psta->wireless_mode) {
case WIRELESS_11B:
@@ -69,23 +60,14 @@ u8 networktype_to_raid_ex(struct adapter *adapter, struct sta_info *psta)
break;
case WIRELESS_11_24N:
case WIRELESS_11G_24N:
- if (rf_type == RF_2T2R)
- raid = RATEID_IDX_GN_N2SS;
- else
- raid = RATEID_IDX_GN_N1SS;
+ raid = RATEID_IDX_GN_N1SS;
break;
case WIRELESS_11B_24N:
case WIRELESS_11BG_24N:
if (psta->bw_mode == CHANNEL_WIDTH_20) {
- if (rf_type == RF_2T2R)
- raid = RATEID_IDX_BGN_20M_2SS_BN;
- else
- raid = RATEID_IDX_BGN_20M_1SS_BN;
+ raid = RATEID_IDX_BGN_20M_1SS_BN;
} else {
- if (rf_type == RF_2T2R)
- raid = RATEID_IDX_BGN_40M_2SS;
- else
- raid = RATEID_IDX_BGN_40M_1SS;
+ raid = RATEID_IDX_BGN_40M_1SS;
}
break;
default:
@@ -982,7 +964,6 @@ static void bwmode_update_check(struct adapter *padapter, struct ndis_80211_var_
void HT_caps_handler(struct adapter *padapter, struct ndis_80211_var_ie *pIE)
{
unsigned int i;
- u8 rf_type;
u8 max_AMPDU_len, min_MPDU_spacing;
u8 cur_ldpc_cap = 0, cur_stbc_cap = 0;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
@@ -1018,22 +999,13 @@ void HT_caps_handler(struct adapter *padapter, struct ndis_80211_var_ie *pIE)
pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing;
}
}
- rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
/* update the MCS set */
for (i = 0; i < 16; i++)
pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= pmlmeext->default_supported_mcs_set[i];
/* update the MCS rates */
- switch (rf_type) {
- case RF_1T1R:
- case RF_1T2R:
- set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R);
- break;
- case RF_2T2R:
- default:
- set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_2R);
- }
+ set_mcs_rate_by_mask(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_RATE_1R);
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
/* Config STBC setting */
diff --git a/drivers/staging/rtl8723bs/hal/hal_com.c b/drivers/staging/rtl8723bs/hal/hal_com.c
index 8964303a619f..909b37bcc897 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com.c
@@ -545,7 +545,7 @@ u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type)
void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta)
{
- u8 i, rf_type, limit;
+ u8 i, limit;
u32 tx_ra_bitmap;
if (!psta)
@@ -561,11 +561,7 @@ void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *pst
/* n mode ra_bitmap */
if (psta->htpriv.ht_option) {
- rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
- if (rf_type == RF_2T2R)
- limit = 16; /* 2R */
- else
- limit = 8; /* 1R */
+ limit = 8; /* 1R */
for (i = 0; i < limit; i++) {
if (psta->htpriv.ht_cap.mcs.rx_mask[i/8] & BIT(i%8))
diff --git a/drivers/staging/rtl8723bs/include/ieee80211.h b/drivers/staging/rtl8723bs/include/ieee80211.h
index 89851fa36830..d6236f5b069d 100644
--- a/drivers/staging/rtl8723bs/include/ieee80211.h
+++ b/drivers/staging/rtl8723bs/include/ieee80211.h
@@ -779,7 +779,7 @@ void rtw_get_bcn_info(struct wlan_network *pnetwork);
void rtw_macaddr_cfg(struct device *dev, u8 *mac_addr);
-u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate);
+u16 rtw_mcs_rate(u8 bw_40MHz, u8 short_GI, unsigned char *MCS_rate);
int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8 *category, u8 *action);
const char *action_public_str(u8 action);
diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
index 62eb64e447a4..499ac3a77512 100644
--- a/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
+++ b/drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c
@@ -2755,7 +2755,7 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy,
return ret;
}
-static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum nl80211_band band, u8 rf_type)
+static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum nl80211_band band)
{
#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */
@@ -2788,34 +2788,23 @@ static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum
*if BW_40 rx_mask[4]= 0x01;
*highest supported RX rate
*/
- if (rf_type == RF_1T1R) {
- ht_cap->mcs.rx_mask[0] = 0xFF;
- ht_cap->mcs.rx_mask[1] = 0x00;
- ht_cap->mcs.rx_mask[4] = 0x01;
+ ht_cap->mcs.rx_mask[0] = 0xFF;
+ ht_cap->mcs.rx_mask[1] = 0x00;
+ ht_cap->mcs.rx_mask[4] = 0x01;
- ht_cap->mcs.rx_highest = cpu_to_le16(MAX_BIT_RATE_40MHZ_MCS7);
- } else if ((rf_type == RF_1T2R) || (rf_type == RF_2T2R)) {
- ht_cap->mcs.rx_mask[0] = 0xFF;
- ht_cap->mcs.rx_mask[1] = 0xFF;
- ht_cap->mcs.rx_mask[4] = 0x01;
-
- ht_cap->mcs.rx_highest = cpu_to_le16(MAX_BIT_RATE_40MHZ_MCS15);
- }
+ ht_cap->mcs.rx_highest = cpu_to_le16(MAX_BIT_RATE_40MHZ_MCS7);
}
void rtw_cfg80211_init_wiphy(struct adapter *padapter)
{
- u8 rf_type;
struct ieee80211_supported_band *bands;
struct wireless_dev *pwdev = padapter->rtw_wdev;
struct wiphy *wiphy = pwdev->wiphy;
- rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
-
{
bands = wiphy->bands[NL80211_BAND_2GHZ];
if (bands)
- rtw_cfg80211_init_ht_capab(&bands->ht_cap, NL80211_BAND_2GHZ, rf_type);
+ rtw_cfg80211_init_ht_capab(&bands->ht_cap, NL80211_BAND_2GHZ);
}
/* copy mac_addr to wiphy */
--
2.20.1
remove unused macros in hal/odm_HWConfig.h
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/odm_HWConfig.h | 17 -----------------
1 file changed, 17 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/odm_HWConfig.h b/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
index 2e10974ffef1..0c3697c38e64 100644
--- a/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
+++ b/drivers/staging/rtl8723bs/hal/odm_HWConfig.h
@@ -9,23 +9,6 @@
#ifndef __HALHWOUTSRC_H__
#define __HALHWOUTSRC_H__
-
-/*--------------------------Define -------------------------------------------*/
-/* define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0) */
-#define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \
- sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u32)))
-#define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \
- sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u32)))
-
-#define AGC_DIFF_CONFIG(ic, band)\
- do {\
- if (pDM_Odm->bIsMPChip)\
- AGC_DIFF_CONFIG_MP(ic, band);\
- else\
- AGC_DIFF_CONFIG_TC(ic, band);\
- } while (0)
-
-
/* */
/* structure and define */
/* */
--
2.20.1
remove unused bIsMPChip struct member and all code
storing it.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/odm.c | 4 ----
drivers/staging/rtl8723bs/hal/odm.h | 2 --
drivers/staging/rtl8723bs/hal/rtl8723b_dm.c | 1 -
3 files changed, 7 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/odm.c b/drivers/staging/rtl8723bs/hal/odm.c
index fd5656398c3d..f87dd84434f7 100644
--- a/drivers/staging/rtl8723bs/hal/odm.c
+++ b/drivers/staging/rtl8723bs/hal/odm.c
@@ -856,10 +856,6 @@ void ODM_CmnInfoInit(struct dm_odm_t *pDM_Odm, enum odm_cmninfo_e CmnInfo, u32 V
pDM_Odm->SupportInterface = (u8)Value;
break;
- case ODM_CMNINFO_MP_TEST_CHIP:
- pDM_Odm->bIsMPChip = (u8)Value;
- break;
-
case ODM_CMNINFO_IC_TYPE:
pDM_Odm->SupportICType = Value;
break;
diff --git a/drivers/staging/rtl8723bs/hal/odm.h b/drivers/staging/rtl8723bs/hal/odm.h
index c77fb6e341b2..814f4d54a96d 100644
--- a/drivers/staging/rtl8723bs/hal/odm.h
+++ b/drivers/staging/rtl8723bs/hal/odm.h
@@ -282,7 +282,6 @@ enum odm_cmninfo_e {
ODM_CMNINFO_PLATFORM = 0,
ODM_CMNINFO_ABILITY, /* ODM_ABILITY_E */
ODM_CMNINFO_INTERFACE, /* ODM_INTERFACE_E */
- ODM_CMNINFO_MP_TEST_CHIP,
ODM_CMNINFO_IC_TYPE, /* ODM_IC_TYPE_E */
ODM_CMNINFO_CUT_VER, /* ODM_CUT_VERSION_E */
ODM_CMNINFO_FAB_VER, /* ODM_FAB_E */
@@ -802,7 +801,6 @@ struct dm_odm_t { /* DM_Out_Source_Dynamic_Mechanism_Structure */
bool bsta_state;
u8 RSSI_Min;
u8 InterfaceIndex; /* Add for 92D dual MAC: 0--Mac0 1--Mac1 */
- bool bIsMPChip;
bool bOneEntryOnly;
/* Common info for BTDM */
bool bBtEnabled; /* BT is disabled */
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_dm.c b/drivers/staging/rtl8723bs/hal/rtl8723b_dm.c
index 54e2a68a0824..c1caeaf44943 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_dm.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_dm.c
@@ -44,7 +44,6 @@ static void Init_ODM_ComInfo_8723b(struct adapter *Adapter)
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_FAB_VER, fab_ver);
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_CUT_VER, cut_ver);
- ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID));
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID);
/* ODM_CMNINFO_BINHCT_TEST only for MP Team */
--
2.20.1
remove rf_type struct member, keep all 1T1R code
unconditionally, remove the other *T*R branches.
Removed dead code related to MCS indexes above 7.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/hal_com.c | 3 ---
drivers/staging/rtl8723bs/hal/hal_com_phycfg.c | 17 -----------------
.../staging/rtl8723bs/hal/rtl8723b_hal_init.c | 1 -
drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c | 5 +----
drivers/staging/rtl8723bs/hal/sdio_halinit.c | 2 --
.../staging/rtl8723bs/include/Hal8192CPhyReg.h | 4 ----
drivers/staging/rtl8723bs/include/hal_data.h | 1 -
7 files changed, 1 insertion(+), 32 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/hal_com.c b/drivers/staging/rtl8723bs/hal/hal_com.c
index 65987e3076a3..8964303a619f 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com.c
@@ -670,9 +670,6 @@ void GetHwReg(struct adapter *adapter, u8 variable, u8 *val)
case HW_VAR_DM_FLAG:
*((u32 *)val) = odm->SupportAbility;
break;
- case HW_VAR_RF_TYPE:
- *((u8 *)val) = hal_data->rf_type;
- break;
default:
netdev_dbg(adapter->pnetdev,
FUNC_ADPT_FMT " variable(%d) not defined!\n",
diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
index 3e426c975828..4a249d20c661 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
@@ -116,12 +116,6 @@ u8 PHY_GetRateSectionIndexOfTxPowerByRate(
case rTxAGC_A_Mcs07_Mcs04:
index = 3;
break;
- case rTxAGC_A_Mcs11_Mcs08:
- index = 4;
- break;
- case rTxAGC_A_Mcs15_Mcs12:
- index = 5;
- break;
case rTxAGC_B_Rate18_06:
index = 8;
break;
@@ -137,12 +131,6 @@ u8 PHY_GetRateSectionIndexOfTxPowerByRate(
case rTxAGC_B_Mcs07_Mcs04:
index = 11;
break;
- case rTxAGC_B_Mcs11_Mcs08:
- index = 12;
- break;
- case rTxAGC_B_Mcs15_Mcs12:
- index = 13;
- break;
default:
break;
}
@@ -395,11 +383,6 @@ void PHY_StoreTxPowerByRate(
PHY_StoreTxPowerByRateNew(padapter, RfPath, TxNum, RegAddr, BitMask, Data);
else if (pDM_Odm->PhyRegPgVersion == 0) {
PHY_StoreTxPowerByRateOld(padapter, RegAddr, BitMask, Data);
-
- if (RegAddr == rTxAGC_A_Mcs15_Mcs12 && pHalData->rf_type == RF_1T1R)
- pHalData->pwrGroupCnt++;
- else if (RegAddr == rTxAGC_B_Mcs15_Mcs12 && pHalData->rf_type != RF_1T1R)
- pHalData->pwrGroupCnt++;
}
}
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
index 5da8e21bb02f..cce3e7e80953 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
@@ -1660,7 +1660,6 @@ static struct hal_version ReadChipVersion8723B(struct adapter *padapter)
dump_chip_info(ChipVersion);
#endif
pHalData->VersionID = ChipVersion;
- pHalData->rf_type = RF_1T1R;
return ChipVersion;
}
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c b/drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
index 51865f81b1fe..ffb35e1ace62 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_rf6052.c
@@ -156,10 +156,7 @@ int PHY_RF6052_Config8723B(struct adapter *Adapter)
/* */
/* Initialize general global value */
/* */
- if (pHalData->rf_type == RF_1T1R)
- pHalData->NumTotalRFPath = 1;
- else
- pHalData->NumTotalRFPath = 2;
+ pHalData->NumTotalRFPath = 1;
/* */
/* Config BB and RF */
diff --git a/drivers/staging/rtl8723bs/hal/sdio_halinit.c b/drivers/staging/rtl8723bs/hal/sdio_halinit.c
index a07a6dacec42..c9cd6578f7f8 100644
--- a/drivers/staging/rtl8723bs/hal/sdio_halinit.c
+++ b/drivers/staging/rtl8723bs/hal/sdio_halinit.c
@@ -556,8 +556,6 @@ static void _InitRFType(struct adapter *padapter)
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
pHalData->rf_chip = RF_6052;
-
- pHalData->rf_type = RF_1T1R;
}
static void _RfPowerSave(struct adapter *padapter)
diff --git a/drivers/staging/rtl8723bs/include/Hal8192CPhyReg.h b/drivers/staging/rtl8723bs/include/Hal8192CPhyReg.h
index aad962548278..586a3dabc5ca 100644
--- a/drivers/staging/rtl8723bs/include/Hal8192CPhyReg.h
+++ b/drivers/staging/rtl8723bs/include/Hal8192CPhyReg.h
@@ -109,7 +109,6 @@
#define rTxAGC_B_Mcs03_Mcs00 0x83c
#define rTxAGC_B_Mcs07_Mcs04 0x848
-#define rTxAGC_B_Mcs11_Mcs08 0x84c
#define rFPGA0_XA_LSSIParameter 0x840
#define rFPGA0_XB_LSSIParameter 0x844
@@ -123,7 +122,6 @@
#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */
#define rFPGA0_XB_RFInterfaceOE 0x864
-#define rTxAGC_B_Mcs15_Mcs12 0x868
#define rTxAGC_B_CCK11_A_CCK2_11 0x86c
#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */
@@ -303,8 +301,6 @@
#define rTxAGC_A_CCK1_Mcs32 0xe08
#define rTxAGC_A_Mcs03_Mcs00 0xe10
#define rTxAGC_A_Mcs07_Mcs04 0xe14
-#define rTxAGC_A_Mcs11_Mcs08 0xe18
-#define rTxAGC_A_Mcs15_Mcs12 0xe1c
#define rFPGA0_IQK 0xe28
#define rTx_IQK_Tone_A 0xe30
diff --git a/drivers/staging/rtl8723bs/include/hal_data.h b/drivers/staging/rtl8723bs/include/hal_data.h
index 3298fa8eb682..f0b26e44f9b9 100644
--- a/drivers/staging/rtl8723bs/include/hal_data.h
+++ b/drivers/staging/rtl8723bs/include/hal_data.h
@@ -189,7 +189,6 @@ struct hal_com_data {
/* rf_ctrl */
u8 rf_chip;
- u8 rf_type;
u8 PackageType;
u8 NumTotalRFPath;
--
2.20.1
remove rf type branching, for the baseband works only on
1T1R rf type, so just keep code branches related to 1T1R.
Remove RFType from hal_version struct, and all
related code.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/hal_com.c | 10 +---------
.../staging/rtl8723bs/hal/rtl8723b_hal_init.c | 8 +-------
drivers/staging/rtl8723bs/include/HalVerDef.h | 18 ------------------
3 files changed, 2 insertions(+), 34 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/hal_com.c b/drivers/staging/rtl8723bs/hal/hal_com.c
index 7dd49c8538e4..65987e3076a3 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com.c
@@ -70,15 +70,7 @@ void dump_chip_info(struct hal_version ChipVersion)
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
"UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
- if (IS_1T1R(ChipVersion))
- cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T1R_");
- else if (IS_1T2R(ChipVersion))
- cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T2R_");
- else if (IS_2T2R(ChipVersion))
- cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "2T2R_");
- else
- cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
- "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType);
+ cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T1R_");
cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "RomVer(%d)\n", ChipVersion.ROMVer);
}
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
index ce4f81828a65..5da8e21bb02f 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_hal_init.c
@@ -1640,7 +1640,6 @@ static struct hal_version ReadChipVersion8723B(struct adapter *padapter)
value32 = rtw_read32(padapter, REG_SYS_CFG);
ChipVersion.ICType = CHIP_8723B;
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
- ChipVersion.RFType = RF_TYPE_1T1R;
ChipVersion.VendorType = ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
@@ -1661,12 +1660,7 @@ static struct hal_version ReadChipVersion8723B(struct adapter *padapter)
dump_chip_info(ChipVersion);
#endif
pHalData->VersionID = ChipVersion;
- if (IS_1T2R(ChipVersion))
- pHalData->rf_type = RF_1T2R;
- else if (IS_2T2R(ChipVersion))
- pHalData->rf_type = RF_2T2R;
- else
- pHalData->rf_type = RF_1T1R;
+ pHalData->rf_type = RF_1T1R;
return ChipVersion;
}
diff --git a/drivers/staging/rtl8723bs/include/HalVerDef.h b/drivers/staging/rtl8723bs/include/HalVerDef.h
index bab226f77b24..8f654a49fb9d 100644
--- a/drivers/staging/rtl8723bs/include/HalVerDef.h
+++ b/drivers/staging/rtl8723bs/include/HalVerDef.h
@@ -50,23 +50,11 @@ enum hal_vendor_e { /* tag_HAL_Manufacturer_Version_Definition */
CHIP_VENDOR_SMIC = 2,
};
-enum hal_rf_type_e { /* tag_HAL_RF_Type_Definition */
- RF_TYPE_1T1R = 0,
- RF_TYPE_1T2R = 1,
- RF_TYPE_2T2R = 2,
- RF_TYPE_2T3R = 3,
- RF_TYPE_2T4R = 4,
- RF_TYPE_3T3R = 5,
- RF_TYPE_3T4R = 6,
- RF_TYPE_4T4R = 7,
-};
-
struct hal_version { /* tag_HAL_VERSION */
enum hal_ic_type_e ICType;
enum hal_chip_type_e ChipType;
enum hal_cut_version_e CUTVersion;
enum hal_vendor_e VendorType;
- enum hal_rf_type_e RFType;
u8 ROMVer;
};
@@ -76,7 +64,6 @@ struct hal_version { /* tag_HAL_VERSION */
/* Get element */
#define GET_CVID_IC_TYPE(version) ((enum hal_ic_type_e)((version).ICType))
#define GET_CVID_CHIP_TYPE(version) ((enum hal_chip_type_e)((version).ChipType))
-#define GET_CVID_RF_TYPE(version) ((enum hal_rf_type_e)((version).RFType))
#define GET_CVID_MANUFACTUER(version) ((enum hal_vendor_e)((version).VendorType))
#define GET_CVID_CUT_VERSION(version) ((enum hal_cut_version_e)((version).CUTVersion))
#define GET_CVID_ROM_VERSION(version) (((version).ROMVer) & ROM_VERSION_MASK)
@@ -105,9 +92,4 @@ struct hal_version { /* tag_HAL_VERSION */
#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? true : false)
#define IS_CHIP_VENDOR_SMIC(version) ((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_SMIC) ? true : false)
-/* hal_rf_type_e */
-#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R) ? true : false)
-#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R) ? true : false)
-#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R) ? true : false)
-
#endif
--
2.20.1
remove RFType field in dm_odm_t struct, keep unconditioned
all code branches related to 1T1R path, delete the others.
Remove unused variable to silence gcc warning.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/hal/odm.c | 44 +++++--------------
drivers/staging/rtl8723bs/hal/odm.h | 3 --
.../staging/rtl8723bs/hal/odm_CfoTracking.c | 8 +---
drivers/staging/rtl8723bs/hal/odm_DIG.c | 3 +-
.../staging/rtl8723bs/hal/odm_NoiseMonitor.c | 5 +--
drivers/staging/rtl8723bs/hal/rtl8723b_dm.c | 9 ----
6 files changed, 14 insertions(+), 58 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/odm.c b/drivers/staging/rtl8723bs/hal/odm.c
index f87dd84434f7..31f65d817899 100644
--- a/drivers/staging/rtl8723bs/hal/odm.c
+++ b/drivers/staging/rtl8723bs/hal/odm.c
@@ -391,36 +391,20 @@ u32 ODM_Get_Rate_Bitmap(
case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
case (ODM_WM_B|ODM_WM_N24G):
case (ODM_WM_G|ODM_WM_N24G):
- if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
- if (rssi_level == DM_RATR_STA_HIGH)
- rate_bitmap = 0x000f0000;
- else if (rssi_level == DM_RATR_STA_MIDDLE)
- rate_bitmap = 0x000ff000;
- else {
- if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
- rate_bitmap = 0x000ff015;
- else
- rate_bitmap = 0x000ff005;
- }
- } else {
- if (rssi_level == DM_RATR_STA_HIGH)
- rate_bitmap = 0x0f8f0000;
- else if (rssi_level == DM_RATR_STA_MIDDLE)
- rate_bitmap = 0x0f8ff000;
- else {
- if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
- rate_bitmap = 0x0f8ff015;
- else
- rate_bitmap = 0x0f8ff005;
- }
+ if (rssi_level == DM_RATR_STA_HIGH)
+ rate_bitmap = 0x000f0000;
+ else if (rssi_level == DM_RATR_STA_MIDDLE)
+ rate_bitmap = 0x000ff000;
+ else {
+ if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
+ rate_bitmap = 0x000ff015;
+ else
+ rate_bitmap = 0x000ff005;
}
break;
default:
- if (pDM_Odm->RFType == RF_1T2R)
- rate_bitmap = 0x000fffff;
- else
- rate_bitmap = 0x0fffffff;
+ rate_bitmap = 0x0fffffff;
break;
}
@@ -844,10 +828,6 @@ void ODM_CmnInfoInit(struct dm_odm_t *pDM_Odm, enum odm_cmninfo_e CmnInfo, u32 V
pDM_Odm->SupportAbility = (u32)Value;
break;
- case ODM_CMNINFO_RF_TYPE:
- pDM_Odm->RFType = (u8)Value;
- break;
-
case ODM_CMNINFO_PLATFORM:
pDM_Odm->SupportPlatform = (u8)Value;
break;
@@ -1094,10 +1074,6 @@ void ODM_CmnInfoUpdate(struct dm_odm_t *pDM_Odm, u32 CmnInfo, u64 Value)
pDM_Odm->SupportAbility = (u32)Value;
break;
- case ODM_CMNINFO_RF_TYPE:
- pDM_Odm->RFType = (u8)Value;
- break;
-
case ODM_CMNINFO_WIFI_DIRECT:
pDM_Odm->bWIFI_Direct = (bool)Value;
break;
diff --git a/drivers/staging/rtl8723bs/hal/odm.h b/drivers/staging/rtl8723bs/hal/odm.h
index 814f4d54a96d..19cfc2915458 100644
--- a/drivers/staging/rtl8723bs/hal/odm.h
+++ b/drivers/staging/rtl8723bs/hal/odm.h
@@ -285,7 +285,6 @@ enum odm_cmninfo_e {
ODM_CMNINFO_IC_TYPE, /* ODM_IC_TYPE_E */
ODM_CMNINFO_CUT_VER, /* ODM_CUT_VERSION_E */
ODM_CMNINFO_FAB_VER, /* ODM_FAB_E */
- ODM_CMNINFO_RF_TYPE, /* ODM_RF_PATH_E or ODM_RF_TYPE_E? */
ODM_CMNINFO_RFE_TYPE,
ODM_CMNINFO_PACKAGE_TYPE,
ODM_CMNINFO_EXT_LNA, /* true */
@@ -422,7 +421,6 @@ enum { /* tag_ODM_Fab_Version_Definition */
ODM_UMC = 1,
};
-/* ODM_CMNINFO_RF_TYPE */
/* */
/* For example 1T2R (A+AB = BIT0|BIT4|BIT5) */
/* */
@@ -719,7 +717,6 @@ struct dm_odm_t { /* DM_Out_Source_Dynamic_Mechanism_Structure */
/* Fab Version TSMC/UMC = 0/1 */
u8 FabVersion;
/* RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... */
- u8 RFType;
u8 RFEType;
/* Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/... */
u8 BoardType;
diff --git a/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c b/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
index 1e084f01050e..928c58be6c9b 100644
--- a/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
+++ b/drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
@@ -94,7 +94,7 @@ void ODM_CfoTracking(void *pDM_VOID)
{
struct dm_odm_t *pDM_Odm = (struct dm_odm_t *)pDM_VOID;
struct cfo_tracking *pCfoTrack = &pDM_Odm->DM_CfoTrack;
- int CFO_kHz_A, CFO_kHz_B, CFO_ave = 0;
+ int CFO_kHz_A, CFO_ave = 0;
int CFO_ave_diff;
int CrystalCap = (int)pCfoTrack->CrystalCap;
u8 Adjust_Xtal = 1;
@@ -117,12 +117,8 @@ void ODM_CfoTracking(void *pDM_VOID)
/* 4 1.2 Calculate CFO */
CFO_kHz_A = (int)(pCfoTrack->CFO_tail[0] * 3125) / 1280;
- CFO_kHz_B = (int)(pCfoTrack->CFO_tail[1] * 3125) / 1280;
- if (pDM_Odm->RFType < ODM_2T2R)
- CFO_ave = CFO_kHz_A;
- else
- CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1;
+ CFO_ave = CFO_kHz_A;
/* 4 1.3 Avoid abnormal large CFO */
CFO_ave_diff =
diff --git a/drivers/staging/rtl8723bs/hal/odm_DIG.c b/drivers/staging/rtl8723bs/hal/odm_DIG.c
index fb932e0618e2..beda7b8a7c6a 100644
--- a/drivers/staging/rtl8723bs/hal/odm_DIG.c
+++ b/drivers/staging/rtl8723bs/hal/odm_DIG.c
@@ -302,8 +302,7 @@ void ODM_Write_DIG(void *pDM_VOID, u8 CurrentIGI)
/* 1 Set IGI value */
PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI);
- if (pDM_Odm->RFType > ODM_1T1R)
- PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI);
+ PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG(IGI_B, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI);
pDM_DigTable->CurIGValue = CurrentIGI;
}
diff --git a/drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c b/drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c
index 97acf75fc04e..392cc8a398f5 100644
--- a/drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c
+++ b/drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c
@@ -33,10 +33,7 @@ static s16 odm_InbandNoise_Monitor_NSeries(
pDM_Odm->noise_level.noise_all = 0;
- if ((pDM_Odm->RFType == ODM_1T2R) || (pDM_Odm->RFType == ODM_2T2R))
- max_rf_path = 2;
- else
- max_rf_path = 1;
+ max_rf_path = 1;
memset(&noise_data, 0, sizeof(struct noise_level));
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_dm.c b/drivers/staging/rtl8723bs/hal/rtl8723b_dm.c
index c1caeaf44943..2028791988e7 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_dm.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_dm.c
@@ -49,15 +49,6 @@ static void Init_ODM_ComInfo_8723b(struct adapter *Adapter)
/* ODM_CMNINFO_BINHCT_TEST only for MP Team */
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec);
-
- if (pHalData->rf_type == RF_1T1R) {
- ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
- } else if (pHalData->rf_type == RF_2T2R) {
- ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
- } else if (pHalData->rf_type == RF_1T2R) {
- ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
- }
-
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION|ODM_RF_TX_PWR_TRACK;
ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
--
2.20.1
remove unused macro in include/hal_data.h
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/include/hal_data.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/staging/rtl8723bs/include/hal_data.h b/drivers/staging/rtl8723bs/include/hal_data.h
index f0b26e44f9b9..2bd7a7151db1 100644
--- a/drivers/staging/rtl8723bs/include/hal_data.h
+++ b/drivers/staging/rtl8723bs/include/hal_data.h
@@ -404,6 +404,5 @@ struct hal_com_data {
#define GET_HAL_DATA(__padapter) ((struct hal_com_data *)((__padapter)->HalData))
#define GET_HAL_RFPATH_NUM(__padapter) (((struct hal_com_data *)((__padapter)->HalData))->NumTotalRFPath)
#define RT_GetInterfaceSelection(_Adapter) (GET_HAL_DATA(_Adapter)->InterfaceSel)
-#define GET_RF_TYPE(__padapter) (GET_HAL_DATA(__padapter)->rf_type)
#endif /* __HAL_DATA_H__ */
--
2.20.1
remove unused RF_*T*R enum, for rtl8723bs is
only capable of 1T1R rf path so selection is not needed.
Signed-off-by: Fabio Aiuto <[email protected]>
---
drivers/staging/rtl8723bs/include/rtw_rf.h | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/drivers/staging/rtl8723bs/include/rtw_rf.h b/drivers/staging/rtl8723bs/include/rtw_rf.h
index 6c25707f4ec8..718275ee4500 100644
--- a/drivers/staging/rtl8723bs/include/rtw_rf.h
+++ b/drivers/staging/rtl8723bs/include/rtw_rf.h
@@ -97,16 +97,6 @@ enum {
HT_DATA_SC_20_LOWER_OF_40MHZ = 2,
};
-/* 2007/11/15 MH Define different RF type. */
-enum {
- RF_1T2R = 0,
- RF_2T4R = 1,
- RF_2T2R = 2,
- RF_1T1R = 3,
- RF_2T2R_GREEN = 4,
- RF_MAX_TYPE = 5,
-};
-
u32 rtw_ch2freq(u32 ch);
#endif /* _RTL8711_RF_H_ */
--
2.20.1
remove RF_*TX enum, its only used value is RF_1TX.
So remove it and remove all indexes and loop over
these enum items.
Signed-off-by: Fabio Aiuto <[email protected]>
---
.../staging/rtl8723bs/hal/HalHWImg8723B_BB.c | 17 ++-
.../staging/rtl8723bs/hal/hal_com_phycfg.c | 120 +++++++-----------
.../rtl8723bs/hal/odm_RegConfig8723B.c | 3 +-
.../rtl8723bs/hal/odm_RegConfig8723B.h | 9 +-
.../staging/rtl8723bs/hal/rtl8723b_phycfg.c | 2 +-
.../rtl8723bs/include/hal_com_phycfg.h | 17 +--
drivers/staging/rtl8723bs/include/hal_data.h | 8 +-
7 files changed, 64 insertions(+), 112 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c
index 3de8dcb5ed7c..dd0f74b0cf0d 100644
--- a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c
+++ b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c
@@ -543,12 +543,12 @@ void ODM_ReadAndConfig_MP_8723B_PHY_REG(struct dm_odm_t *pDM_Odm)
******************************************************************************/
static u32 Array_MP_8723B_PHY_REG_PG[] = {
- 0, 0, 0x00000e08, 0x0000ff00, 0x00003800,
- 0, 0, 0x0000086c, 0xffffff00, 0x32343600,
- 0, 0, 0x00000e00, 0xffffffff, 0x40424444,
- 0, 0, 0x00000e04, 0xffffffff, 0x28323638,
- 0, 0, 0x00000e10, 0xffffffff, 0x38404244,
- 0, 0, 0x00000e14, 0xffffffff, 0x26303436
+ 0, 0x00000e08, 0x0000ff00, 0x00003800,
+ 0, 0x0000086c, 0xffffff00, 0x32343600,
+ 0, 0x00000e00, 0xffffffff, 0x40424444,
+ 0, 0x00000e04, 0xffffffff, 0x28323638,
+ 0, 0x00000e10, 0xffffffff, 0x38404244,
+ 0, 0x00000e14, 0xffffffff, 0x26303436
};
void ODM_ReadAndConfig_MP_8723B_PHY_REG_PG(struct dm_odm_t *pDM_Odm)
@@ -559,13 +559,12 @@ void ODM_ReadAndConfig_MP_8723B_PHY_REG_PG(struct dm_odm_t *pDM_Odm)
pDM_Odm->PhyRegPgVersion = 1;
pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE;
- for (i = 0; i < ARRAY_SIZE(Array_MP_8723B_PHY_REG_PG); i += 5) {
+ for (i = 0; i < ARRAY_SIZE(Array_MP_8723B_PHY_REG_PG); i += 4) {
u32 v1 = Array[i];
u32 v2 = Array[i+1];
u32 v3 = Array[i+2];
u32 v4 = Array[i+3];
- u32 v5 = Array[i+4];
- odm_ConfigBB_PHY_REG_PG_8723B(pDM_Odm, v1, v2, v3, v4, v5);
+ odm_ConfigBB_PHY_REG_PG_8723B(pDM_Odm, v1, v2, v3, v4);
}
}
diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
index 4a249d20c661..272a9ec7a2d3 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
@@ -11,7 +11,7 @@
#include <linux/kernel.h>
u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath,
- u8 TxNum, enum rate_section RateSection)
+ enum rate_section RateSection)
{
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
u8 value = 0;
@@ -21,13 +21,13 @@ u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath,
switch (RateSection) {
case CCK:
- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0];
+ value = pHalData->TxPwrByRateBase2_4G[RfPath][0];
break;
case OFDM:
- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1];
+ value = pHalData->TxPwrByRateBase2_4G[RfPath][1];
break;
case HT_MCS0_MCS7:
- value = pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2];
+ value = pHalData->TxPwrByRateBase2_4G[RfPath][2];
break;
default:
break;
@@ -37,13 +37,8 @@ u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath,
}
static void
-phy_SetTxPowerByRateBase(
- struct adapter *Adapter,
- u8 RfPath,
- enum rate_section RateSection,
- u8 TxNum,
- u8 Value
-)
+phy_SetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath,
+ enum rate_section RateSection, u8 Value)
{
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
@@ -52,13 +47,13 @@ phy_SetTxPowerByRateBase(
switch (RateSection) {
case CCK:
- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][0] = Value;
+ pHalData->TxPwrByRateBase2_4G[RfPath][0] = Value;
break;
case OFDM:
- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][1] = Value;
+ pHalData->TxPwrByRateBase2_4G[RfPath][1] = Value;
break;
case HT_MCS0_MCS7:
- pHalData->TxPwrByRateBase2_4G[RfPath][TxNum][2] = Value;
+ pHalData->TxPwrByRateBase2_4G[RfPath][2] = Value;
break;
default:
break;
@@ -73,14 +68,14 @@ struct adapter *padapter
u8 path, base;
for (path = RF_PATH_A; path <= RF_PATH_B; ++path) {
- base = PHY_GetTxPowerByRate(padapter, path, RF_1TX, MGN_11M);
- phy_SetTxPowerByRateBase(padapter, path, CCK, RF_1TX, base);
+ base = PHY_GetTxPowerByRate(padapter, path, MGN_11M);
+ phy_SetTxPowerByRateBase(padapter, path, CCK, base);
- base = PHY_GetTxPowerByRate(padapter, path, RF_1TX, MGN_54M);
- phy_SetTxPowerByRateBase(padapter, path, OFDM, RF_1TX, base);
+ base = PHY_GetTxPowerByRate(padapter, path, MGN_54M);
+ phy_SetTxPowerByRateBase(padapter, path, OFDM, base);
- base = PHY_GetTxPowerByRate(padapter, path, RF_1TX, MGN_MCS7);
- phy_SetTxPowerByRateBase(padapter, path, HT_MCS0_MCS7, RF_1TX, base);
+ base = PHY_GetTxPowerByRate(padapter, path, MGN_MCS7);
+ phy_SetTxPowerByRateBase(padapter, path, HT_MCS0_MCS7, base);
}
}
@@ -320,14 +315,8 @@ PHY_GetRateValuesOfTxPowerByRate(
}
}
-static void PHY_StoreTxPowerByRateNew(
- struct adapter *padapter,
- u32 RfPath,
- u32 TxNum,
- u32 RegAddr,
- u32 BitMask,
- u32 Data
-)
+static void PHY_StoreTxPowerByRateNew(struct adapter *padapter, u32 RfPath,
+ u32 RegAddr, u32 BitMask, u32 Data)
{
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
u8 i = 0, rateIndex[4] = {0}, rateNum = 0;
@@ -338,11 +327,8 @@ static void PHY_StoreTxPowerByRateNew(
if (RfPath >= RF_PATH_MAX)
return;
- if (TxNum > RF_MAX_TX_NUM)
- return;
-
for (i = 0; i < rateNum; ++i) {
- pHalData->TxPwrByRateOffset[RfPath][TxNum][rateIndex[i]] = PwrByRateVal[i];
+ pHalData->TxPwrByRateOffset[RfPath][rateIndex[i]] = PwrByRateVal[i];
}
}
@@ -359,18 +345,16 @@ static void PHY_StoreTxPowerByRateOld(
void PHY_InitTxPowerByRate(struct adapter *padapter)
{
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
- u8 rfPath, TxNum, rate;
+ u8 rfPath, rate;
for (rfPath = 0; rfPath < TX_PWR_BY_RATE_NUM_RF; ++rfPath)
- for (TxNum = 0; TxNum < TX_PWR_BY_RATE_NUM_RF; ++TxNum)
- for (rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE; ++rate)
- pHalData->TxPwrByRateOffset[rfPath][TxNum][rate] = 0;
+ for (rate = 0; rate < TX_PWR_BY_RATE_NUM_RATE; ++rate)
+ pHalData->TxPwrByRateOffset[rfPath][rate] = 0;
}
void PHY_StoreTxPowerByRate(
struct adapter *padapter,
u32 RfPath,
- u32 TxNum,
u32 RegAddr,
u32 BitMask,
u32 Data
@@ -380,7 +364,7 @@ void PHY_StoreTxPowerByRate(
struct dm_odm_t *pDM_Odm = &pHalData->odmpriv;
if (pDM_Odm->PhyRegPgVersion > 0)
- PHY_StoreTxPowerByRateNew(padapter, RfPath, TxNum, RegAddr, BitMask, Data);
+ PHY_StoreTxPowerByRateNew(padapter, RfPath, RegAddr, BitMask, Data);
else if (pDM_Odm->PhyRegPgVersion == 0) {
PHY_StoreTxPowerByRateOld(padapter, RegAddr, BitMask, Data);
}
@@ -391,7 +375,7 @@ phy_ConvertTxPowerByRateInDbmToRelativeValues(
struct adapter *padapter
)
{
- u8 base = 0, i = 0, value = 0, path = 0, txNum = 0;
+ u8 base = 0, i = 0, value = 0, path = 0;
u8 cckRates[4] = {
MGN_1M, MGN_2M, MGN_5_5M, MGN_11M
};
@@ -402,28 +386,25 @@ struct adapter *padapter
MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3, MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7
};
for (path = RF_PATH_A; path < RF_PATH_MAX; ++path) {
- for (txNum = RF_1TX; txNum < RF_MAX_TX_NUM; ++txNum) {
- /* CCK */
- base = PHY_GetTxPowerByRate(padapter, path, txNum, MGN_11M);
- for (i = 0; i < ARRAY_SIZE(cckRates); ++i) {
- value = PHY_GetTxPowerByRate(padapter, path, txNum, cckRates[i]);
- PHY_SetTxPowerByRate(padapter, path, txNum, cckRates[i], value - base);
- }
-
- /* OFDM */
- base = PHY_GetTxPowerByRate(padapter, path, txNum, MGN_54M);
- for (i = 0; i < sizeof(ofdmRates); ++i) {
- value = PHY_GetTxPowerByRate(padapter, path, txNum, ofdmRates[i]);
- PHY_SetTxPowerByRate(padapter, path, txNum, ofdmRates[i], value - base);
- }
+ /* CCK */
+ base = PHY_GetTxPowerByRate(padapter, path, MGN_11M);
+ for (i = 0; i < ARRAY_SIZE(cckRates); ++i) {
+ value = PHY_GetTxPowerByRate(padapter, path, cckRates[i]);
+ PHY_SetTxPowerByRate(padapter, path, cckRates[i], value - base);
+ }
- /* HT MCS0~7 */
- base = PHY_GetTxPowerByRate(padapter, path, txNum, MGN_MCS7);
- for (i = 0; i < sizeof(mcs0_7Rates); ++i) {
- value = PHY_GetTxPowerByRate(padapter, path, txNum, mcs0_7Rates[i]);
- PHY_SetTxPowerByRate(padapter, path, txNum, mcs0_7Rates[i], value - base);
- }
+ /* OFDM */
+ base = PHY_GetTxPowerByRate(padapter, path, MGN_54M);
+ for (i = 0; i < sizeof(ofdmRates); ++i) {
+ value = PHY_GetTxPowerByRate(padapter, path, ofdmRates[i]);
+ PHY_SetTxPowerByRate(padapter, path, ofdmRates[i], value - base);
+ }
+ /* HT MCS0~7 */
+ base = PHY_GetTxPowerByRate(padapter, path, MGN_MCS7);
+ for (i = 0; i < sizeof(mcs0_7Rates); ++i) {
+ value = PHY_GetTxPowerByRate(padapter, path, mcs0_7Rates[i]);
+ PHY_SetTxPowerByRate(padapter, path, mcs0_7Rates[i], value - base);
}
}
}
@@ -590,9 +571,7 @@ u8 PHY_GetRateIndexOfTxPowerByRate(u8 Rate)
return index;
}
-s8 PHY_GetTxPowerByRate(
- struct adapter *padapter, u8 RFPath, u8 TxNum, u8 Rate
-)
+s8 PHY_GetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 Rate)
{
struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
s8 value = 0;
@@ -605,20 +584,16 @@ s8 PHY_GetTxPowerByRate(
if (RFPath >= RF_PATH_MAX)
return value;
- if (TxNum >= RF_MAX_TX_NUM)
- return value;
-
if (rateIndex >= TX_PWR_BY_RATE_NUM_RATE)
return value;
- return pHalData->TxPwrByRateOffset[RFPath][TxNum][rateIndex];
+ return pHalData->TxPwrByRateOffset[RFPath][rateIndex];
}
void PHY_SetTxPowerByRate(
struct adapter *padapter,
u8 RFPath,
- u8 TxNum,
u8 Rate,
s8 Value
)
@@ -629,13 +604,10 @@ void PHY_SetTxPowerByRate(
if (RFPath >= RF_PATH_MAX)
return;
- if (TxNum >= RF_MAX_TX_NUM)
- return;
-
if (rateIndex >= TX_PWR_BY_RATE_NUM_RATE)
return;
- pHalData->TxPwrByRateOffset[RFPath][TxNum][rateIndex] = Value;
+ pHalData->TxPwrByRateOffset[RFPath][rateIndex] = Value;
}
void PHY_SetTxPowerLevelByPath(struct adapter *Adapter, u8 channel, u8 path)
@@ -797,11 +769,11 @@ void PHY_ConvertTxPowerLimitToPowerIndex(struct adapter *Adapter)
for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath) {
if (pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE) {
if (rateSection == 2) /* HT 1T */
- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, RF_1TX, HT_MCS0_MCS7);
+ BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, HT_MCS0_MCS7);
else if (rateSection == 1) /* OFDM */
- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, RF_1TX, OFDM);
+ BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, OFDM);
else if (rateSection == 0) /* CCK */
- BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, RF_1TX, CCK);
+ BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, CCK);
} else
BW40PwrBasedBm2_4G = Adapter->registrypriv.RegPowerBase * 2;
diff --git a/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c b/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
index 0f71b1adea40..1df42069bd5c 100644
--- a/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
+++ b/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
@@ -118,7 +118,6 @@ void odm_ConfigBB_AGC_8723B(
void odm_ConfigBB_PHY_REG_PG_8723B(
struct dm_odm_t *pDM_Odm,
u32 RfPath,
- u32 TxNum,
u32 Addr,
u32 Bitmask,
u32 Data
@@ -127,7 +126,7 @@ void odm_ConfigBB_PHY_REG_PG_8723B(
if (Addr == 0xfe || Addr == 0xffe)
msleep(50);
else {
- PHY_StoreTxPowerByRate(pDM_Odm->Adapter, RfPath, TxNum, Addr, Bitmask, Data);
+ PHY_StoreTxPowerByRate(pDM_Odm->Adapter, RfPath, Addr, Bitmask, Data);
}
}
diff --git a/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h b/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h
index b8d4c2aa6d4d..fba7053ee3e1 100644
--- a/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h
+++ b/drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.h
@@ -24,13 +24,8 @@ void odm_ConfigBB_AGC_8723B(struct dm_odm_t *pDM_Odm,
u32 Data
);
-void odm_ConfigBB_PHY_REG_PG_8723B(struct dm_odm_t *pDM_Odm,
- u32 RfPath,
- u32 TxNum,
- u32 Addr,
- u32 Bitmask,
- u32 Data
-);
+void odm_ConfigBB_PHY_REG_PG_8723B(struct dm_odm_t *pDM_Odm, u32 RfPath, u32 Addr,
+ u32 Bitmask, u32 Data);
void odm_ConfigBB_PHY_8723B(struct dm_odm_t *pDM_Odm,
u32 Addr,
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
index 4b362320ce31..a3bff27af523 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
@@ -538,7 +538,7 @@ u8 PHY_GetTxPowerIndex(
s8 txPower = 0, powerDiffByRate = 0, limit = 0;
txPower = (s8) PHY_GetTxPowerIndexBase(padapter, RFPath, Rate, BandWidth, Channel);
- powerDiffByRate = PHY_GetTxPowerByRate(padapter, RF_PATH_A, RF_1TX, Rate);
+ powerDiffByRate = PHY_GetTxPowerByRate(padapter, RF_PATH_A, Rate);
limit = phy_get_tx_pwr_lmt(
padapter,
diff --git a/drivers/staging/rtl8723bs/include/hal_com_phycfg.h b/drivers/staging/rtl8723bs/include/hal_com_phycfg.h
index 637089fed93d..cb7c7ed74146 100644
--- a/drivers/staging/rtl8723bs/include/hal_com_phycfg.h
+++ b/drivers/staging/rtl8723bs/include/hal_com_phycfg.h
@@ -18,15 +18,6 @@ enum rate_section {
HT_MCS0_MCS7,
};
-enum {
- RF_1TX = 0,
- RF_2TX,
- RF_3TX,
- RF_4TX,
- RF_MAX_TX_NUM,
- RF_TX_NUM_NONIMPLEMENT,
-};
-
#define MAX_POWER_INDEX 0x3F
enum {
@@ -63,7 +54,7 @@ struct bb_register_def {
};
-u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath, u8 TxNum,
+u8 PHY_GetTxPowerByRateBase(struct adapter *Adapter, u8 RfPath,
enum rate_section RateSection);
u8 PHY_GetRateSectionIndexOfTxPowerByRate(struct adapter *padapter, u32 RegAddr,
@@ -78,9 +69,9 @@ u8 PHY_GetRateIndexOfTxPowerByRate(u8 Rate);
void PHY_SetTxPowerIndexByRateSection(struct adapter *padapter, u8 RFPath, u8 Channel,
u8 RateSection);
-s8 PHY_GetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 TxNum, u8 RateIndex);
+s8 PHY_GetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 RateIndex);
-void PHY_SetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 TxNum, u8 Rate,
+void PHY_SetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 Rate,
s8 Value);
void PHY_SetTxPowerLevelByPath(struct adapter *Adapter, u8 channel, u8 path);
@@ -91,7 +82,7 @@ void PHY_SetTxPowerIndexByRateArray(struct adapter *padapter, u8 RFPath,
void PHY_InitTxPowerByRate(struct adapter *padapter);
-void PHY_StoreTxPowerByRate(struct adapter *padapter, u32 RfPath, u32 TxNum,
+void PHY_StoreTxPowerByRate(struct adapter *padapter, u32 RfPath,
u32 RegAddr, u32 BitMask, u32 Data);
void PHY_TxPowerByRateConfiguration(struct adapter *padapter);
diff --git a/drivers/staging/rtl8723bs/include/hal_data.h b/drivers/staging/rtl8723bs/include/hal_data.h
index 2bd7a7151db1..7bbf81ce3045 100644
--- a/drivers/staging/rtl8723bs/include/hal_data.h
+++ b/drivers/staging/rtl8723bs/include/hal_data.h
@@ -241,9 +241,7 @@ struct hal_com_data {
/* CCK = 0 OFDM = 1/2 HT-MCS 0-15 =3/4/56 VHT =7/8/9/10/11 */
u8 TxPwrByRateTable;
u8 TxPwrByRateBand;
- s8 TxPwrByRateOffset[TX_PWR_BY_RATE_NUM_RF]
- [TX_PWR_BY_RATE_NUM_RF]
- [TX_PWR_BY_RATE_NUM_RATE];
+ s8 TxPwrByRateOffset[TX_PWR_BY_RATE_NUM_RF][TX_PWR_BY_RATE_NUM_RATE];
/* */
/* 2 Power Limit Table */
@@ -261,9 +259,7 @@ struct hal_com_data {
[MAX_RF_PATH_NUM];
/* Store the original power by rate value of the base of each rate section of rf path A & B */
- u8 TxPwrByRateBase2_4G[TX_PWR_BY_RATE_NUM_RF]
- [TX_PWR_BY_RATE_NUM_RF]
- [MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
+ u8 TxPwrByRateBase2_4G[TX_PWR_BY_RATE_NUM_RF][MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
/* For power group */
u8 PwrGroupHT20[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];
--
2.20.1
fix sizes of tx power tables to the real used
values (i.e. 2 bandwidth, 3 rate sections).
Delete MAX_BASE_NUM_IN_PHY_REG_PG_2_4 macro in
this process, for it expands to a larger than
needed rate section index value.
Modify comments accordingly.
Signed-off-by: Fabio Aiuto <[email protected]>
---
.../staging/rtl8723bs/hal/HalHWImg8723B_RF.c | 86 +------------------
.../staging/rtl8723bs/hal/hal_com_phycfg.c | 10 ---
drivers/staging/rtl8723bs/include/hal_data.h | 8 +-
3 files changed, 4 insertions(+), 100 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c
index 00d429977ea9..efc68c17b126 100644
--- a/drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c
+++ b/drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c
@@ -494,48 +494,6 @@ static u8 *Array_MP_8723B_TXPWR_LMT[] = {
"FCC", "20M", "HT", "1T", "14", "63",
"ETSI", "20M", "HT", "1T", "14", "63",
"MKK", "20M", "HT", "1T", "14", "63",
- "FCC", "20M", "HT", "2T", "01", "30",
- "ETSI", "20M", "HT", "2T", "01", "32",
- "MKK", "20M", "HT", "2T", "01", "32",
- "FCC", "20M", "HT", "2T", "02", "32",
- "ETSI", "20M", "HT", "2T", "02", "32",
- "MKK", "20M", "HT", "2T", "02", "32",
- "FCC", "20M", "HT", "2T", "03", "32",
- "ETSI", "20M", "HT", "2T", "03", "32",
- "MKK", "20M", "HT", "2T", "03", "32",
- "FCC", "20M", "HT", "2T", "04", "32",
- "ETSI", "20M", "HT", "2T", "04", "32",
- "MKK", "20M", "HT", "2T", "04", "32",
- "FCC", "20M", "HT", "2T", "05", "32",
- "ETSI", "20M", "HT", "2T", "05", "32",
- "MKK", "20M", "HT", "2T", "05", "32",
- "FCC", "20M", "HT", "2T", "06", "32",
- "ETSI", "20M", "HT", "2T", "06", "32",
- "MKK", "20M", "HT", "2T", "06", "32",
- "FCC", "20M", "HT", "2T", "07", "32",
- "ETSI", "20M", "HT", "2T", "07", "32",
- "MKK", "20M", "HT", "2T", "07", "32",
- "FCC", "20M", "HT", "2T", "08", "32",
- "ETSI", "20M", "HT", "2T", "08", "32",
- "MKK", "20M", "HT", "2T", "08", "32",
- "FCC", "20M", "HT", "2T", "09", "32",
- "ETSI", "20M", "HT", "2T", "09", "32",
- "MKK", "20M", "HT", "2T", "09", "32",
- "FCC", "20M", "HT", "2T", "10", "32",
- "ETSI", "20M", "HT", "2T", "10", "32",
- "MKK", "20M", "HT", "2T", "10", "32",
- "FCC", "20M", "HT", "2T", "11", "30",
- "ETSI", "20M", "HT", "2T", "11", "32",
- "MKK", "20M", "HT", "2T", "11", "32",
- "FCC", "20M", "HT", "2T", "12", "63",
- "ETSI", "20M", "HT", "2T", "12", "32",
- "MKK", "20M", "HT", "2T", "12", "32",
- "FCC", "20M", "HT", "2T", "13", "63",
- "ETSI", "20M", "HT", "2T", "13", "32",
- "MKK", "20M", "HT", "2T", "13", "32",
- "FCC", "20M", "HT", "2T", "14", "63",
- "ETSI", "20M", "HT", "2T", "14", "63",
- "MKK", "20M", "HT", "2T", "14", "63",
"FCC", "40M", "HT", "1T", "01", "63",
"ETSI", "40M", "HT", "1T", "01", "63",
"MKK", "40M", "HT", "1T", "01", "63",
@@ -577,49 +535,7 @@ static u8 *Array_MP_8723B_TXPWR_LMT[] = {
"MKK", "40M", "HT", "1T", "13", "32",
"FCC", "40M", "HT", "1T", "14", "63",
"ETSI", "40M", "HT", "1T", "14", "63",
- "MKK", "40M", "HT", "1T", "14", "63",
- "FCC", "40M", "HT", "2T", "01", "63",
- "ETSI", "40M", "HT", "2T", "01", "63",
- "MKK", "40M", "HT", "2T", "01", "63",
- "FCC", "40M", "HT", "2T", "02", "63",
- "ETSI", "40M", "HT", "2T", "02", "63",
- "MKK", "40M", "HT", "2T", "02", "63",
- "FCC", "40M", "HT", "2T", "03", "30",
- "ETSI", "40M", "HT", "2T", "03", "30",
- "MKK", "40M", "HT", "2T", "03", "30",
- "FCC", "40M", "HT", "2T", "04", "32",
- "ETSI", "40M", "HT", "2T", "04", "30",
- "MKK", "40M", "HT", "2T", "04", "30",
- "FCC", "40M", "HT", "2T", "05", "32",
- "ETSI", "40M", "HT", "2T", "05", "30",
- "MKK", "40M", "HT", "2T", "05", "30",
- "FCC", "40M", "HT", "2T", "06", "32",
- "ETSI", "40M", "HT", "2T", "06", "30",
- "MKK", "40M", "HT", "2T", "06", "30",
- "FCC", "40M", "HT", "2T", "07", "32",
- "ETSI", "40M", "HT", "2T", "07", "30",
- "MKK", "40M", "HT", "2T", "07", "30",
- "FCC", "40M", "HT", "2T", "08", "32",
- "ETSI", "40M", "HT", "2T", "08", "30",
- "MKK", "40M", "HT", "2T", "08", "30",
- "FCC", "40M", "HT", "2T", "09", "32",
- "ETSI", "40M", "HT", "2T", "09", "30",
- "MKK", "40M", "HT", "2T", "09", "30",
- "FCC", "40M", "HT", "2T", "10", "32",
- "ETSI", "40M", "HT", "2T", "10", "30",
- "MKK", "40M", "HT", "2T", "10", "30",
- "FCC", "40M", "HT", "2T", "11", "30",
- "ETSI", "40M", "HT", "2T", "11", "30",
- "MKK", "40M", "HT", "2T", "11", "30",
- "FCC", "40M", "HT", "2T", "12", "63",
- "ETSI", "40M", "HT", "2T", "12", "32",
- "MKK", "40M", "HT", "2T", "12", "32",
- "FCC", "40M", "HT", "2T", "13", "63",
- "ETSI", "40M", "HT", "2T", "13", "32",
- "MKK", "40M", "HT", "2T", "13", "32",
- "FCC", "40M", "HT", "2T", "14", "63",
- "ETSI", "40M", "HT", "2T", "14", "63",
- "MKK", "40M", "HT", "2T", "14", "63"
+ "MKK", "40M", "HT", "1T", "14", "63"
};
void ODM_ReadAndConfig_MP_8723B_TXPWR_LMT(struct dm_odm_t *pDM_Odm)
diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
index 14f34e38a327..3e814a15e893 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
@@ -836,12 +836,6 @@ void PHY_SetTxPowerLimit(
rateSection = 1;
else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("1T"), 2))
rateSection = 2;
- else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("2T"), 2))
- rateSection = 3;
- else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("3T"), 2))
- rateSection = 4;
- else if (eqNByte(RateSection, (u8 *)("HT"), 2) && eqNByte(RfPath, (u8 *)("4T"), 2))
- rateSection = 5;
else
return;
@@ -849,10 +843,6 @@ void PHY_SetTxPowerLimit(
bandwidth = 0;
else if (eqNByte(Bandwidth, (u8 *)("40M"), 3))
bandwidth = 1;
- else if (eqNByte(Bandwidth, (u8 *)("80M"), 3))
- bandwidth = 2;
- else if (eqNByte(Bandwidth, (u8 *)("160M"), 4))
- bandwidth = 3;
channelIndex = phy_GetChannelIndexOfTxPowerLimit(channel);
diff --git a/drivers/staging/rtl8723bs/include/hal_data.h b/drivers/staging/rtl8723bs/include/hal_data.h
index db9d7587c20e..b87c90f693ec 100644
--- a/drivers/staging/rtl8723bs/include/hal_data.h
+++ b/drivers/staging/rtl8723bs/include/hal_data.h
@@ -52,10 +52,8 @@ enum rt_ampdu_burst {
/* Tx Power Limit Table Size */
#define MAX_REGULATION_NUM 4
-#define MAX_2_4G_BANDWIDTH_NUM 4
-#define MAX_RATE_SECTION_NUM 10
-
-#define MAX_BASE_NUM_IN_PHY_REG_PG_2_4G 10 /* CCK:1, OFDM:1, HT:4, VHT:4 */
+#define MAX_2_4G_BANDWIDTH_NUM 2
+#define MAX_RATE_SECTION_NUM 3 /* CCK:1, OFDM:1, HT:1 */
/* duplicate code, will move to ODM ######### */
/* define IQK_MAC_REG_NUM 4 */
@@ -257,7 +255,7 @@ struct hal_com_data {
[MAX_RF_PATH_NUM];
/* Store the original power by rate value of the base of each rate section of rf path A & B */
- u8 TxPwrByRateBase2_4G[MAX_RF_PATH_NUM][MAX_BASE_NUM_IN_PHY_REG_PG_2_4G];
+ u8 TxPwrByRateBase2_4G[MAX_RF_PATH_NUM][MAX_RATE_SECTION_NUM];
/* For power group */
u8 PwrGroupHT20[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];
--
2.20.1