2023-07-02 18:56:43

by Krzysztof Kozlowski

Subject: [PATCH] arm64: dts: hisilicon: minor whitespace cleanup around '='

The DTS code coding style expects exactly one space before and after '='
sign.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index b7e2cbf466b3..f29a3e471288 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -1032,17 +1032,17 @@ mali: gpu@f4080000 {
compatible = "hisilicon,hi6220-mali", "arm,mali-450";
reg = <0x0 0xf4080000 0x0 0x00040000>;
interrupt-parent = <&gic>;
- interrupts = <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>;

interrupt-names = "gp",
"gpmmu",
--
2.34.1

2023-07-20 11:35:43

by Wei Xu

Subject: Re: [PATCH] arm64: dts: hisilicon: minor whitespace cleanup around '='

Hi Krzysztof,

On 2023/7/3 2:53, Krzysztof Kozlowski wrote:
> The DTS code coding style expects exactly one space before and after '='
> sign.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Applied to the HiSilicon arm64 dt tree.
Thanks!

Best Regards,
Wei

> ---
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 22 +++++++++++-----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index b7e2cbf466b3..f29a3e471288 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -1032,17 +1032,17 @@ mali: gpu@f4080000 {
> compatible = "hisilicon,hi6220-mali", "arm,mali-450";
> reg = <0x0 0xf4080000 0x0 0x00040000>;
> interrupt-parent = <&gic>;
> - interrupts = <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>;
>
> interrupt-names = "gp",
> "gpmmu",
>