Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
with ARCH < ARMv6K.
[ paulmck: Apply Arnd Bergmann and Nathan Chancellor feedback. ]
Reported-by: Mark Brown <[email protected]>
Closes: https://lore.kernel.org/all/[email protected]/
Reported-by: Naresh Kamboju <[email protected]>
Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/
Signed-off-by: Paul E. McKenney <[email protected]>
Tested-by: Nathan Chancellor <[email protected]>
Cc: "Russell King (Oracle)" <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Andrew Davis <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Eric DeVolder <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: <[email protected]>
---
arch/arm/Kconfig | 1 +
arch/arm/include/asm/cmpxchg.h | 7 ++++++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ee5115252aac4..a867a7d967aa5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -34,6 +34,7 @@ config ARM
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
+ select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
select ARCH_SUPPORTS_ATOMIC_RMW
select ARCH_SUPPORTS_CFI_CLANG
select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index 44667bdb4707a..a428e06fe94ee 100644
--- a/arch/arm/include/asm/cmpxchg.h
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -5,6 +5,7 @@
#include <linux/irqflags.h>
#include <linux/prefetch.h>
#include <asm/barrier.h>
+#include <linux/cmpxchg-emu.h>
#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
/*
@@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
prefetchw((const void *)ptr);
switch (size) {
-#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
+#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
+ case 1:
+ oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
+ break;
+#else /* min ARCH >= ARMv6K */
case 1:
do {
asm volatile("@ __cmpxchg1\n"
--
2.40.1
Hi Paul,
thanks for your patch! This caught my eye:
On Tue, Jun 4, 2024 at 7:04 PM Paul E. McKenney <[email protected]> wrote:
> Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
> with ARCH < ARMv6K.
ARCH == ARMv6.
This ARCH < ARMv6K comes from inversion of the the a bit terse
comment for ifndef CONFIG_CPU_V6, which means "out of the
post-v6 CPUs, the following applies to those > V6".
The code in the patch, IIUC make use of cmpxchg_emu_u8()
if and only if the CPU is V6.
> -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> +#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
This is now a set with one member so this comment should say:
/* ARCH == ARMv6 */
After this change.
Yours,
Linus Walleij
On Tue, Jun 04, 2024 at 10:52:23PM +0200, Linus Walleij wrote:
> Hi Paul,
>
> thanks for your patch! This caught my eye:
>
> On Tue, Jun 4, 2024 at 7:04 PM Paul E. McKenney <[email protected]> wrote:
>
> > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
> > with ARCH < ARMv6K.
>
> ARCH == ARMv6.
>
> This ARCH < ARMv6K comes from inversion of the the a bit terse
> comment for ifndef CONFIG_CPU_V6, which means "out of the
> post-v6 CPUs, the following applies to those > V6".
>
> The code in the patch, IIUC make use of cmpxchg_emu_u8()
> if and only if the CPU is V6.
>
> > -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> > +#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
>
> This is now a set with one member so this comment should say:
>
> /* ARCH == ARMv6 */
>
> After this change.
Thank you for looking this over! Does the following patch (to be merged
into the original) capture it properly?
Thanx, Paul
------------------------------------------------------------------------
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index a428e06fe94ee..9beb64d305866 100644
--- a/arch/arm/include/asm/cmpxchg.h
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -163,11 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
prefetchw((const void *)ptr);
switch (size) {
-#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
+#ifdef CONFIG_CPU_V6 /* ARCH == ARMv6 */
case 1:
oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
break;
-#else /* min ARCH >= ARMv6K */
+#else /* min ARCH > ARMv6 */
case 1:
do {
asm volatile("@ __cmpxchg1\n"
On Tue, Jun 4, 2024 at 11:14 PM Paul E. McKenney <[email protected]> wrote:
> Thank you for looking this over! Does the following patch (to be merged
> into the original) capture it properly?
Yup, also fix the commit message to be == CPU_V6,
with that:
Reviewed-by: Linus Walleij <[email protected]>
Yours,
Linus Walleij
On Wed, Jun 05, 2024 at 10:38:07AM +0200, Linus Walleij wrote:
> On Tue, Jun 4, 2024 at 11:14 PM Paul E. McKenney <[email protected]> wrote:
>
> > Thank you for looking this over! Does the following patch (to be merged
> > into the original) capture it properly?
>
> Yup, also fix the commit message to be == CPU_V6,
> with that:
Good catch, and will fix.
> Reviewed-by: Linus Walleij <[email protected]>
Thank you! I will apply these on my next rebase.
Thanx, Paul