Hi,
I just joined the mailing list and have
a quick question about the PCI Device Setup
logic. I apologize if this is not the right
forum.
I am writing a multifunction driver for the
Aurora serial cards. The driver supports
asynchronous TTYs, synchronous TTYs and a
sort of serial ethernet emulation as a network
device. A port may act either as a serial TTY
or as a serial network device, and in fact if
the system is set up for dial up networking,
the synchronous serial network interface is
first brought up by sending commands to the
corresponding asynchronous call out device.
These cards have 4 or 8 synchronous/asynchronous
ports on each card which hosts either 1 sab82538 or
2 sab82532 serial interface chips. These cards use
the PLX9050 PCI interface chip to communicate with
the PCI bus. Aurora also supplies a PCI extender chassis so that one slot can support 7 of either
type of cards, i.e. up to 56 ports per slot. The
PCI extender chassis has two DC21150 PCI-PCI
bridges.
The cards are never masters and do no support
PCI PREFETCH and if PCI transactions are made
to them that relate to PCI PREFETCH, they become
confused and hang. DC21150s try to be really
smart about PREFETCH and push the PREFETCH related
transactions to the limit and therefore drive the
cards insane if any of the cards memory resources
is prefetchable (the cards use base address 0 for
PLX9050 registers and base address 2 for the
sab8253x registers). The PCI bus driver allocates
the sab8253x registers as prefetchable memory
resources. I see no comments in the changelogs
indicating that anyone has run into the problem.
I intend to fix the problem but I would like to
chat with someone that is knowledgeable about the
subsystem first. So I am curious if anyone on the
list can point me toward someone who is "in charge"
of this subsystem.
As a sort of secondary almost unrelated question,
I am not sure whether I should treat the Aurora
card driver as a network device driver or as a
TTY driver in the kernel build tree. I have created
a special directory for it under the path
drivers/net/wan/8253x.
Thanks in advance for any assistance!
Joachim Martillo
Joachim Martillo wrote:
> These cards use the PLX9050 PCI interface chip
...
> The cards are never masters and do no support
> PCI PREFETCH and if PCI transactions are made
> to them that relate to PCI PREFETCH, they become
> confused and hang.
...
> The PCI bus driver allocates the sab8253x registers
> as prefetchable memory resources.
The PCI9050 LAS0RR local configuration register
controls whether the address range is marked
prefetchable or not. If bit 3 is set, then the range is marked as
prefetchable in Bit 3 of PCI configuration register BAR2.
I would verify that the EEPROM attached to the PCI9050 is setup
to program the LAS0RR bit 3 to zero to mark the address range
as *not* supporting prefetch.
Paul Fulghum, [email protected]
Microgate Corporation, http://www.microgate.com