The rising configuration status register (rtsr) is not banked.
As it is shared with the co-processor, it should not be written at probe
time, else the co-processor configuration will be lost.
Signed-off-by: Fabien Dessenne <[email protected]>
---
drivers/irqchip/irq-stm32-exti.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index 6edfd4b..ff8a84f 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
const struct stm32_exti_bank *stm32_bank;
struct stm32_exti_chip_data *chip_data;
void __iomem *base = h_data->base;
- u32 irqs_mask;
stm32_bank = h_data->drv_data->exti_banks[bank_idx];
chip_data = &h_data->chips_data[bank_idx];
@@ -725,10 +724,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
raw_spin_lock_init(&chip_data->rlock);
- /* Determine number of irqs supported */
- writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst);
- irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst);
-
/*
* This IP has no reset, so after hot reboot we should
* clear registers to avoid residue
--
2.7.4
On 07/03/2019 16:15, Fabien Dessenne wrote:
> The rising configuration status register (rtsr) is not banked.
> As it is shared with the co-processor, it should not be written at probe
> time, else the co-processor configuration will be lost.
>
> Signed-off-by: Fabien Dessenne <[email protected]>
Fixes:?
> ---
> drivers/irqchip/irq-stm32-exti.c | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
> index 6edfd4b..ff8a84f 100644
> --- a/drivers/irqchip/irq-stm32-exti.c
> +++ b/drivers/irqchip/irq-stm32-exti.c
> @@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
> const struct stm32_exti_bank *stm32_bank;
> struct stm32_exti_chip_data *chip_data;
> void __iomem *base = h_data->base;
> - u32 irqs_mask;
>
> stm32_bank = h_data->drv_data->exti_banks[bank_idx];
> chip_data = &h_data->chips_data[bank_idx];
> @@ -725,10 +724,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
>
> raw_spin_lock_init(&chip_data->rlock);
>
> - /* Determine number of irqs supported */
> - writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst);
> - irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst);
> -
And I guess you don't need to find out the number of supported IRQs?
Also, a handful of lines down, you're writing again to the same
register. Why isn't that a problem?
> /*
> * This IP has no reset, so after hot reboot we should
> * clear registers to avoid residue
>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
Hi
> -----Original Message-----
> From: Marc Zyngier <[email protected]>
> Sent: jeudi 7 mars 2019 17:40
> To: Fabien DESSENNE <[email protected]>; Thomas Gleixner
> <[email protected]>; Jason Cooper <[email protected]>; Maxime Coquelin
> <[email protected]>; Alexandre TORGUE
> <[email protected]>; [email protected]; linux-stm32@st-md-
> mailman.stormreply.com; [email protected]
> Cc: Benjamin GAIGNARD <[email protected]>
> Subject: Re: [PATCH] irqchip: stm32: don't set rising configuration registers at init
>
> On 07/03/2019 16:15, Fabien Dessenne wrote:
> > The rising configuration status register (rtsr) is not banked.
> > As it is shared with the co-processor, it should not be written at
> > probe time, else the co-processor configuration will be lost.
> >
> > Signed-off-by: Fabien Dessenne <[email protected]>
>
> Fixes:?
>
> > ---
> > drivers/irqchip/irq-stm32-exti.c | 5 -----
> > 1 file changed, 5 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-stm32-exti.c
> > b/drivers/irqchip/irq-stm32-exti.c
> > index 6edfd4b..ff8a84f 100644
> > --- a/drivers/irqchip/irq-stm32-exti.c
> > +++ b/drivers/irqchip/irq-stm32-exti.c
> > @@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct
> stm32_exti_host_data *h_data,
> > const struct stm32_exti_bank *stm32_bank;
> > struct stm32_exti_chip_data *chip_data;
> > void __iomem *base = h_data->base;
> > - u32 irqs_mask;
> >
> > stm32_bank = h_data->drv_data->exti_banks[bank_idx];
> > chip_data = &h_data->chips_data[bank_idx]; @@ -725,10 +724,6 @@
> > stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data
> > *h_data,
> >
> > raw_spin_lock_init(&chip_data->rlock);
> >
> > - /* Determine number of irqs supported */
> > - writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst);
> > - irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst);
> > -
>
> And I guess you don't need to find out the number of supported IRQs?
That's correct, this informed is useless : irqs_mask is never used (it used to be output in a log for debug purpose.and the log has been removed)
>
> Also, a handful of lines down, you're writing again to the same register. Why isn't
> that a problem?
It's obviously a problem : another patch is missing, I am going to add it in v2.
Thanks for pointing this out!
>
> > /*
> > * This IP has no reset, so after hot reboot we should
> > * clear registers to avoid residue
> >
>
> Thanks,
>
> M.
> --
> Jazz is not dead. It just smells funny...
On 07/03/2019 17:24, Fabien DESSENNE wrote:
> Hi
>
>
>> -----Original Message-----
>> From: Marc Zyngier <[email protected]>
>> Sent: jeudi 7 mars 2019 17:40
>> To: Fabien DESSENNE <[email protected]>; Thomas Gleixner
>> <[email protected]>; Jason Cooper <[email protected]>; Maxime Coquelin
>> <[email protected]>; Alexandre TORGUE
>> <[email protected]>; [email protected]; linux-stm32@st-md-
>> mailman.stormreply.com; [email protected]
>> Cc: Benjamin GAIGNARD <[email protected]>
>> Subject: Re: [PATCH] irqchip: stm32: don't set rising configuration registers at init
>>
>> On 07/03/2019 16:15, Fabien Dessenne wrote:
>>> The rising configuration status register (rtsr) is not banked.
>>> As it is shared with the co-processor, it should not be written at
>>> probe time, else the co-processor configuration will be lost.
>>>
>>> Signed-off-by: Fabien Dessenne <[email protected]>
>>
>> Fixes:?
>>
>>> ---
>>> drivers/irqchip/irq-stm32-exti.c | 5 -----
>>> 1 file changed, 5 deletions(-)
>>>
>>> diff --git a/drivers/irqchip/irq-stm32-exti.c
>>> b/drivers/irqchip/irq-stm32-exti.c
>>> index 6edfd4b..ff8a84f 100644
>>> --- a/drivers/irqchip/irq-stm32-exti.c
>>> +++ b/drivers/irqchip/irq-stm32-exti.c
>>> @@ -716,7 +716,6 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct
>> stm32_exti_host_data *h_data,
>>> const struct stm32_exti_bank *stm32_bank;
>>> struct stm32_exti_chip_data *chip_data;
>>> void __iomem *base = h_data->base;
>>> - u32 irqs_mask;
>>>
>>> stm32_bank = h_data->drv_data->exti_banks[bank_idx];
>>> chip_data = &h_data->chips_data[bank_idx]; @@ -725,10 +724,6 @@
>>> stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data
>>> *h_data,
>>>
>>> raw_spin_lock_init(&chip_data->rlock);
>>>
>>> - /* Determine number of irqs supported */
>>> - writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst);
>>> - irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst);
>>> -
>>
>> And I guess you don't need to find out the number of supported IRQs?
>
> That's correct, this informed is useless : irqs_mask is never used (it used to be output in a log for debug purpose.and the log has been removed)
>
>
>>
>> Also, a handful of lines down, you're writing again to the same register. Why isn't
>> that a problem?
>
> It's obviously a problem : another patch is missing, I am going to add it in v2.
> Thanks for pointing this out!
You are also happily writing to that register in other places via
stm32_exti_set_bit and co. All that is done without any cooperation with
the coprocessor (whatever that is...), so I really wonder if it all
works by magic or luck...
Thanks,
M.
--
Jazz is not dead. It just smells funny...
> -----Original Message-----
> From: Marc Zyngier <[email protected]>
> Sent: jeudi 7 mars 2019 18:46
> To: Fabien DESSENNE <[email protected]>; Thomas Gleixner
> <[email protected]>; Jason Cooper <[email protected]>; Maxime Coquelin
> <[email protected]>; Alexandre TORGUE
> <[email protected]>; [email protected]; linux-stm32@st-md-
> mailman.stormreply.com; [email protected]
> Cc: Benjamin GAIGNARD <[email protected]>
> Subject: Re: [PATCH] irqchip: stm32: don't set rising configuration registers at init
>
> On 07/03/2019 17:24, Fabien DESSENNE wrote:
> > Hi
> >
> >
> >> -----Original Message-----
> >> From: Marc Zyngier <[email protected]>
> >> Sent: jeudi 7 mars 2019 17:40
> >> To: Fabien DESSENNE <[email protected]>; Thomas Gleixner
> >> <[email protected]>; Jason Cooper <[email protected]>; Maxime
> >> Coquelin <[email protected]>; Alexandre TORGUE
> >> <[email protected]>; [email protected];
> >> linux-stm32@st-md- mailman.stormreply.com;
> >> [email protected]
> >> Cc: Benjamin GAIGNARD <[email protected]>
> >> Subject: Re: [PATCH] irqchip: stm32: don't set rising configuration
> >> registers at init
> >>
> >> On 07/03/2019 16:15, Fabien Dessenne wrote:
> >>> The rising configuration status register (rtsr) is not banked.
> >>> As it is shared with the co-processor, it should not be written at
> >>> probe time, else the co-processor configuration will be lost.
> >>>
> >>> Signed-off-by: Fabien Dessenne <[email protected]>
> >>
> >> Fixes:?
> >>
> >>> ---
> >>> drivers/irqchip/irq-stm32-exti.c | 5 -----
> >>> 1 file changed, 5 deletions(-)
> >>>
> >>> diff --git a/drivers/irqchip/irq-stm32-exti.c
> >>> b/drivers/irqchip/irq-stm32-exti.c
> >>> index 6edfd4b..ff8a84f 100644
> >>> --- a/drivers/irqchip/irq-stm32-exti.c
> >>> +++ b/drivers/irqchip/irq-stm32-exti.c
> >>> @@ -716,7 +716,6 @@ stm32_exti_chip_data
> >>> *stm32_exti_chip_init(struct
> >> stm32_exti_host_data *h_data,
> >>> const struct stm32_exti_bank *stm32_bank;
> >>> struct stm32_exti_chip_data *chip_data;
> >>> void __iomem *base = h_data->base;
> >>> - u32 irqs_mask;
> >>>
> >>> stm32_bank = h_data->drv_data->exti_banks[bank_idx];
> >>> chip_data = &h_data->chips_data[bank_idx]; @@ -725,10 +724,6 @@
> >>> stm32_exti_chip_data *stm32_exti_chip_init(struct
> >>> stm32_exti_host_data *h_data,
> >>>
> >>> raw_spin_lock_init(&chip_data->rlock);
> >>>
> >>> - /* Determine number of irqs supported */
> >>> - writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst);
> >>> - irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst);
> >>> -
> >>
> >> And I guess you don't need to find out the number of supported IRQs?
> >
> > That's correct, this informed is useless : irqs_mask is never used (it
> > used to be output in a log for debug purpose.and the log has been
> > removed)
> >
> >
> >>
> >> Also, a handful of lines down, you're writing again to the same
> >> register. Why isn't that a problem?
> >
> > It's obviously a problem : another patch is missing, I am going to add it in v2.
> > Thanks for pointing this out!
>
> You are also happily writing to that register in other places via stm32_exti_set_bit
> and co. All that is done without any cooperation with the coprocessor (whatever
> that is...), so I really wonder if it all works by magic or luck...
There is certainly some magic and luck! But there is a bit more : the access to both rtsr and ftsr regs are controlled with a call to stm32_exti_hwspin_lock() which uses an HWSpinlock shared with the coprocessor.
The other registers are not accessed by the coprocessor, hence are not hwspinlock-protected.
>
> Thanks,
>
> M.
> --
> Jazz is not dead. It just smells funny...