2022-12-08 20:23:34

by Konrad Dybcio

[permalink] [raw]
Subject: [PATCH 1/5] arm64: dts: qcom: sm6115: Fix UFS node

In its current form, UFS did not even probe successfully - it failed
when trying to set XO (ref_clk) to 300 MHz instead of doing so to
the ICE clk. Moreover, the missing reg-names prevented ICE from
working or being discovered at all. Fix both of these issues.

As a sidenote, the log reveals that this SoC uses UFS ICE v3.1.0.

Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 572bf04adf90..3f4017bc667d 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -704,6 +704,7 @@ opp-202000000 {
ufs_mem_hc: ufs@4804000 {
compatible = "qcom,sm6115-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
reg = <0x04804000 0x3000>, <0x04810000 0x8000>;
+ reg-names = "std", "ice";
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
phys = <&ufs_mem_phy_lanes>;
phy-names = "ufsphy";
@@ -736,10 +737,10 @@ ufs_mem_hc: ufs@4804000 {
<0 0>,
<0 0>,
<37500000 150000000>,
- <75000000 300000000>,
<0 0>,
<0 0>,
- <0 0>;
+ <0 0>,
+ <75000000 300000000>;

status = "disabled";
};
--
2.38.1


2022-12-08 20:38:34

by Konrad Dybcio

[permalink] [raw]
Subject: [PATCH 5/5] arm64: dts: qcom: Add Lenovo Tab P11 (J606F/XiaoXin Pad) dts

Add an initial device tree for the Lenovo Tab P11. Currently it
enables:

- simplefb
- SD Card slot via SDHCI2
- gpio-keys & PON keys
- UFS
- RPM regulators
- USB2

This has been validated with a rev (62) device. You can check yours
next to the serial no. on the sticker in the lower portion of the
back side of your tablet.

To get a successful boot run:

cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/\
sm6115p-lenovo-j606f.dtb > .Image.gz-dtb

~/mkbootimg/mkbootimg.py \
--kernel .Image.gz-dtb \
--ramdisk some/initrd.img \
--pagesize 4096 \
--base 0x0 \
--kernel_offset 0x8000 \
--ramdisk_offset 0x1000000 \
--tags_offset 0x100 \
--cmdline 'SOME_CMDLINE' \
--dtb_offset 0x1f00000 \
--header_version 1 \
--os_version 11 \
--os_patch_level 2022-11 \
-o j606f.img

fastboot flash boot j606f.img
fastboot flash dtbo empty.img
fastboot flash recovery empty.img
fastboot reboot

Where empty.img is 2 zero-bytes.

Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 290 ++++++++++++++++++
2 files changed, 291 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 3e79496292e7..5d281436172d 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -156,6 +156,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-shift-axolotl.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sm6115p-lenovo-j606f.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb
diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
new file mode 100644
index 000000000000..102730dd49a7
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
@@ -0,0 +1,290 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (c) 2022 Linaro Limited
+ */
+
+/dts-v1/;
+
+#include "sm6115.dtsi"
+#include "pm6125.dtsi"
+
+/ {
+ model = "Lenovo Tab P11";
+ compatible = "lenovo,j606f", "qcom,sm6115p", "qcom,sm6115";
+ chassis-type = "tablet";
+
+ /* required for bootloader to select correct board */
+ qcom,msm-id = <445 0x10000>, <420 0x10000>;
+ qcom,board-id = <34 3>;
+
+ aliases {
+ mmc0 = &sdhc_2;
+ };
+
+ chosen {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ framebuffer0: framebuffer@5c000000 {
+ compatible = "simple-framebuffer";
+ reg = <0 0x5c000000 0 (2000 * 1200 * 4)>;
+ width = <1200>;
+ height = <2000>;
+ stride = <(1200 * 4)>;
+ format = "a8r8g8b8";
+ clocks = <&gcc GCC_DISP_HF_AXI_CLK>;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ label = "gpio-keys";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&vol_up_n>;
+
+ key-volume-up {
+ label = "Volume Up";
+ linux,code = <KEY_VOLUMEUP>;
+ gpios = <&pm6125_gpio 5 GPIO_ACTIVE_LOW>;
+ debounce-interval = <15>;
+ linux,can-disable;
+ gpio-key,wakeup;
+ };
+ };
+};
+
+&dispcc {
+ /* HACK: disable until a panel driver is ready to retain simplefb */
+ status = "disabled";
+};
+
+&pm6125_gpio {
+ vol_up_n: vol-up-n-state {
+ pins = "gpio5";
+ function = "normal";
+ power-source = <0>;
+ bias-pull-up;
+ input-enable;
+ };
+};
+
+&pon_pwrkey {
+ status = "okay";
+};
+
+&pon_resin {
+ linux,code = <KEY_VOLUMEDOWN>;
+ status = "okay";
+};
+
+&rpm_requests {
+ regulators-0 {
+ compatible = "qcom,rpm-pm6125-regulators";
+
+ pm6125_s6: s6 {
+ regulator-min-microvolt = <304000>;
+ regulator-max-microvolt = <1456000>;
+ };
+
+ pm6125_s7: s7 {
+ regulator-min-microvolt = <1280000>;
+ regulator-max-microvolt = <2080000>;
+ };
+
+ pm6125_s8: s8 {
+ regulator-min-microvolt = <1064000>;
+ regulator-max-microvolt = <1304000>;
+ };
+
+ pm6125_l1: l1 {
+ regulator-min-microvolt = <952000>;
+ regulator-max-microvolt = <1152000>;
+ };
+
+ pm6125_l4: l4 {
+ regulator-min-microvolt = <488000>;
+ regulator-max-microvolt = <1000000>;
+ };
+
+ pm6125_l5: l5 {
+ regulator-min-microvolt = <1648000>;
+ /* 3.056V capped to 2.96V for SDHCI */
+ regulator-max-microvolt = <2960000>;
+ regulator-allow-set-load;
+ /* Broken hw, this one can't be turned off or SDHCI will break! */
+ regulator-always-on;
+ };
+
+ pm6125_l6: l6 {
+ regulator-min-microvolt = <576000>;
+ regulator-max-microvolt = <656000>;
+ };
+
+ pm6125_l7: l7 {
+ /* 1.2V-1.304V fixed at 1.256V for SDHCI bias */
+ regulator-min-microvolt = <1256000>;
+ regulator-max-microvolt = <1256000>;
+ /*
+ * TODO: SDHCI seems to also work with this one turned off, however
+ * there exists a possibility that it may not work with some very
+ * specific SDCard types, perhaps validating this against a wide
+ * range of models could rule that out, saving some power would
+ * certainly be nice..
+ */
+ regulator-always-on;
+ };
+
+ pm6125_l8: l8 {
+ regulator-min-microvolt = <400000>;
+ regulator-max-microvolt = <728000>;
+ };
+
+ pm6125_l9: l9 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2000000>;
+ };
+
+ pm6125_l10: l10 {
+ regulator-min-microvolt = <1704000>;
+ regulator-max-microvolt = <1904000>;
+ };
+
+ pm6125_l11: l11 {
+ regulator-min-microvolt = <1704000>;
+ regulator-max-microvolt = <1952000>;
+ };
+
+ pm6125_l12: l12 {
+ regulator-min-microvolt = <1624000>;
+ regulator-max-microvolt = <1984000>;
+ };
+
+ pm6125_l13: l13 {
+ regulator-min-microvolt = <1504000>;
+ regulator-max-microvolt = <1952000>;
+ };
+
+ pm6125_l14: l14 {
+ regulator-min-microvolt = <1704000>;
+ regulator-max-microvolt = <1904000>;
+ };
+
+ pm6125_l15: l15 {
+ regulator-min-microvolt = <2920000>;
+ regulator-max-microvolt = <3232000>;
+ };
+
+ pm6125_l16: l16 {
+ regulator-min-microvolt = <1704000>;
+ regulator-max-microvolt = <1904000>;
+ };
+
+ pm6125_l17: l17 {
+ regulator-min-microvolt = <1152000>;
+ regulator-max-microvolt = <1384000>;
+ };
+
+ pm6125_l18: l18 {
+ regulator-min-microvolt = <1104000>;
+ regulator-max-microvolt = <1312000>;
+ };
+
+ pm6125_l19: l19 {
+ regulator-min-microvolt = <1624000>;
+ regulator-max-microvolt = <3304000>;
+ };
+
+ pm6125_l20: l20 {
+ regulator-min-microvolt = <1624000>;
+ regulator-max-microvolt = <3304000>;
+ };
+
+ pm6125_l21: l21 {
+ regulator-min-microvolt = <2400000>;
+ regulator-max-microvolt = <3600000>;
+ };
+
+ pm6125_l22: l22 {
+ regulator-min-microvolt = <2952000>;
+ /* 3.304V capped to 2.96V for SDHCI */
+ regulator-max-microvolt = <2960000>;
+ regulator-allow-set-load;
+ /* Broken hw, this one can't be turned off or SDHCI will break! */
+ regulator-always-on;
+ };
+
+ pm6125_l23: l23 {
+ regulator-min-microvolt = <3200000>;
+ regulator-max-microvolt = <3400000>;
+ };
+
+ pm6125_l24: l24 {
+ regulator-min-microvolt = <2704000>;
+ regulator-max-microvolt = <3600000>;
+ };
+ };
+};
+
+&sdhc_2 {
+ cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sdc2_state_on &sdc2_gate_pin>;
+ pinctrl-1 = <&sdc2_state_off>;
+ vmmc-supply = <&pm6125_l22>;
+ vqmmc-supply = <&pm6125_l5>;
+ no-sdio;
+ no-mmc;
+ status = "okay";
+};
+
+&sleep_clk {
+ clock-frequency = <32764>;
+};
+
+&tlmm {
+ gpio-reserved-ranges = <14 4>;
+
+ /*
+ * This is a wholly undocumented pin (other than a single vague "pwr-gpios" reference)
+ * that needs to be toggled for the SD Card slot to work properly..
+ */
+ sdc2_gate_pin: sdc2-gate-state {
+ pins = "gpio45";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ output-high;
+ };
+};
+
+&ufs_mem_hc {
+ vcc-supply = <&pm6125_l24>;
+ vcc-max-microamp = <600000>;
+ vccq2-supply = <&pm6125_l11>;
+ vccq2-max-microamp = <600000>;
+ status = "okay";
+};
+
+&ufs_mem_phy {
+ vdda-phy-supply = <&pm6125_l4>;
+ vdda-pll-supply = <&pm6125_l12>;
+ vddp-ref-clk-supply = <&pm6125_l18>;
+ status = "okay";
+};
+
+&usb_1 {
+ status = "okay";
+};
+
+&usb_1_hsphy {
+ vdd-supply = <&pm6125_l4>;
+ vdda-pll-supply = <&pm6125_l12>;
+ vdda-phy-dpdm-supply = <&pm6125_l15>;
+ status = "okay";
+};
+
+&xo_board {
+ clock-frequency = <19200000>;
+};
--
2.38.1

2022-12-08 20:43:37

by Konrad Dybcio

[permalink] [raw]
Subject: [PATCH 4/5] dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11

Document SM6115P, an APQ version of SM6115, which in turn is more or
less a beefier version of SM4250.

Document Lenovo Tab P11 (J606F) as a SM6115P device.

Add SM6115 to the msm-id list of shame.

Signed-off-by: Konrad Dybcio <[email protected]>
---
Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index 27063a045bd0..0c7ad00586fa 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -62,6 +62,7 @@ description: |
sdx65
sm4250
sm6115
+ sm6115p
sm6125
sm6350
sm6375
@@ -790,6 +791,12 @@ properties:
- oneplus,billie2
- const: qcom,sm4250

+ - items:
+ - enum:
+ - lenovo,j606f
+ - const: qcom,sm6115p
+ - const: qcom,sm6115
+
- items:
- enum:
- sony,pdx201
@@ -931,6 +938,7 @@ allOf:
- qcom,sdm845
- qcom,sdx55
- qcom,sdx65
+ - qcom,sm6115
- qcom,sm6125
- qcom,sm6350
- qcom,sm7225
--
2.38.1

2022-12-08 20:58:16

by Konrad Dybcio

[permalink] [raw]
Subject: [PATCH 2/5] arm64: dts: qcom: sm6115: Provide xo clk to rpmcc

rpmcc used to rely on global clock lookup (and still does so for
backwards compat reasons) of "xo_board", which was common back
when we did not care about things like underscores in node names.
Nowadays it expects to be fed a reference to the fixed clock.
Satisfy that requirement to make sure rpm clock rates are not all
stuck at zero.

Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi")
Reported-by: Adam Skladowski <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 3f4017bc667d..81523ab7ff60 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -296,6 +296,8 @@ rpm_requests: rpm-requests {

rpmcc: clock-controller {
compatible = "qcom,rpmcc-sm6115", "qcom,rpmcc";
+ clocks = <&xo_board>;
+ clock-names = "xo";
#clock-cells = <1>;
};

--
2.38.1

2022-12-09 08:18:23

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH 4/5] dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11

On 08/12/2022 21:14, Konrad Dybcio wrote:
> Document SM6115P, an APQ version of SM6115, which in turn is more or
> less a beefier version of SM4250.
>
> Document Lenovo Tab P11 (J606F) as a SM6115P device.
>
> Add SM6115 to the msm-id list of shame.
>
> Signed-off-by: Konrad Dybcio <[email protected]>


Acked-by: Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof

2022-12-10 16:20:05

by Bhupesh Sharma

[permalink] [raw]
Subject: Re: [PATCH 4/5] dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11

On Fri, 9 Dec 2022 at 01:44, Konrad Dybcio <[email protected]> wrote:
>
> Document SM6115P, an APQ version of SM6115, which in turn is more or
> less a beefier version of SM4250.

Let's drop the 2nd part of the above statement. As we discussed on
irc, It suffices to say that SM6115P is the APQ version of SM6115.

I don't think that would require a respin. Maybe the commit message
can be fixed while applying this.

> Document Lenovo Tab P11 (J606F) as a SM6115P device.
>
> Add SM6115 to the msm-id list of shame.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
> index 27063a045bd0..0c7ad00586fa 100644
> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
> @@ -62,6 +62,7 @@ description: |
> sdx65
> sm4250
> sm6115
> + sm6115p
> sm6125
> sm6350
> sm6375
> @@ -790,6 +791,12 @@ properties:
> - oneplus,billie2
> - const: qcom,sm4250
>
> + - items:
> + - enum:
> + - lenovo,j606f
> + - const: qcom,sm6115p
> + - const: qcom,sm6115
> +
> - items:
> - enum:
> - sony,pdx201
> @@ -931,6 +938,7 @@ allOf:
> - qcom,sdm845
> - qcom,sdx55
> - qcom,sdx65
> + - qcom,sm6115
> - qcom,sm6125
> - qcom,sm6350
> - qcom,sm7225
> --
> 2.38.1

Otherwise:
Reviewed-by: Bhupesh Sharma <[email protected]>

Thanks.

2022-12-17 18:49:22

by Dang Huynh

[permalink] [raw]
Subject: Re: [PATCH 5/5] arm64: dts: qcom: Add Lenovo Tab P11 (J606F/XiaoXin Pad) dts

> Add an initial device tree for the Lenovo Tab P11. Currently it
> enables:
>
> - simplefb
> - SD Card slot via SDHCI2
> - gpio-keys & PON keys
> - UFS
> - RPM regulators
> - USB2
>
> This has been validated with a rev (62) device. You can check yours
> next to the serial no. on the sticker in the lower portion of the
> back side of your tablet.
>
> To get a successful boot run:
>
> cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/\
> sm6115p-lenovo-j606f.dtb > .Image.gz-dtb
>
> ~/mkbootimg/mkbootimg.py \
> --kernel .Image.gz-dtb \
> --ramdisk some/initrd.img \
> --pagesize 4096 \
> --base 0x0 \
> --kernel_offset 0x8000 \
> --ramdisk_offset 0x1000000 \
> --tags_offset 0x100 \
> --cmdline 'SOME_CMDLINE' \
> --dtb_offset 0x1f00000 \
> --header_version 1 \
> --os_version 11 \
> --os_patch_level 2022-11 \
> -o j606f.img
>
> fastboot flash boot j606f.img
> fastboot flash dtbo empty.img
> fastboot flash recovery empty.img
> fastboot reboot
>
> Where empty.img is 2 zero-bytes.
>
> Signed-off-by: Konrad Dybcio <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> .../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 290 ++++++++++++++++++
> 2 files changed, 291 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile
> b/arch/arm64/boot/dts/qcom/Makefile index 3e79496292e7..5d281436172d 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -156,6 +156,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-shift-axolotl.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sdm850-samsung-w737.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm4250-oneplus-billie2.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += sm6115p-lenovo-j606f.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm6375-sony-xperia-murray-pdx225.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts new file mode 100644
> index 000000000000..102730dd49a7
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> @@ -0,0 +1,290 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +/*
> + * Copyright (c) 2022 Linaro Limited
> + */
> +
> +/dts-v1/;
> +
> +#include "sm6115.dtsi"
> +#include "pm6125.dtsi"
> +
> +/ {
> + model = "Lenovo Tab P11";
> + compatible = "lenovo,j606f", "qcom,sm6115p", "qcom,sm6115";
> + chassis-type = "tablet";
> +
> + /* required for bootloader to select correct board */
> + qcom,msm-id = <445 0x10000>, <420 0x10000>;
> + qcom,board-id = <34 3>;
> +
> + aliases {
> + mmc0 = &sdhc_2;
> + };
> +
> + chosen {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + framebuffer0: framebuffer@5c000000 {
> + compatible = "simple-framebuffer";
> + reg = <0 0x5c000000 0 (2000 * 1200 * 4)>;
> + width = <1200>;
> + height = <2000>;
> + stride = <(1200 * 4)>;
> + format = "a8r8g8b8";
> + clocks = <&gcc GCC_DISP_HF_AXI_CLK>;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + label = "gpio-keys";
Why is this needed? I had to make a patch to remove this label from many
device trees a few months ago and I haven't had any issue with it.
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&vol_up_n>;
> +
> + key-volume-up {
> + label = "Volume Up";
> + linux,code = <KEY_VOLUMEUP>;
> + gpios = <&pm6125_gpio 5 GPIO_ACTIVE_LOW>;
> + debounce-interval = <15>;
> + linux,can-disable;
> + gpio-key,wakeup;
> + };
> + };
> +};
> +
> +&dispcc {
> + /* HACK: disable until a panel driver is ready to retain simplefb
*/
> + status = "disabled";
> +};
> +
> +&pm6125_gpio {
> + vol_up_n: vol-up-n-state {
> + pins = "gpio5";
> + function = "normal";
> + power-source = <0>;
> + bias-pull-up;
> + input-enable;
> + };
> +};
> +
> +&pon_pwrkey {
> + status = "okay";
> +};
> +
> +&pon_resin {
> + linux,code = <KEY_VOLUMEDOWN>;
> + status = "okay";
> +};
> +
> +&rpm_requests {
> + regulators-0 {
> + compatible = "qcom,rpm-pm6125-regulators";
> +
> + pm6125_s6: s6 {
> + regulator-min-microvolt = <304000>;
> + regulator-max-microvolt = <1456000>;
> + };
> +
> + pm6125_s7: s7 {
> + regulator-min-microvolt = <1280000>;
> + regulator-max-microvolt = <2080000>;
> + };
> +
> + pm6125_s8: s8 {
> + regulator-min-microvolt = <1064000>;
> + regulator-max-microvolt = <1304000>;
> + };
> +
> + pm6125_l1: l1 {
> + regulator-min-microvolt = <952000>;
> + regulator-max-microvolt = <1152000>;
> + };
> +
> + pm6125_l4: l4 {
> + regulator-min-microvolt = <488000>;
> + regulator-max-microvolt = <1000000>;
> + };
> +
> + pm6125_l5: l5 {
> + regulator-min-microvolt = <1648000>;
> + /* 3.056V capped to 2.96V for SDHCI */
> + regulator-max-microvolt = <2960000>;
> + regulator-allow-set-load;
> + /* Broken hw, this one can't be turned off or
SDHCI will break! */
> + regulator-always-on;
> + };
> +
> + pm6125_l6: l6 {
> + regulator-min-microvolt = <576000>;
> + regulator-max-microvolt = <656000>;
> + };
> +
> + pm6125_l7: l7 {
> + /* 1.2V-1.304V fixed at 1.256V for SDHCI bias
*/
> + regulator-min-microvolt = <1256000>;
> + regulator-max-microvolt = <1256000>;
> + /*
> + * TODO: SDHCI seems to also work with this
one turned off, however
> + * there exists a possibility that it may
not work with some very
> + * specific SDCard types, perhaps validating
this against a wide
> + * range of models could rule that out,
saving some power would
> + * certainly be nice..
> + */
> + regulator-always-on;
> + };
> +
> + pm6125_l8: l8 {
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <728000>;
> + };
> +
> + pm6125_l9: l9 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2000000>;
> + };
> +
> + pm6125_l10: l10 {
> + regulator-min-microvolt = <1704000>;
> + regulator-max-microvolt = <1904000>;
> + };
> +
> + pm6125_l11: l11 {
> + regulator-min-microvolt = <1704000>;
> + regulator-max-microvolt = <1952000>;
> + };
> +
> + pm6125_l12: l12 {
> + regulator-min-microvolt = <1624000>;
> + regulator-max-microvolt = <1984000>;
> + };
> +
> + pm6125_l13: l13 {
> + regulator-min-microvolt = <1504000>;
> + regulator-max-microvolt = <1952000>;
> + };
> +
> + pm6125_l14: l14 {
> + regulator-min-microvolt = <1704000>;
> + regulator-max-microvolt = <1904000>;
> + };
> +
> + pm6125_l15: l15 {
> + regulator-min-microvolt = <2920000>;
> + regulator-max-microvolt = <3232000>;
> + };
> +
> + pm6125_l16: l16 {
> + regulator-min-microvolt = <1704000>;
> + regulator-max-microvolt = <1904000>;
> + };
> +
> + pm6125_l17: l17 {
> + regulator-min-microvolt = <1152000>;
> + regulator-max-microvolt = <1384000>;
> + };
> +
> + pm6125_l18: l18 {
> + regulator-min-microvolt = <1104000>;
> + regulator-max-microvolt = <1312000>;
> + };
> +
> + pm6125_l19: l19 {
> + regulator-min-microvolt = <1624000>;
> + regulator-max-microvolt = <3304000>;
> + };
> +
> + pm6125_l20: l20 {
> + regulator-min-microvolt = <1624000>;
> + regulator-max-microvolt = <3304000>;
> + };
> +
> + pm6125_l21: l21 {
> + regulator-min-microvolt = <2400000>;
> + regulator-max-microvolt = <3600000>;
> + };
> +
> + pm6125_l22: l22 {
> + regulator-min-microvolt = <2952000>;
> + /* 3.304V capped to 2.96V for SDHCI */
> + regulator-max-microvolt = <2960000>;
> + regulator-allow-set-load;
> + /* Broken hw, this one can't be turned off or
SDHCI will break! */
> + regulator-always-on;
> + };
> +
> + pm6125_l23: l23 {
> + regulator-min-microvolt = <3200000>;
> + regulator-max-microvolt = <3400000>;
> + };
> +
> + pm6125_l24: l24 {
> + regulator-min-microvolt = <2704000>;
> + regulator-max-microvolt = <3600000>;
> + };
> + };
> +};
> +
> +&sdhc_2 {
> + cd-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sdc2_state_on &sdc2_gate_pin>;
> + pinctrl-1 = <&sdc2_state_off>;
> + vmmc-supply = <&pm6125_l22>;
> + vqmmc-supply = <&pm6125_l5>;
> + no-sdio;
> + no-mmc;
> + status = "okay";
> +};
> +
> +&sleep_clk {
> + clock-frequency = <32764>;
> +};
> +
> +&tlmm {
> + gpio-reserved-ranges = <14 4>;
> +
> + /*
> + * This is a wholly undocumented pin (other than a single vague
> "pwr-gpios" reference) + * that needs to be toggled for the SD Card slot
> to work properly.. + */
> + sdc2_gate_pin: sdc2-gate-state {
> + pins = "gpio45";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-up;
> + output-high;
> + };
> +};
> +
> +&ufs_mem_hc {
> + vcc-supply = <&pm6125_l24>;
> + vcc-max-microamp = <600000>;
> + vccq2-supply = <&pm6125_l11>;
> + vccq2-max-microamp = <600000>;
> + status = "okay";
> +};
> +
> +&ufs_mem_phy {
> + vdda-phy-supply = <&pm6125_l4>;
> + vdda-pll-supply = <&pm6125_l12>;
> + vddp-ref-clk-supply = <&pm6125_l18>;
> + status = "okay";
> +};
> +
> +&usb_1 {
> + status = "okay";
> +};
> +
> +&usb_1_hsphy {
> + vdd-supply = <&pm6125_l4>;
> + vdda-pll-supply = <&pm6125_l12>;
> + vdda-phy-dpdm-supply = <&pm6125_l15>;
> + status = "okay";
> +};
> +
> +&xo_board {
> + clock-frequency = <19200000>;
> +};




2022-12-28 05:15:59

by Bjorn Andersson

[permalink] [raw]
Subject: Re: (subset) [PATCH 1/5] arm64: dts: qcom: sm6115: Fix UFS node

On Thu, 8 Dec 2022 21:13:57 +0100, Konrad Dybcio wrote:
> In its current form, UFS did not even probe successfully - it failed
> when trying to set XO (ref_clk) to 300 MHz instead of doing so to
> the ICE clk. Moreover, the missing reg-names prevented ICE from
> working or being discovered at all. Fix both of these issues.
>
> As a sidenote, the log reveals that this SoC uses UFS ICE v3.1.0.
>
> [...]

Applied, thanks!

[1/5] arm64: dts: qcom: sm6115: Fix UFS node
commit: 01b6041454e8bc4f5feb76e6bcdc83a48cea21f2
[2/5] arm64: dts: qcom: sm6115: Provide xo clk to rpmcc
commit: ad9514be8ddb9d3a8c262aa415c2f1c1f4cc97f9
[3/5] arm64: dts: qcom: sm6115: Provide real SMD RPM XO to SDC1/2
commit: 0f1619aa22cd78a47522008e9b83524eae6bb922
[4/5] dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11
commit: 92ad27fb925943d62deaaa659931ce85ddec99c8
[5/5] arm64: dts: qcom: Add Lenovo Tab P11 (J606F/XiaoXin Pad) dts
commit: 67e75cfea375b5eca42a8d41b927fa195e723fe6

Best regards,
--
Bjorn Andersson <[email protected]>