2016-10-06 22:22:03

by Aaron Brice

Subject: [PATCH] tty: serial: fsl_lpuart: Fix Tx DMA edge case

In the case where head == 0 on the circular buffer, there should be one
DMA buffer, not two. The second zero-length buffer would break the
lpuart driver, transfer would never complete.

Signed-off-by: Aaron Brice <[email protected]>
---
drivers/tty/serial/fsl_lpuart.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index de9d510..76103f2 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -328,7 +328,7 @@ static void lpuart_dma_tx(struct lpuart_port *sport)

sport->dma_tx_bytes = uart_circ_chars_pending(xmit);

- if (xmit->tail < xmit->head) {
+ if (xmit->tail < xmit->head || xmit->head == 0) {
sport->dma_tx_nents = 1;
sg_init_one(sgl, xmit->buf + xmit->tail, sport->dma_tx_bytes);
} else {
@@ -359,7 +359,6 @@ static void lpuart_dma_tx(struct lpuart_port *sport)
sport->dma_tx_in_progress = true;
sport->dma_tx_cookie = dmaengine_submit(sport->dma_tx_desc);
dma_async_issue_pending(sport->dma_tx_chan);
-
}

static void lpuart_dma_tx_complete(void *arg)
--
2.7.4

2016-10-07 18:12:29

by Stefan Agner

Subject: Re: [PATCH] tty: serial: fsl_lpuart: Fix Tx DMA edge case

On 2016-10-06 15:13, Aaron Brice wrote:
> In the case where head == 0 on the circular buffer, there should be one
> DMA buffer, not two. The second zero-length buffer would break the
> lpuart driver, transfer would never complete.

That looks right, and seems to work fine here:

Acked-by: Stefan Agner <[email protected]>
Tested-by: Stefan Agner <[email protected]>

@Greg, would be good if this would still make it into 4.9.

--
Stefan

>
> Signed-off-by: Aaron Brice <[email protected]>
> ---
> drivers/tty/serial/fsl_lpuart.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
> index de9d510..76103f2 100644
> --- a/drivers/tty/serial/fsl_lpuart.c
> +++ b/drivers/tty/serial/fsl_lpuart.c
> @@ -328,7 +328,7 @@ static void lpuart_dma_tx(struct lpuart_port *sport)
>
> sport->dma_tx_bytes = uart_circ_chars_pending(xmit);
>
> - if (xmit->tail < xmit->head) {
> + if (xmit->tail < xmit->head || xmit->head == 0) {
> sport->dma_tx_nents = 1;
> sg_init_one(sgl, xmit->buf + xmit->tail, sport->dma_tx_bytes);
> } else {
> @@ -359,7 +359,6 @@ static void lpuart_dma_tx(struct lpuart_port *sport)
> sport->dma_tx_in_progress = true;
> sport->dma_tx_cookie = dmaengine_submit(sport->dma_tx_desc);
> dma_async_issue_pending(sport->dma_tx_chan);
> -
> }
>
> static void lpuart_dma_tx_complete(void *arg)

2016-10-10 15:51:26

by Bhuvanchandra DV

Subject: Re: [PATCH] tty: serial: fsl_lpuart: Fix Tx DMA edge case

On 10/07/16 03:43, Aaron Brice wrote:

> In the case where head == 0 on the circular buffer, there should be one
> DMA buffer, not two. The second zero-length buffer would break the
> lpuart driver, transfer would never complete.

Tested-by: Bhuvanchandra DV <[email protected]>

>
> Signed-off-by: Aaron Brice <[email protected]>
> ---
> drivers/tty/serial/fsl_lpuart.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
> index de9d510..76103f2 100644
> --- a/drivers/tty/serial/fsl_lpuart.c
> +++ b/drivers/tty/serial/fsl_lpuart.c
> @@ -328,7 +328,7 @@ static void lpuart_dma_tx(struct lpuart_port *sport)
>
> sport->dma_tx_bytes = uart_circ_chars_pending(xmit);
>
> - if (xmit->tail < xmit->head) {
> + if (xmit->tail < xmit->head || xmit->head == 0) {
> sport->dma_tx_nents = 1;
> sg_init_one(sgl, xmit->buf + xmit->tail, sport->dma_tx_bytes);
> } else {
> @@ -359,7 +359,6 @@ static void lpuart_dma_tx(struct lpuart_port *sport)
> sport->dma_tx_in_progress = true;
> sport->dma_tx_cookie = dmaengine_submit(sport->dma_tx_desc);
> dma_async_issue_pending(sport->dma_tx_chan);
> -
> }
>
> static void lpuart_dma_tx_complete(void *arg)