Few drivers have own definitions for this constant, so move it to the
PCI core. In addition there are several places where the following
code sequence is used:
1. Read PCI_STATUS
2. Mask out non-error bits
3. Action based on set error bits
4. Write back set error bits to clear them
As this is a repeated pattern, add a helper to the PCI core.
Most affected drivers are network drivers. But as it's about core
PCI functionality, I suppose the series should go through the PCI
tree.
v2:
- fix formal issue with cover letter
Heiner Kallweit (8):
PCI: add constant PCI_STATUS_ERROR_BITS
PCI: add pci_status_get_and_clear_errors
r8169: use pci_status_get_and_clear_errors
net: cassini: use pci_status_get_and_clear_errors
net: sungem: use pci_status_get_and_clear_errors
net: skfp: use PCI_STATUS_ERROR_BITS
PCI: pci-bridge-emul: use PCI_STATUS_ERROR_BITS
sound: bt87x: use pci_status_get_and_clear_errors
drivers/net/ethernet/marvell/skge.h | 6 -----
drivers/net/ethernet/marvell/sky2.h | 6 -----
drivers/net/ethernet/realtek/r8169_main.c | 15 +++++-------
drivers/net/ethernet/sun/cassini.c | 28 ++++++++-------------
drivers/net/ethernet/sun/sungem.c | 30 +++++++----------------
drivers/net/fddi/skfp/drvfbi.c | 2 +-
drivers/net/fddi/skfp/h/skfbi.h | 5 ----
drivers/pci/pci-bridge-emul.c | 14 ++---------
drivers/pci/pci.c | 23 +++++++++++++++++
include/linux/pci.h | 1 +
include/uapi/linux/pci_regs.h | 7 ++++++
sound/pci/bt87x.c | 7 +-----
12 files changed, 60 insertions(+), 84 deletions(-)
--
2.25.1
Use new constant PCI_STATUS_ERROR_BITS to simplify the code.
Signed-off-by: Heiner Kallweit <[email protected]>
---
drivers/pci/pci-bridge-emul.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/pci-bridge-emul.c b/drivers/pci/pci-bridge-emul.c
index fffa77093..93d8e8910 100644
--- a/drivers/pci/pci-bridge-emul.c
+++ b/drivers/pci/pci-bridge-emul.c
@@ -50,12 +50,7 @@ static const struct pci_bridge_reg_behavior pci_regs_behavior[] = {
(PCI_STATUS_CAP_LIST | PCI_STATUS_66MHZ |
PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MASK) << 16),
.rsvd = GENMASK(15, 10) | ((BIT(6) | GENMASK(3, 0)) << 16),
- .w1c = (PCI_STATUS_PARITY |
- PCI_STATUS_SIG_TARGET_ABORT |
- PCI_STATUS_REC_TARGET_ABORT |
- PCI_STATUS_REC_MASTER_ABORT |
- PCI_STATUS_SIG_SYSTEM_ERROR |
- PCI_STATUS_DETECTED_PARITY) << 16,
+ .w1c = PCI_STATUS_ERROR_BITS << 16;
},
[PCI_CLASS_REVISION / 4] = { .ro = ~0 },
@@ -100,12 +95,7 @@ static const struct pci_bridge_reg_behavior pci_regs_behavior[] = {
PCI_STATUS_DEVSEL_MASK) << 16) |
GENMASK(11, 8) | GENMASK(3, 0)),
- .w1c = (PCI_STATUS_PARITY |
- PCI_STATUS_SIG_TARGET_ABORT |
- PCI_STATUS_REC_TARGET_ABORT |
- PCI_STATUS_REC_MASTER_ABORT |
- PCI_STATUS_SIG_SYSTEM_ERROR |
- PCI_STATUS_DETECTED_PARITY) << 16,
+ .w1c = PCI_STATUS_ERROR_BITS << 16;
.rsvd = ((BIT(6) | GENMASK(4, 0)) << 16),
},
--
2.25.1
Use new constant PCI_STATUS_ERROR_BITS to simplify the code.
Signed-off-by: Heiner Kallweit <[email protected]>
---
drivers/net/fddi/skfp/drvfbi.c | 2 +-
drivers/net/fddi/skfp/h/skfbi.h | 5 -----
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/net/fddi/skfp/drvfbi.c b/drivers/net/fddi/skfp/drvfbi.c
index 9c8aa3a95..d5937aff5 100644
--- a/drivers/net/fddi/skfp/drvfbi.c
+++ b/drivers/net/fddi/skfp/drvfbi.c
@@ -112,7 +112,7 @@ static void card_start(struct s_smc *smc)
*/
outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_ON) ; /* enable for writes */
word = inpw(PCI_C(PCI_STATUS)) ;
- outpw(PCI_C(PCI_STATUS), word | PCI_ERRBITS) ;
+ outpw(PCI_C(PCI_STATUS), word | PCI_STATUS_ERROR_BITS) ;
outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_OFF) ; /* disable writes */
/*
diff --git a/drivers/net/fddi/skfp/h/skfbi.h b/drivers/net/fddi/skfp/h/skfbi.h
index 480795681..ccee00b71 100644
--- a/drivers/net/fddi/skfp/h/skfbi.h
+++ b/drivers/net/fddi/skfp/h/skfbi.h
@@ -33,11 +33,6 @@
*/
#define I2C_ADDR_VPD 0xA0 /* I2C address for the VPD EEPROM */
-
-#define PCI_ERRBITS (PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT | PCI_STATUS_SIG_TARGET_ABORT | PCI_STATUS_PARITY)
-
-
-
/*
* Control Register File:
* Bank 0
--
2.25.1
Use new helper pci_status_get_and_clear_errors() to simplify the code.
Signed-off-by: Heiner Kallweit <[email protected]>
---
drivers/net/ethernet/sun/sungem.c | 30 +++++++++---------------------
1 file changed, 9 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethernet/sun/sungem.c b/drivers/net/ethernet/sun/sungem.c
index 8358064fb..2d392a7b1 100644
--- a/drivers/net/ethernet/sun/sungem.c
+++ b/drivers/net/ethernet/sun/sungem.c
@@ -545,37 +545,25 @@ static int gem_pci_interrupt(struct net_device *dev, struct gem *gp, u32 gem_sta
}
if (pci_estat & GREG_PCIESTAT_OTHER) {
- u16 pci_cfg_stat;
+ int pci_errs;
/* Interrogate PCI config space for the
* true cause.
*/
- pci_read_config_word(gp->pdev, PCI_STATUS,
- &pci_cfg_stat);
- netdev_err(dev, "Read PCI cfg space status [%04x]\n",
- pci_cfg_stat);
- if (pci_cfg_stat & PCI_STATUS_PARITY)
+ pci_errs = pci_status_get_and_clear_errors(gp->pdev);
+ netdev_err(dev, "PCI status errors[%04x]\n", pci_errs);
+ if (pci_errs & PCI_STATUS_PARITY)
netdev_err(dev, "PCI parity error detected\n");
- if (pci_cfg_stat & PCI_STATUS_SIG_TARGET_ABORT)
+ if (pci_errs & PCI_STATUS_SIG_TARGET_ABORT)
netdev_err(dev, "PCI target abort\n");
- if (pci_cfg_stat & PCI_STATUS_REC_TARGET_ABORT)
+ if (pci_errs & PCI_STATUS_REC_TARGET_ABORT)
netdev_err(dev, "PCI master acks target abort\n");
- if (pci_cfg_stat & PCI_STATUS_REC_MASTER_ABORT)
+ if (pci_errs & PCI_STATUS_REC_MASTER_ABORT)
netdev_err(dev, "PCI master abort\n");
- if (pci_cfg_stat & PCI_STATUS_SIG_SYSTEM_ERROR)
+ if (pci_errs & PCI_STATUS_SIG_SYSTEM_ERROR)
netdev_err(dev, "PCI system error SERR#\n");
- if (pci_cfg_stat & PCI_STATUS_DETECTED_PARITY)
+ if (pci_errs & PCI_STATUS_DETECTED_PARITY)
netdev_err(dev, "PCI parity error\n");
-
- /* Write the error bits back to clear them. */
- pci_cfg_stat &= (PCI_STATUS_PARITY |
- PCI_STATUS_SIG_TARGET_ABORT |
- PCI_STATUS_REC_TARGET_ABORT |
- PCI_STATUS_REC_MASTER_ABORT |
- PCI_STATUS_SIG_SYSTEM_ERROR |
- PCI_STATUS_DETECTED_PARITY);
- pci_write_config_word(gp->pdev,
- PCI_STATUS, pci_cfg_stat);
}
/* For all PCI errors, we should reset the chip. */
--
2.25.1
Use new helper pci_status_get_and_clear_errors() to simplify the code.
Signed-off-by: Heiner Kallweit <[email protected]>
---
drivers/net/ethernet/sun/cassini.c | 28 ++++++++++------------------
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/drivers/net/ethernet/sun/cassini.c b/drivers/net/ethernet/sun/cassini.c
index 6ec9163e2..e6d1aa882 100644
--- a/drivers/net/ethernet/sun/cassini.c
+++ b/drivers/net/ethernet/sun/cassini.c
@@ -1716,34 +1716,26 @@ static int cas_pci_interrupt(struct net_device *dev, struct cas *cp,
pr_cont("\n");
if (stat & PCI_ERR_OTHER) {
- u16 cfg;
+ int pci_errs;
/* Interrogate PCI config space for the
* true cause.
*/
- pci_read_config_word(cp->pdev, PCI_STATUS, &cfg);
- netdev_err(dev, "Read PCI cfg space status [%04x]\n", cfg);
- if (cfg & PCI_STATUS_PARITY)
+ pci_errs = pci_status_get_and_clear_errors(cp->pdev);
+
+ netdev_err(dev, "PCI status errors[%04x]\n", pci_errs);
+ if (pci_errs & PCI_STATUS_PARITY)
netdev_err(dev, "PCI parity error detected\n");
- if (cfg & PCI_STATUS_SIG_TARGET_ABORT)
+ if (pci_errs & PCI_STATUS_SIG_TARGET_ABORT)
netdev_err(dev, "PCI target abort\n");
- if (cfg & PCI_STATUS_REC_TARGET_ABORT)
+ if (pci_errs & PCI_STATUS_REC_TARGET_ABORT)
netdev_err(dev, "PCI master acks target abort\n");
- if (cfg & PCI_STATUS_REC_MASTER_ABORT)
+ if (pci_errs & PCI_STATUS_REC_MASTER_ABORT)
netdev_err(dev, "PCI master abort\n");
- if (cfg & PCI_STATUS_SIG_SYSTEM_ERROR)
+ if (pci_errs & PCI_STATUS_SIG_SYSTEM_ERROR)
netdev_err(dev, "PCI system error SERR#\n");
- if (cfg & PCI_STATUS_DETECTED_PARITY)
+ if (pci_errs & PCI_STATUS_DETECTED_PARITY)
netdev_err(dev, "PCI parity error\n");
-
- /* Write the error bits back to clear them. */
- cfg &= (PCI_STATUS_PARITY |
- PCI_STATUS_SIG_TARGET_ABORT |
- PCI_STATUS_REC_TARGET_ABORT |
- PCI_STATUS_REC_MASTER_ABORT |
- PCI_STATUS_SIG_SYSTEM_ERROR |
- PCI_STATUS_DETECTED_PARITY);
- pci_write_config_word(cp->pdev, PCI_STATUS, cfg);
}
/* For all PCI errors, we should reset the chip. */
--
2.25.1
Use new helper pci_status_get_and_clear_errors() to simplify the code.
Signed-off-by: Heiner Kallweit <[email protected]>
---
drivers/net/ethernet/realtek/r8169_main.c | 15 ++++++---------
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index f081007a2..4495a3cf9 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -4357,13 +4357,15 @@ static void rtl8169_pcierr_interrupt(struct net_device *dev)
{
struct rtl8169_private *tp = netdev_priv(dev);
struct pci_dev *pdev = tp->pci_dev;
- u16 pci_status, pci_cmd;
+ int pci_status_errs;
+ u16 pci_cmd;
pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
- pci_read_config_word(pdev, PCI_STATUS, &pci_status);
- netif_err(tp, intr, dev, "PCI error (cmd = 0x%04x, status = 0x%04x)\n",
- pci_cmd, pci_status);
+ pci_status_errs = pci_status_get_and_clear_errors(pdev);
+
+ netif_err(tp, intr, dev, "PCI error (cmd = 0x%04x, status_errs = 0x%04x)\n",
+ pci_cmd, pci_status_errs);
/*
* The recovery sequence below admits a very elaborated explanation:
@@ -4380,11 +4382,6 @@ static void rtl8169_pcierr_interrupt(struct net_device *dev)
pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
- pci_write_config_word(pdev, PCI_STATUS,
- pci_status & (PCI_STATUS_DETECTED_PARITY |
- PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
- PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
-
rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING);
}
--
2.25.1
Use new helper pci_status_get_and_clear_errors() to simplify the code.
Signed-off-by: Heiner Kallweit <[email protected]>
---
sound/pci/bt87x.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/sound/pci/bt87x.c b/sound/pci/bt87x.c
index 8c48864c8..656750466 100644
--- a/sound/pci/bt87x.c
+++ b/sound/pci/bt87x.c
@@ -271,13 +271,8 @@ static void snd_bt87x_free_risc(struct snd_bt87x *chip)
static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status)
{
- u16 pci_status;
+ int pci_status = pci_status_get_and_clear_errors(chip->pci);
- pci_read_config_word(chip->pci, PCI_STATUS, &pci_status);
- pci_status &= PCI_STATUS_PARITY | PCI_STATUS_SIG_TARGET_ABORT |
- PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_REC_MASTER_ABORT |
- PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_DETECTED_PARITY;
- pci_write_config_word(chip->pci, PCI_STATUS, pci_status);
if (pci_status != PCI_STATUS_DETECTED_PARITY)
dev_err(chip->card->dev,
"Aieee - PCI error! status %#08x, PCI status %#04x\n",
--
2.25.1
Few drivers use the following code sequence:
1. Read PCI_STATUS
2. Mask out non-error bits
3. Action based on error bits set
4. Write back set error bits to clear them
As this is a repeated pattern, add a helper to the PCI core.
Signed-off-by: Heiner Kallweit <[email protected]>
---
drivers/pci/pci.c | 23 +++++++++++++++++++++++
include/linux/pci.h | 1 +
2 files changed, 24 insertions(+)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index d828ca835..c16b0ba2a 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -173,6 +173,29 @@ unsigned char pci_bus_max_busnr(struct pci_bus *bus)
}
EXPORT_SYMBOL_GPL(pci_bus_max_busnr);
+/**
+ * pci_status_get_and_clear_errors - return and clear error bits in PCI_STATUS
+ * @pdev: the PCI device
+ *
+ * Returns error bits set in PCI_STATUS and clears them.
+ */
+int pci_status_get_and_clear_errors(struct pci_dev *pdev)
+{
+ u16 status;
+ int ret;
+
+ ret = pci_read_config_word(pdev, PCI_STATUS, &status);
+ if (ret != PCIBIOS_SUCCESSFUL)
+ return -EIO;
+
+ status &= PCI_STATUS_ERROR_BITS;
+ if (status)
+ pci_write_config_word(pdev, PCI_STATUS, status);
+
+ return status;
+}
+EXPORT_SYMBOL_GPL(pci_status_get_and_clear_errors);
+
#ifdef CONFIG_HAS_IOMEM
void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar)
{
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 3840a541a..7a75aae04 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1203,6 +1203,7 @@ int pci_select_bars(struct pci_dev *dev, unsigned long flags);
bool pci_device_is_present(struct pci_dev *pdev);
void pci_ignore_hotplug(struct pci_dev *dev);
struct pci_dev *pci_real_dma_dev(struct pci_dev *dev);
+int pci_status_get_and_clear_errors(struct pci_dev *pdev);
int __printf(6, 7) pci_request_irq(struct pci_dev *dev, unsigned int nr,
irq_handler_t handler, irq_handler_t thread_fn, void *dev_id,
--
2.25.1
This constant is used (with different names) in more than one driver,
so move it to the PCI core.
Signed-off-by: Heiner Kallweit <[email protected]>
---
drivers/net/ethernet/marvell/skge.h | 6 ------
drivers/net/ethernet/marvell/sky2.h | 6 ------
include/uapi/linux/pci_regs.h | 7 +++++++
3 files changed, 7 insertions(+), 12 deletions(-)
diff --git a/drivers/net/ethernet/marvell/skge.h b/drivers/net/ethernet/marvell/skge.h
index 6fa7b6a34..e149bdfe1 100644
--- a/drivers/net/ethernet/marvell/skge.h
+++ b/drivers/net/ethernet/marvell/skge.h
@@ -15,12 +15,6 @@
#define PCI_VPD_ROM_SZ 7L<<14 /* VPD ROM size 0=256, 1=512, ... */
#define PCI_REV_DESC 1<<2 /* Reverse Descriptor bytes */
-#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \
- PCI_STATUS_SIG_SYSTEM_ERROR | \
- PCI_STATUS_REC_MASTER_ABORT | \
- PCI_STATUS_REC_TARGET_ABORT | \
- PCI_STATUS_PARITY)
-
enum csr_regs {
B0_RAP = 0x0000,
B0_CTST = 0x0004,
diff --git a/drivers/net/ethernet/marvell/sky2.h b/drivers/net/ethernet/marvell/sky2.h
index b02b65230..851d8ed34 100644
--- a/drivers/net/ethernet/marvell/sky2.h
+++ b/drivers/net/ethernet/marvell/sky2.h
@@ -252,12 +252,6 @@ enum {
};
-#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \
- PCI_STATUS_SIG_SYSTEM_ERROR | \
- PCI_STATUS_REC_MASTER_ABORT | \
- PCI_STATUS_REC_TARGET_ABORT | \
- PCI_STATUS_PARITY)
-
enum csr_regs {
B0_RAP = 0x0000,
B0_CTST = 0x0004,
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 543769048..9b84a1278 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -68,6 +68,13 @@
#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
#define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */
+#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \
+ PCI_STATUS_SIG_SYSTEM_ERROR | \
+ PCI_STATUS_REC_MASTER_ABORT | \
+ PCI_STATUS_REC_TARGET_ABORT | \
+ PCI_STATUS_SIG_TARGET_ABORT | \
+ PCI_STATUS_PARITY)
+
#define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8 revision */
#define PCI_REVISION_ID 0x08 /* Revision ID */
#define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */
--
2.25.1
Hi Heiner,
I love your patch! Yet something to improve:
[auto build test ERROR on pci/next]
[also build test ERROR on sound/for-next net-next/master net/master linus/master v5.6-rc3 next-20200224]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Heiner-Kallweit/PCI-add-and-use-constant-PCI_STATUS_ERROR_BITS-and-helper-pci_status_get_and_clear_errors/20200225-154725
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: arm-mvebu_v7_defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 7.5.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.5.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <[email protected]>
All errors (new ones prefixed by >>):
>> drivers//pci/pci-bridge-emul.c:53:37: error: expected '}' before ';' token
.w1c = PCI_STATUS_ERROR_BITS << 16;
^
drivers//pci/pci-bridge-emul.c:98:37: error: expected '}' before ';' token
.w1c = PCI_STATUS_ERROR_BITS << 16;
^
vim +53 drivers//pci/pci-bridge-emul.c
40
41 static const struct pci_bridge_reg_behavior pci_regs_behavior[] = {
42 [PCI_VENDOR_ID / 4] = { .ro = ~0 },
43 [PCI_COMMAND / 4] = {
44 .rw = (PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
45 PCI_COMMAND_MASTER | PCI_COMMAND_PARITY |
46 PCI_COMMAND_SERR),
47 .ro = ((PCI_COMMAND_SPECIAL | PCI_COMMAND_INVALIDATE |
48 PCI_COMMAND_VGA_PALETTE | PCI_COMMAND_WAIT |
49 PCI_COMMAND_FAST_BACK) |
50 (PCI_STATUS_CAP_LIST | PCI_STATUS_66MHZ |
51 PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MASK) << 16),
52 .rsvd = GENMASK(15, 10) | ((BIT(6) | GENMASK(3, 0)) << 16),
> 53 .w1c = PCI_STATUS_ERROR_BITS << 16;
54 },
55 [PCI_CLASS_REVISION / 4] = { .ro = ~0 },
56
57 /*
58 * Cache Line Size register: implement as read-only, we do not
59 * pretend implementing "Memory Write and Invalidate"
60 * transactions"
61 *
62 * Latency Timer Register: implemented as read-only, as "A
63 * bridge that is not capable of a burst transfer of more than
64 * two data phases on its primary interface is permitted to
65 * hardwire the Latency Timer to a value of 16 or less"
66 *
67 * Header Type: always read-only
68 *
69 * BIST register: implemented as read-only, as "A bridge that
70 * does not support BIST must implement this register as a
71 * read-only register that returns 0 when read"
72 */
73 [PCI_CACHE_LINE_SIZE / 4] = { .ro = ~0 },
74
75 /*
76 * Base Address registers not used must be implemented as
77 * read-only registers that return 0 when read.
78 */
79 [PCI_BASE_ADDRESS_0 / 4] = { .ro = ~0 },
80 [PCI_BASE_ADDRESS_1 / 4] = { .ro = ~0 },
81
82 [PCI_PRIMARY_BUS / 4] = {
83 /* Primary, secondary and subordinate bus are RW */
84 .rw = GENMASK(24, 0),
85 /* Secondary latency is read-only */
86 .ro = GENMASK(31, 24),
87 },
88
89 [PCI_IO_BASE / 4] = {
90 /* The high four bits of I/O base/limit are RW */
91 .rw = (GENMASK(15, 12) | GENMASK(7, 4)),
92
93 /* The low four bits of I/O base/limit are RO */
94 .ro = (((PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK |
95 PCI_STATUS_DEVSEL_MASK) << 16) |
96 GENMASK(11, 8) | GENMASK(3, 0)),
97
98 .w1c = PCI_STATUS_ERROR_BITS << 16;
99
100 .rsvd = ((BIT(6) | GENMASK(4, 0)) << 16),
101 },
102
103 [PCI_MEMORY_BASE / 4] = {
104 /* The high 12-bits of mem base/limit are RW */
105 .rw = GENMASK(31, 20) | GENMASK(15, 4),
106
107 /* The low four bits of mem base/limit are RO */
108 .ro = GENMASK(19, 16) | GENMASK(3, 0),
109 },
110
111 [PCI_PREF_MEMORY_BASE / 4] = {
112 /* The high 12-bits of pref mem base/limit are RW */
113 .rw = GENMASK(31, 20) | GENMASK(15, 4),
114
115 /* The low four bits of pref mem base/limit are RO */
116 .ro = GENMASK(19, 16) | GENMASK(3, 0),
117 },
118
119 [PCI_PREF_BASE_UPPER32 / 4] = {
120 .rw = ~0,
121 },
122
123 [PCI_PREF_LIMIT_UPPER32 / 4] = {
124 .rw = ~0,
125 },
126
127 [PCI_IO_BASE_UPPER16 / 4] = {
128 .rw = ~0,
129 },
130
131 [PCI_CAPABILITY_LIST / 4] = {
132 .ro = GENMASK(7, 0),
133 .rsvd = GENMASK(31, 8),
134 },
135
136 [PCI_ROM_ADDRESS1 / 4] = {
137 .rw = GENMASK(31, 11) | BIT(0),
138 .rsvd = GENMASK(10, 1),
139 },
140
141 /*
142 * Interrupt line (bits 7:0) are RW, interrupt pin (bits 15:8)
143 * are RO, and bridge control (31:16) are a mix of RW, RO,
144 * reserved and W1C bits
145 */
146 [PCI_INTERRUPT_LINE / 4] = {
147 /* Interrupt line is RW */
148 .rw = (GENMASK(7, 0) |
149 ((PCI_BRIDGE_CTL_PARITY |
150 PCI_BRIDGE_CTL_SERR |
151 PCI_BRIDGE_CTL_ISA |
152 PCI_BRIDGE_CTL_VGA |
153 PCI_BRIDGE_CTL_MASTER_ABORT |
154 PCI_BRIDGE_CTL_BUS_RESET |
155 BIT(8) | BIT(9) | BIT(11)) << 16)),
156
157 /* Interrupt pin is RO */
158 .ro = (GENMASK(15, 8) | ((PCI_BRIDGE_CTL_FAST_BACK) << 16)),
159
160 .w1c = BIT(10) << 16,
161
162 .rsvd = (GENMASK(15, 12) | BIT(4)) << 16,
163 },
164 };
165
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0-DAY CI Kernel Test Service, Intel Corporation
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