Peter De Schrijver wrote at Friday, January 27, 2012 1:18 AM:
> On Thu, Jan 26, 2012 at 09:25:53PM +0100, Stephen Warren wrote:
> > Peter De Schrijver wrote at Thursday, January 26, 2012 10:07 AM:
> > > Prepare the Tegra secondary CPU core bringup code for other Tegra variants.
> > > The reset handler is also generalized to allow for future introduction of
> > > powersaving modes which turn off the CPU cores.
> >
> > > diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S
> >
> > > ENTRY(tegra_secondary_startup)
> > ...
> > > + enable_coresight r0
> >
> > > +ENTRY(__tegra_cpu_reset_handler)
> > > +
> > > +#if DEBUG_CPU_RESET_HANDLER
> > > + enable_coresight r0
> > > + b .
> > > +#endif
> >
> > I'm not sure why the macro call enable_coresight is ifdef'd in one place
> > but not the other... Should just the instruction "b ." be inside the
> > ifdef?
>
> This code path will also be used by LP2 and LP1 resume in the future, I'm not
> sure we should unconditionally enable Coresight in that case.
What I'm unclear on is why it's a good idea to unconditionally enable
coresight in tegra_secondary_startup if it's not a good idea to
unconditionally enable it in __tegra_cpu_reset_handler.
--
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