Hi,
Here is second attempt to introduce clocks management framework based on
kobjects. This attempt goes a bit further. I've removed the global
spinlock. All add/remove operations are guarded via built into clocks kset
spinlock. And all per-clock operations are guided by built-in atomic
counter variable. I can split it into counter and per-clock spinlock,
but I think it will be a waste of space.
Also as suggested by Andrew Morton, I've split the set_mode operation
back to enable/disable.
--
With best wishes
Dmitry
Provide a generic framework that platform may choose
to support clocks api. In particular this provides
platform-independant struct clk definition, a full
implementation of clocks api and a set of functions
for registering and unregistering clocks in a safe way.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
include/linux/clocklib.h | 91 +++++++++++++
lib/Kconfig | 3 +
lib/Makefile | 1 +
lib/clocklib.c | 318 ++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 413 insertions(+), 0 deletions(-)
create mode 100644 include/linux/clocklib.h
create mode 100644 lib/clocklib.c
diff --git a/include/linux/clocklib.h b/include/linux/clocklib.h
new file mode 100644
index 0000000..c1da052
--- /dev/null
+++ b/include/linux/clocklib.h
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2008 Dmitry Baryshkov
+ *
+ * This file is released under the GPL v2.
+ */
+#ifndef CLOCKLIB_H
+#define CLOCKLIB_H
+
+struct device;
+/*
+ * @kobj: kobject representing a clock
+ * @state: represents the state of the clock. it's -1, when the clock is locked otherwise it shows the "enable" counter
+ * @ops: a reference to implementation of operations for clock
+ * @release: deallocate all resources after last reference to this clock was removed
+ */
+struct clk {
+ const char *name;
+ struct kobject kobj;
+
+ atomic_t state;
+
+ const struct clk_ops *ops;
+ void (*release)(struct clk *clk);
+};
+
+/**
+ * struct clk_ops - generic clock management operations
+ * @can_get: checks whether passed device can get this clock
+ * @set_parent: reconfigures the clock to use specified parent
+ * @enable: enable specified clock.
+ * @disable: disable specified clock.
+ * @get_rate: obtain the current rate of a specified clock in Hz
+ * @round_rate: adjust a rate to the exact value a clock can provide and possibly apply it
+ *
+ * This structure specifies clock operations that are used to configure
+ * specific clock. All functions are called with spin lock held,
+ * so you can't do fancy things. However you can use helpers for accessing
+ * parent clocks.
+ *
+ * The enable, disable, get_rate and round_rate fields are mandatory.
+ *
+ * can_get is optional. It checks whether this particular "struct clk" is
+ * suitable for passed device. E.g. for the uniformity of the driver the
+ * PXA names all clocks "UARTCLK" and binds each of them to the particular
+ * UART device in the system. Some other platforms would like to compare
+ * the id of the device on the platform_bus with the value stored in the
+ * clock. To make this check generic, I've provided the possibility for
+ * each particular clock to define it's own way to be bound to devices.
+ */
+struct clk_ops {
+ int (*can_get)(struct clk *clk, struct device *dev);
+ int (*set_parent)(struct clk *clk, struct clk *parent);
+ int (*enable)(struct clk *clk);
+ void (*disable)(struct clk *clk);
+ unsigned long (*get_rate)(struct clk *clk);
+ long (*round_rate)(struct clk *clk, unsigned long hz, bool apply);
+};
+
+
+/*
+ * Add a clock to system. As the the struct clk embedds a kobject,
+ * in most cases you should allocate it dynamically. Allocate it
+ * from static space only if you know what you are doing.
+ */
+int clk_add(struct clk *parent, struct clk *clk);
+
+/*
+ * This unregisters the clock. However some other drivers can still
+ * reference the clk, so you have to take measures not to cause a BUG.
+ */
+void clk_unregister(struct clk *clk);
+
+
+/*
+ * Some useful helpers
+ */
+
+/*
+ * A simple clk wrapper and operations for it. This clock will be bound
+ * to the provided device.
+ */
+struct clk_devck {
+ struct clk clk;
+ const char *parent;
+ struct device *dev;
+};
+extern struct clk_ops clk_devck_ops;
+
+#endif
+
+
diff --git a/lib/Kconfig b/lib/Kconfig
index 8cc8e87..f50b04a 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -13,6 +13,9 @@ config GENERIC_FIND_FIRST_BIT
config GENERIC_FIND_NEXT_BIT
def_bool n
+config CLOCKLIB
+ tristate
+
config CRC_CCITT
tristate "CRC-CCITT functions"
help
diff --git a/lib/Makefile b/lib/Makefile
index 74b0cfb..c5b4cc3 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_PLIST) += plist.o
obj-$(CONFIG_DEBUG_PREEMPT) += smp_processor_id.o
obj-$(CONFIG_DEBUG_LIST) += list_debug.o
obj-$(CONFIG_DEBUG_OBJECTS) += debugobjects.o
+lib-$(CONFIG_CLOCKLIB) += clocklib.o
ifneq ($(CONFIG_HAVE_DEC_LOCK),y)
lib-y += dec_and_lock.o
diff --git a/lib/clocklib.c b/lib/clocklib.c
new file mode 100644
index 0000000..bb3859a
--- /dev/null
+++ b/lib/clocklib.c
@@ -0,0 +1,318 @@
+/*
+ * lib/clocklib.c
+ *
+ * Copyright (C) 2008 Dmitry Baryshkov
+ *
+ * Generic clocks API implementation
+ *
+ * This file is released under the GPL v2.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/clocklib.h>
+#include <linux/kobject.h>
+#include <linux/err.h>
+#include <linux/spinlock.h>
+#include <linux/clk.h>
+
+#include <linux/sched.h>
+#include <linux/wait.h>
+
+static void clk_release(struct kobject *kobj)
+{
+ struct clk *clk = container_of(kobj, struct clk, kobj);
+
+ BUG_ON(!clk->release);
+ clk->release(clk);
+}
+
+static ssize_t clk_state_show(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+ struct clk *clk = container_of(kobj, struct clk, kobj);
+ int val;
+
+ smp_mb();
+ val = atomic_read(&clk->state);
+
+ return snprintf(buf, PAGE_SIZE, "%d", val);
+}
+
+static struct kobj_attribute clk_state_attr =
+ __ATTR(state, 0444, clk_state_show, NULL);
+
+static ssize_t clk_rate_show(struct kobject *kobj,
+ struct kobj_attribute *attr,
+ char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%lu",
+ clk_get_rate(container_of(kobj, struct clk, kobj)));
+}
+
+static struct kobj_attribute clk_rate_attr =
+ __ATTR(rate, 0444, clk_rate_show, NULL);
+
+
+static struct attribute *clk_attrs[] = {
+ &clk_state_attr.attr,
+ &clk_rate_attr.attr,
+ NULL,
+};
+
+static struct kobj_type clk_ktype = {
+ .release = clk_release,
+ .sysfs_ops = &kobj_sysfs_ops,
+ .default_attrs = clk_attrs,
+};
+
+static struct kset *clks_kset;
+
+static int clk_sysfs_init(void)
+{
+ clks_kset = kset_create_and_add("clocks", NULL, kernel_kobj);
+
+ if (!clks_kset)
+ return -ENOMEM;
+
+ return 0;
+}
+core_initcall(clk_sysfs_init);
+
+int clk_add(struct clk *parent, struct clk *clk)
+{
+ BUG_ON(!clk->ops);
+ BUG_ON(!clk->release);
+ BUG_ON(!clk->name);
+
+ BUG_ON(!clk->ops->enable || !clk->ops->disable ||
+ !clk->ops->get_rate || !clk->ops->round_rate);
+
+ kobject_init(&clk->kobj, &clk_ktype);
+
+ clk->kobj.kset = clks_kset;
+
+ return kobject_add(&clk->kobj, parent? &parent->kobj : NULL,
+ "%s", clk->name);
+}
+
+void clk_unregister(struct clk *clk)
+{
+ kobject_del(&clk->kobj);
+ kobject_put(&clk->kobj);
+}
+
+struct clk *clk_get_parent(struct clk *clk)
+{
+ struct clk *parent;
+
+ spin_lock(&clks_kset->list_lock);
+
+ parent = clk->kobj.parent == &clks_kset->kobj ?
+ NULL :
+ container_of(kobject_get(clk->kobj.parent), struct clk, kobj);
+
+ spin_unlock(&clks_kset->list_lock);
+
+ return parent;
+}
+
+struct clk *clk_get(struct device *dev, const char *name)
+{
+ struct clk *clk = NULL;
+ struct clk *p;
+ struct kobject *k;
+
+ spin_lock(&clks_kset->list_lock);
+
+ list_for_each_entry(k, &clks_kset->list, entry) {
+ if (kobject_name(k) && !strcmp(kobject_name(k), name)
+ ) {
+ p = container_of(kobject_get(k), struct clk, kobj);
+ if (p->ops && p->ops->can_get &&
+ p->ops->can_get(p, dev)) {
+ clk = p;
+ break;
+ }
+ kobject_put(k);
+ }
+ }
+
+ list_for_each_entry(k, &clks_kset->list, entry) {
+ if (kobject_name(k) && !strcmp(kobject_name(k), name)
+ ) {
+ p = container_of(kobject_get(k), struct clk, kobj);
+ if (!p->ops || !p->ops->can_get) {
+ clk = p;
+ break;
+ }
+ kobject_put(k);
+ break;
+ }
+ }
+
+ spin_unlock(&clks_kset->list_lock);
+
+ return clk;
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+ kobject_put(&clk->kobj);
+}
+EXPORT_SYMBOL(clk_put);
+
+static DECLARE_WAIT_QUEUE_HEAD(clks_enable);
+
+static int __clk_get(struct clk *clk)
+{
+ int rc = 0;
+ int state;
+
+ /* FIXME: handle the case if we are in atomic context */
+ rc = wait_event_interruptible(clks_enable,
+ (state = atomic_xchg(&clk->state, -1)) >= 0);
+ if (rc < 0)
+ return rc;
+
+ return state;
+}
+
+static void __clk_put(struct clk *clk, int state)
+{
+ atomic_xchg(&clk->state, state);
+
+ wake_up(&clks_enable);
+}
+
+int clk_enable(struct clk *clk)
+{
+ int rc = 0;
+ int state = __clk_get(clk);
+
+ if (state < 0)
+ return state;
+ else if (state == 0)
+ rc = clk->ops->enable(clk);
+
+ __clk_put(clk, state + 1);
+
+ return rc;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+ int state = __clk_get(clk);
+
+ if (state < 0)
+ return;
+
+ if (state == 1)
+ clk->ops->disable(clk);
+
+ __clk_put(clk, state - 1);
+
+ return;
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+ int state = __clk_get(clk);
+ unsigned long hz;
+
+ if (state < 0)
+ return 0;
+
+ hz = clk->ops->get_rate(clk);
+
+ __clk_put(clk, state);
+
+ return hz;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+int clk_set_rate(struct clk *clk, unsigned long hz)
+{
+ int rc;
+ int state = __clk_get(clk);
+
+ if (state < 0)
+ return state;
+
+ rc = clk->ops->round_rate(clk, hz, true);
+
+ __clk_put(clk, state);
+
+ return rc < 0 ? rc : 0;
+}
+EXPORT_SYMBOL(clk_set_rate);
+
+long clk_round_rate(struct clk *clk, unsigned long hz)
+{
+ long rc;
+ int state = __clk_get(clk);
+
+ if (state < 0)
+ return state;
+
+ rc = clk->ops->round_rate(clk, hz, false);
+
+ __clk_put(clk, state);
+
+ return rc;
+}
+EXPORT_SYMBOL(clk_round_rate);
+
+/*
+ * Some usefull helpers
+ */
+static inline int clk_enable_parent(struct clk *clk)
+{
+ struct clk *parent = clk_get_parent(clk);
+ int rc = clk_enable(parent);
+ clk_put(parent);
+ return rc;
+}
+
+static inline void clk_disable_parent(struct clk *clk)
+{
+ struct clk *parent = clk_get_parent(clk);
+ clk_disable(parent);
+ clk_put(parent);
+}
+
+static inline unsigned long clk_get_rate_parent(struct clk *clk)
+{
+ struct clk *parent = clk_get_parent(clk);
+ unsigned long rc = clk_get_rate(parent);
+ clk_put(parent);
+ return rc;
+}
+
+static inline long clk_round_rate_parent(struct clk *clk, unsigned long hz, bool apply)
+{
+ struct clk *parent = clk_get_parent(clk);
+ long rc = apply ? clk_set_rate(parent, hz) : clk_round_rate(parent, hz);
+ clk_put(parent);
+ return rc;
+}
+
+static inline int clk_devck_can_get(struct clk *clk, struct device *dev)
+{
+ struct clk_devck *dc = container_of(clk, struct clk_devck, clk);
+
+ return dc->dev == dev;
+}
+
+struct clk_ops clk_devck_ops = {
+ .can_get = clk_devck_can_get,
+ .enable = clk_enable_parent,
+ .disable = clk_disable_parent,
+ .get_rate = clk_get_rate_parent,
+ .round_rate = clk_round_rate_parent,
+};
+EXPORT_SYMBOL(clk_devck_ops);
+
--
1.5.5.1
--
With best wishes
Dmitry
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-sa1100/clock.c | 117 ++++++++----------------------------------
2 files changed, 22 insertions(+), 96 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b786e68..9d93017 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -424,6 +424,7 @@ config ARCH_SA1100
select GENERIC_CLOCKEVENTS
select TICK_ONESHOT
select HAVE_GPIO_LIB
+ select CLOCKLIB
help
Support for StrongARM 11x0 based boards.
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index fc97fe5..862d384 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -3,88 +3,13 @@
*/
#include <linux/module.h>
#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
#include <linux/err.h>
-#include <linux/string.h>
#include <linux/clk.h>
-#include <linux/spinlock.h>
-#include <linux/mutex.h>
+#include <linux/clocklib.h>
#include <asm/hardware.h>
-/*
- * Very simple clock implementation - we only have one clock to
- * deal with at the moment, so we only match using the "name".
- */
-struct clk {
- struct list_head node;
- unsigned long rate;
- const char *name;
- unsigned int enabled;
- void (*enable)(void);
- void (*disable)(void);
-};
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-static DEFINE_SPINLOCK(clocks_lock);
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- struct clk *p, *clk = ERR_PTR(-ENOENT);
-
- mutex_lock(&clocks_mutex);
- list_for_each_entry(p, &clocks, node) {
- if (strcmp(id, p->name) == 0) {
- clk = p;
- break;
- }
- }
- mutex_unlock(&clocks_mutex);
-
- return clk;
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
-
-int clk_enable(struct clk *clk)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&clocks_lock, flags);
- if (clk->enabled++ == 0)
- clk->enable();
- spin_unlock_irqrestore(&clocks_lock, flags);
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
- unsigned long flags;
-
- WARN_ON(clk->enabled == 0);
-
- spin_lock_irqsave(&clocks_lock, flags);
- if (--clk->enabled == 0)
- clk->disable();
- spin_unlock_irqrestore(&clocks_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- return clk->rate;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-
-static void clk_gpio27_enable(void)
+static int clk_gpio27_enable(struct clk *clk)
{
/*
* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@@ -93,42 +18,42 @@ static void clk_gpio27_enable(void)
GAFR |= GPIO_32_768kHz;
GPDR |= GPIO_32_768kHz;
TUCR = TUCR_3_6864MHz;
+
+ return 0;
}
-static void clk_gpio27_disable(void)
+static void clk_gpio27_disable(struct clk *clk)
{
TUCR = 0;
GPDR &= ~GPIO_32_768kHz;
GAFR &= ~GPIO_32_768kHz;
}
-static struct clk clk_gpio27 = {
- .name = "GPIO27_CLK",
- .rate = 3686400,
+static unsigned long clk_gpio27_get_rate(struct clk *clk)
+{
+ return 3686400;
+}
+
+static const struct clk_ops clk_gpio27_ops = {
.enable = clk_gpio27_enable,
.disable = clk_gpio27_disable,
+ .get_rate = clk_gpio27_get_rate,
};
-int clk_register(struct clk *clk)
+static void clk_static_release(struct clk *clk)
{
- mutex_lock(&clocks_mutex);
- list_add(&clk->node, &clocks);
- mutex_unlock(&clocks_mutex);
- return 0;
+ printk(KERN_ERR "Can't release static clock: %s!!!\n", clk->name);
+ BUG();
}
-EXPORT_SYMBOL(clk_register);
-void clk_unregister(struct clk *clk)
-{
- mutex_lock(&clocks_mutex);
- list_del(&clk->node);
- mutex_unlock(&clocks_mutex);
-}
-EXPORT_SYMBOL(clk_unregister);
+static struct clk clk_gpio27 = {
+ .name = "GPIO27_CLK",
+ .ops = &clk_gpio27_ops,
+ .release = clk_static_release,
+};
static int __init clk_init(void)
{
- clk_register(&clk_gpio27);
- return 0;
+ return clk_add(NULL, &clk_gpio27);
}
arch_initcall(clk_init);
--
1.5.5.1
--
With best wishes
Dmitry
Make PXA use clocklib for clocks support.
Signed-off-by: Dmitry Baryshkov <[email protected]>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-pxa/clock.c | 135 +++++++++++------------------------------
arch/arm/mach-pxa/clock.h | 92 +++++++++++++++++++----------
arch/arm/mach-pxa/pxa25x.c | 68 +++++++++++++--------
arch/arm/mach-pxa/pxa27x.c | 75 ++++++++++++++---------
arch/arm/mach-pxa/pxa3xx.c | 144 ++++++++++++++++++++++++++++----------------
6 files changed, 275 insertions(+), 240 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9d93017..8f02e29 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -397,6 +397,7 @@ config ARCH_PXA
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select TICK_ONESHOT
+ select CLOCKLIB
help
Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index e97dc59..d9e7eba 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -8,6 +8,7 @@
#include <linux/err.h>
#include <linux/string.h>
#include <linux/clk.h>
+#include <linux/clocklib.h>
#include <linux/spinlock.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
@@ -20,135 +21,71 @@
#include "generic.h"
#include "clock.h"
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-static DEFINE_SPINLOCK(clocks_lock);
-
-static struct clk *clk_lookup(struct device *dev, const char *id)
+static int clk_gpio11_enable(struct clk *clk)
{
- struct clk *p;
-
- list_for_each_entry(p, &clocks, node)
- if (strcmp(id, p->name) == 0 && p->dev == dev)
- return p;
-
- return NULL;
+ pxa_gpio_mode(GPIO11_3_6MHz_MD);
+ return 0;
}
-struct clk *clk_get(struct device *dev, const char *id)
+static void clk_gpio11_disable(struct clk *clk)
{
- struct clk *p, *clk = ERR_PTR(-ENOENT);
-
- mutex_lock(&clocks_mutex);
- p = clk_lookup(dev, id);
- if (!p)
- p = clk_lookup(NULL, id);
- if (p)
- clk = p;
- mutex_unlock(&clocks_mutex);
-
- return clk;
+ /* do nothing */
}
-EXPORT_SYMBOL(clk_get);
-void clk_put(struct clk *clk)
+static unsigned long clk_gpio11_get_rate(struct clk *clk)
{
+ return 3686400;
}
-EXPORT_SYMBOL(clk_put);
-
-int clk_enable(struct clk *clk)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&clocks_lock, flags);
- if (clk->enabled++ == 0)
- clk->ops->enable(clk);
- spin_unlock_irqrestore(&clocks_lock, flags);
- if (clk->delay)
- udelay(clk->delay);
+static const struct clk_ops clk_gpio11_ops = {
+ .enable = clk_gpio11_enable,
+ .disable = clk_gpio11_disable,
+ .get_rate = clk_gpio11_get_rate,
+ .round_rate = clk_no_round_rate,
+};
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
+static struct clk clk_gpio11 = {
+ .name = "GPIO27_CLK",
+ .ops = &clk_gpio11_ops,
+ .release = clk_static_release,
+};
-void clk_disable(struct clk *clk)
+int clk_cken_enable(struct clk *clk)
{
- unsigned long flags;
+ struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
- WARN_ON(clk->enabled == 0);
+ CKEN |= 1 << priv->cken;
- spin_lock_irqsave(&clocks_lock, flags);
- if (--clk->enabled == 0)
- clk->ops->disable(clk);
- spin_unlock_irqrestore(&clocks_lock, flags);
-}
-EXPORT_SYMBOL(clk_disable);
+ if (priv->delay)
+ udelay(priv->delay);
-unsigned long clk_get_rate(struct clk *clk)
-{
- unsigned long rate;
-
- rate = clk->rate;
- if (clk->ops->getrate)
- rate = clk->ops->getrate(clk);
-
- return rate;
+ return 0;
}
-EXPORT_SYMBOL(clk_get_rate);
-
-static void clk_gpio27_enable(struct clk *clk)
+void clk_cken_disable(struct clk *clk)
{
- pxa_gpio_mode(GPIO11_3_6MHz_MD);
-}
+ struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
-static void clk_gpio27_disable(struct clk *clk)
-{
+ CKEN &= ~(1 << priv->cken);
}
-static const struct clkops clk_gpio27_ops = {
- .enable = clk_gpio27_enable,
- .disable = clk_gpio27_disable,
-};
-
-
-void clk_cken_enable(struct clk *clk)
+unsigned long clk_cken_get_rate(struct clk *clk)
{
- CKEN |= 1 << clk->cken;
-}
+ struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
+
+ return priv->rate;
-void clk_cken_disable(struct clk *clk)
-{
- CKEN &= ~(1 << clk->cken);
}
-const struct clkops clk_cken_ops = {
+const struct clk_ops clk_cken_ops = {
.enable = clk_cken_enable,
.disable = clk_cken_disable,
+ .get_rate = clk_cken_get_rate,
+ .round_rate = clk_no_round_rate,
};
-static struct clk common_clks[] = {
- {
- .name = "GPIO27_CLK",
- .ops = &clk_gpio27_ops,
- .rate = 3686400,
- },
-};
-
-void clks_register(struct clk *clks, size_t num)
-{
- int i;
-
- mutex_lock(&clocks_mutex);
- for (i = 0; i < num; i++)
- list_add(&clks[i].node, &clocks);
- mutex_unlock(&clocks_mutex);
-}
-
static int __init clk_init(void)
{
- clks_register(common_clks, ARRAY_SIZE(common_clks));
- return 0;
+ return clk_add(NULL, &clk_gpio11);
}
arch_initcall(clk_init);
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index bc6b77e..599b553 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -1,43 +1,73 @@
-struct clk;
+#include <linux/clk.h>
+#include <linux/clocklib.h>
-struct clkops {
- void (*enable)(struct clk *);
- void (*disable)(struct clk *);
- unsigned long (*getrate)(struct clk *);
-};
-
-struct clk {
- struct list_head node;
- const char *name;
- struct device *dev;
- const struct clkops *ops;
+struct clk_cken {
+ struct clk clk;
unsigned long rate;
unsigned int cken;
unsigned int delay;
- unsigned int enabled;
};
-#define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \
- { \
- .name = _name, \
- .dev = _dev, \
- .ops = &clk_cken_ops, \
- .rate = _rate, \
- .cken = CKEN_##_cken, \
- .delay = _delay, \
- }
+int clk_cken_enable(struct clk *clk);
+void clk_cken_disable(struct clk *clk);
+unsigned long clk_cken_get_rate(struct clk *clk);
+
+extern const struct clk_ops clk_cken_ops;
-#define INIT_CK(_name, _cken, _ops, _dev) \
+static inline void clk_static_release(struct clk *clk)
+{
+ printk(KERN_ERR "Can't release static clock: %s!!!\n", clk->name);
+ BUG();
+}
+
+static inline long clk_no_round_rate(struct clk *clk,
+ unsigned long hz, bool apply)
+{
+ return clk->ops->get_rate(clk);
+}
+
+#define INIT_CKEN(_name, _cken, _rate, _delay) \
+ &(struct clk_cken) { \
+ .clk.name = _name, \
+ .clk.ops = &clk_cken_ops, \
+ .clk.release = clk_static_release, \
+ .cken = CKEN_##_cken, \
+ .rate = _rate, \
+ .delay = _delay, \
+ } .clk
+
+#define INIT_CK(_name, _cken, _ops) \
+ &(struct clk_cken) { \
+ .clk.name = _name, \
+ .clk.ops = _ops, \
+ .clk.release = clk_static_release, \
+ .cken = CKEN_##_cken, \
+ } .clk
+
+#define INIT_DEVCK(_parent_name, _name, _dev) \
{ \
- .name = _name, \
- .dev = _dev, \
- .ops = _ops, \
- .cken = CKEN_##_cken, \
+ .clk.name = _name, \
+ .clk.ops = &clk_devck_ops, \
+ .clk.release = clk_static_release, \
+ .parent = _parent_name, \
+ .dev = _dev, \
}
-extern const struct clkops clk_cken_ops;
-void clk_cken_enable(struct clk *clk);
-void clk_cken_disable(struct clk *clk);
+static inline void clks_register(struct clk *parent,
+ struct clk **clks, int size)
+{
+ int i;
+ for (i = 0; i < size; i++)
+ clk_add(parent, clks[i]);
+}
-void clks_register(struct clk *clks, size_t num);
+static inline void clks_devck_register(struct clk_devck *clks, int size)
+{
+ int i;
+ for (i = 0; i < size; i++) {
+ struct clk *parent = clk_get(NULL, clks[i].parent);
+ if (parent)
+ clk_add(parent, &clks[i].clk);
+ }
+}
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index e5b417d..b00a8b9 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -102,10 +102,10 @@ static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
return pxa25x_get_memclk_frequency_10khz() * 10000;
}
-static const struct clkops clk_pxa25x_lcd_ops = {
+static const struct clk_ops clk_pxa25x_lcd_ops = {
.enable = clk_cken_enable,
.disable = clk_cken_disable,
- .getrate = clk_pxa25x_lcd_getrate,
+ .get_rate = clk_pxa25x_lcd_getrate,
};
/*
@@ -113,31 +113,42 @@ static const struct clkops clk_pxa25x_lcd_ops = {
* 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
* 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
*/
-static struct clk pxa25x_hwuart_clk =
- INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
-;
-
-static struct clk pxa25x_clks[] = {
- INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev),
- INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev),
- INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
- INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
- INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev),
- INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
- INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
-
- INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev),
- INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev),
- INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev),
-
- INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL),
+static struct clk *pxa25x_hwuart_clk =
+ INIT_CKEN("HWUARTCLK", HWUART, 14745600, 1);
+static struct clk_devck pxa25x_hwuart_devclk =
+ INIT_DEVCK("HWUARTCLK", "UARTCLK", &pxa_device_hwuart.dev);
+
+static struct clk *pxa25x_clks[] = {
+ INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops), /* &pxa_device_fb.dev */
+ INIT_CKEN("FFUARTCLK", FFUART, 14745600, 1),
+ INIT_CKEN("BTUARTCLK", BTUART, 14745600, 1),
+ INIT_CKEN("STUARTCLK", STUART, 14745600, 1),
+ INIT_CKEN("UDCCLK", USB, 47923000, 5), /* &pxa_device_udc.dev */
+ INIT_CKEN("MMCCLK", MMC, 19169000, 0), /* &pxa_device_mci.dev */
+ INIT_CKEN("I2CCLK", I2C, 31949000, 0), /* &pxa_device_i2c.dev */
+
+ INIT_CKEN("SSP_CLK", SSP, 3686400, 0),
+ INIT_CKEN("NSSPCLK", NSSP, 3686400, 0),
+ INIT_CKEN("ASSPCLK", ASSP, 3686400, 0),
+
+ INIT_CKEN("AC97CLK", AC97, 24576000, 0),
/*
- INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL),
- INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL),
- INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL),
+ INIT_CKEN("PWMCLK", PWM0, 3686400, 0),
+ INIT_CKEN("PWMCLK", PWM0, 3686400, 0),
+ INIT_CKEN("I2SCLK", I2S, 14745600, 0),
*/
- INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
+ INIT_CKEN("FICPCLK", FICP, 47923000, 0),
+};
+
+static struct clk_devck clk_children[] = {
+ INIT_DEVCK("FFUARTCLK", "UARTCLK", &pxa_device_ffuart.dev),
+ INIT_DEVCK("BTUARTCLK", "UARTCLK", &pxa_device_btuart.dev),
+ INIT_DEVCK("STUARTCLK", "UARTCLK", &pxa_device_stuart.dev),
+
+ INIT_DEVCK("SSP_CLK", "SSPCLK", &pxa25x_device_ssp.dev),
+ INIT_DEVCK("NSSPCLK", "SSPCLK", &pxa25x_device_nssp.dev),
+ INIT_DEVCK("ASSPCLK", "SSPCLK", &pxa25x_device_assp.dev),
};
#ifdef CONFIG_PM
@@ -284,11 +295,14 @@ static int __init pxa25x_init(void)
int i, ret = 0;
/* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
- if (cpu_is_pxa25x())
- clks_register(&pxa25x_hwuart_clk, 1);
+ if (cpu_is_pxa25x()) {
+ clk_add(NULL, pxa25x_hwuart_clk);
+ clk_add(pxa25x_hwuart_clk, &pxa25x_hwuart_devclk.clk);
+ }
if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
- clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
+ clks_register(NULL, pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
+ clks_devck_register(ARRAY_AND_SIZE(clk_children));
if ((ret = pxa_init_dma(16)))
return ret;
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 7e94583..6e13e78 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -45,7 +45,7 @@ unsigned int pxa27x_get_clk_frequency_khz(int info)
{
unsigned long ccsr, clkcfg;
unsigned int l, L, m, M, n2, N, S;
- int cccr_a, t, ht, b;
+ int cccr_a, t, ht, b;
ccsr = CCSR;
cccr_a = CCCR & (1 << 25);
@@ -88,7 +88,7 @@ unsigned int pxa27x_get_memclk_frequency_10khz(void)
{
unsigned long ccsr, clkcfg;
unsigned int l, L, m, M;
- int cccr_a, b;
+ int cccr_a, b;
ccsr = CCSR;
cccr_a = CCCR & (1 << 25);
@@ -130,47 +130,61 @@ static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
return pxa27x_get_lcdclk_frequency_10khz() * 10000;
}
-static const struct clkops clk_pxa27x_lcd_ops = {
+static const struct clk_ops clk_pxa27x_lcd_ops = {
.enable = clk_cken_enable,
.disable = clk_cken_disable,
- .getrate = clk_pxa27x_lcd_getrate,
+ .get_rate = clk_pxa27x_lcd_getrate,
+ .round_rate = clk_no_round_rate,
};
-static struct clk pxa27x_clks[] = {
- INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops, &pxa_device_fb.dev),
- INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL),
+static struct clk *pxa27x_clks[] = {
+ INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops), /* &pxa_device_fb.dev */
+ INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops),
- INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
- INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
- INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
+ INIT_CKEN("FFUARTCLK", FFUART, 14857000, 1),
+ INIT_CKEN("BTUARTCLK", BTUART, 14857000, 1),
+ INIT_CKEN("STUARTCLK", STUART, 14857000, 1),
- INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev),
- INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
- INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa_device_udc.dev),
- INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev),
- INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
+ INIT_CKEN("I2SCLK", I2S, 14682000, 0), /* &pxa_device_i2s.dev */
+ INIT_CKEN("I2C_CLK", I2C, 32842000, 0),
+ INIT_CKEN("UDCCLK", USB, 48000000, 5), /* &pxa_device_udc.dev */
+ INIT_CKEN("MMCCLK", MMC, 19500000, 0), /* &pxa_device_mci.dev */
+ INIT_CKEN("FICPCLK", FICP, 48000000, 0), /* &pxa_device_ficp.dev */
- INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev),
- INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev),
- INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
+ INIT_CKEN("USBCLK", USBHOST, 48000000, 0), /* &pxa27x_device_ohci.dev */
+ INIT_CKEN("PWRI2CCLK", PWRI2C, 13000000, 0),
+ INIT_CKEN("KBDCLK", KEYPAD, 32768, 0), /* &pxa27x_device_keypad.dev */
- INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
- INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
- INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
+ INIT_CKEN("SSP1CLK", SSP1, 13000000, 0),
+ INIT_CKEN("SSP2CLK", SSP2, 13000000, 0),
+ INIT_CKEN("SSP3CLK", SSP3, 13000000, 0),
- INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL),
- INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL),
+ INIT_CKEN("AC97CLK", AC97, 24576000, 0),
+ INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0),
/*
- INIT_CKEN("PWMCLK", PWM0, 13000000, 0, NULL),
- INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL),
- INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL),
- INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL),
- INIT_CKEN("IMCLK", IM, 0, 0, NULL),
- INIT_CKEN("MEMCLK", MEMC, 0, 0, NULL),
+ INIT_CKEN("PWMCLK", PWM0, 13000000, 0),
+ INIT_CKEN("MSLCLK", MSL, 48000000, 0),
+ INIT_CKEN("USIMCLK", USIM, 48000000, 0),
+ INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0),
+ INIT_CKEN("IMCLK", IM, 0, 0),
+ INIT_CKEN("MEMCLK", MEMC, 0, 0),
*/
};
+static struct clk_devck clk_children[] = {
+ INIT_DEVCK("FFUARTCLK", "UARTCLK", &pxa_device_ffuart.dev),
+ INIT_DEVCK("BTUARTCLK", "UARTCLK", &pxa_device_btuart.dev),
+ INIT_DEVCK("STUARTCLK", "UARTCLK", &pxa_device_stuart.dev),
+
+ INIT_DEVCK("I2C_CLK", "I2CCLK", &pxa_device_i2c.dev),
+ INIT_DEVCK("PWRI2CCLK", "I2CCLK", &pxa27x_device_i2c_power.dev),
+
+ INIT_DEVCK("SSP1CLK", "SSPCLK", &pxa27x_device_ssp1.dev),
+ INIT_DEVCK("SSP2CLK", "SSPCLK", &pxa27x_device_ssp2.dev),
+ INIT_DEVCK("SSP3CLK", "SSPCLK", &pxa27x_device_ssp3.dev),
+};
+
#ifdef CONFIG_PM
#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
@@ -378,7 +392,8 @@ static int __init pxa27x_init(void)
int i, ret = 0;
if (cpu_is_pxa27x()) {
- clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
+ clks_register(NULL, ARRAY_AND_SIZE(pxa27x_clks));
+ clks_devck_register(ARRAY_AND_SIZE(clk_children));
if ((ret = pxa_init_dma(32)))
return ret;
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 644550b..efea4cd 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -21,6 +21,7 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/sysdev.h>
+#include <linux/delay.h>
#include <asm/hardware.h>
#include <asm/arch/pxa3xx-regs.h>
@@ -144,46 +145,61 @@ static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
return hsio_clk;
}
-static void clk_pxa3xx_cken_enable(struct clk *clk)
+static int clk_pxa3xx_cken_enable(struct clk *clk)
{
- unsigned long mask = 1ul << (clk->cken & 0x1f);
+ struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
+ unsigned long mask = 1ul << (priv->cken & 0x1f);
- if (clk->cken < 32)
+ if (priv->cken < 32)
CKENA |= mask;
else
CKENB |= mask;
+
+ if (priv->delay)
+ udelay(priv->delay);
+
+ return 0;
}
static void clk_pxa3xx_cken_disable(struct clk *clk)
{
- unsigned long mask = 1ul << (clk->cken & 0x1f);
+ struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
+ unsigned long mask = 1ul << (priv->cken & 0x1f);
- if (clk->cken < 32)
+ if (priv->cken < 32)
CKENA &= ~mask;
else
CKENB &= ~mask;
}
-static const struct clkops clk_pxa3xx_cken_ops = {
+static const struct clk_ops clk_pxa3xx_cken_ops = {
.enable = clk_pxa3xx_cken_enable,
.disable = clk_pxa3xx_cken_disable,
+ .round_rate = clk_no_round_rate,
+ .get_rate = clk_cken_get_rate,
};
-static const struct clkops clk_pxa3xx_hsio_ops = {
+static const struct clk_ops clk_pxa3xx_hsio_ops = {
.enable = clk_pxa3xx_cken_enable,
.disable = clk_pxa3xx_cken_disable,
- .getrate = clk_pxa3xx_hsio_getrate,
+ .round_rate = clk_no_round_rate,
+ .get_rate = clk_pxa3xx_hsio_getrate,
};
-static const struct clkops clk_pxa3xx_ac97_ops = {
+static const struct clk_ops clk_pxa3xx_ac97_ops = {
.enable = clk_pxa3xx_cken_enable,
.disable = clk_pxa3xx_cken_disable,
- .getrate = clk_pxa3xx_ac97_getrate,
+ .round_rate = clk_no_round_rate,
+ .get_rate = clk_pxa3xx_ac97_getrate,
};
-static void clk_pout_enable(struct clk *clk)
+static int clk_pout_enable(struct clk *clk)
{
- OSCC |= OSCC_PEN;
+ OSCC &= ~OSCC_PEN;
+
+ udelay(70);
+
+ return 0;
}
static void clk_pout_disable(struct clk *clk)
@@ -191,58 +207,79 @@ static void clk_pout_disable(struct clk *clk)
OSCC &= ~OSCC_PEN;
}
-static const struct clkops clk_pout_ops = {
+static unsigned long clk_pout_get_rate(struct clk *clk)
+{
+ return 13000000;
+}
+
+static const struct clk_ops clk_pout_ops = {
.enable = clk_pout_enable,
.disable = clk_pout_disable,
+ .round_rate = clk_no_round_rate,
+ .get_rate = clk_pout_get_rate,
};
-#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
- { \
- .name = _name, \
- .dev = _dev, \
- .ops = &clk_pxa3xx_cken_ops, \
- .rate = _rate, \
- .cken = CKEN_##_cken, \
- .delay = _delay, \
- }
-
-#define PXA3xx_CK(_name, _cken, _ops, _dev) \
- { \
- .name = _name, \
- .dev = _dev, \
- .ops = _ops, \
- .cken = CKEN_##_cken, \
- }
-
-static struct clk pxa3xx_clks[] = {
- {
+#define PXA3xx_CKEN(_name, _cken, _rate, _delay) \
+ &(struct clk_cken) { \
+ .clk.name = _name, \
+ .clk.ops = &clk_pxa3xx_cken_ops, \
+ .clk.release = clk_static_release, \
+ .cken = CKEN_##_cken, \
+ .rate = _rate, \
+ .delay = _delay, \
+ }.clk
+
+#define PXA3xx_CK(_name, _cken, _ops) \
+ &(struct clk_cken) { \
+ .clk.name = _name, \
+ .clk.ops = _ops, \
+ .clk.release = clk_static_release, \
+ .cken = CKEN_##_cken, \
+ }.clk
+
+static struct clk *pxa3xx_clks[] = {
+ &(struct clk) {
.name = "CLK_POUT",
.ops = &clk_pout_ops,
- .rate = 13000000,
- .delay = 70,
+ .release = clk_static_release,
},
- PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
- PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
- PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL),
+ PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops), /* &pxa_device_fb.dev */
+ PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops),
+ PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops),
- PXA3xx_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
- PXA3xx_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
- PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
+ PXA3xx_CKEN("FFUARTCLK", FFUART, 14857000, 1),
+ PXA3xx_CKEN("BTUARTCLK", BTUART, 14857000, 1),
+ PXA3xx_CKEN("STUARTCLK", STUART, 14857000, 1),
+
+ PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0), /* &pxa_device_i2c.dev */
+ PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5), /* &pxa_device_udc.dev */
+ PXA3xx_CKEN("USBCLK", USBH, 48000000, 0), /* &pxa27x_device_ohci.dev */
+ PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0), /* &pxa27x_device_keypad.dev */
+
+ PXA3xx_CKEN("SSP1CLK", SSP1, 13000000, 0),
+ PXA3xx_CKEN("SSP2CLK", SSP2, 13000000, 0), /* &pxa27x_device_ssp2.dev */
+ PXA3xx_CKEN("SSP3CLK", SSP3, 13000000, 0), /* &pxa27x_device_ssp3.dev */
+ PXA3xx_CKEN("SSP4CLK", SSP4, 13000000, 0), /* &pxa3xx_device_ssp4.dev */
+
+ PXA3xx_CKEN("MMC1CLK", MMC1, 19500000, 0),
+ PXA3xx_CKEN("MMC2CLK", MMC2, 19500000, 0),
+ PXA3xx_CKEN("MMC3CLK", MMC3, 19500000, 0),
+};
- PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
- PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev),
- PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev),
- PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
+static struct clk_devck clk_children[] = {
+ INIT_DEVCK("FFUARTCLK", "UARTCLK", &pxa_device_ffuart.dev),
+ INIT_DEVCK("BTUARTCLK", "UARTCLK", &pxa_device_btuart.dev),
+ INIT_DEVCK("STUARTCLK", "UARTCLK", &pxa_device_stuart.dev),
- PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
- PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
- PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
- PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
+ INIT_DEVCK("SSP1CLK", "SSPCLK", &pxa27x_device_ssp1.dev),
+ INIT_DEVCK("SSP2CLK", "SSPCLK", &pxa27x_device_ssp2.dev),
+ INIT_DEVCK("SSP3CLK", "SSPCLK", &pxa27x_device_ssp3.dev),
+ INIT_DEVCK("SSP4CLK", "SSPCLK", &pxa3xx_device_ssp4.dev),
- PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
- PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
- PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
+ INIT_DEVCK("MMC1CLK", "MMCCLK", &pxa_device_mci.dev),
+ INIT_DEVCK("MMC2CLK", "MMCCLK", &pxa3xx_device_mci2.dev),
+ INIT_DEVCK("MMC3CLK", "MMCCLK", &pxa3xx_device_mci3.dev),
};
#ifdef CONFIG_PM
@@ -555,7 +592,8 @@ static int __init pxa3xx_init(void)
*/
ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
- clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks));
+ clks_register(NULL, ARRAY_AND_SIZE(pxa3xx_clks));
+ clks_devck_register(ARRAY_AND_SIZE(clk_children));
if ((ret = pxa_init_dma(32)))
return ret;
--
1.5.5.1
--
With best wishes
Dmitry
On Sun, Jun 8, 2008 at 11:22 AM, Dmitry Baryshkov <[email protected]> wrote:
> Make PXA use clocklib for clocks support.
>
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
> arch/arm/Kconfig | 1 +
> arch/arm/mach-pxa/clock.c | 135 +++++++++++------------------------------
> arch/arm/mach-pxa/clock.h | 92 +++++++++++++++++++----------
> arch/arm/mach-pxa/pxa25x.c | 68 +++++++++++++--------
> arch/arm/mach-pxa/pxa27x.c | 75 ++++++++++++++---------
> arch/arm/mach-pxa/pxa3xx.c | 144 ++++++++++++++++++++++++++++----------------
> 6 files changed, 275 insertions(+), 240 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 9d93017..8f02e29 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -397,6 +397,7 @@ config ARCH_PXA
> select GENERIC_TIME
> select GENERIC_CLOCKEVENTS
> select TICK_ONESHOT
> + select CLOCKLIB
> help
> Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
>
> diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
> index e97dc59..d9e7eba 100644
> --- a/arch/arm/mach-pxa/clock.c
> +++ b/arch/arm/mach-pxa/clock.c
> @@ -8,6 +8,7 @@
> #include <linux/err.h>
> #include <linux/string.h>
> #include <linux/clk.h>
> +#include <linux/clocklib.h>
> #include <linux/spinlock.h>
> #include <linux/platform_device.h>
> #include <linux/delay.h>
> @@ -20,135 +21,71 @@
> #include "generic.h"
> #include "clock.h"
>
> -static LIST_HEAD(clocks);
> -static DEFINE_MUTEX(clocks_mutex);
> -static DEFINE_SPINLOCK(clocks_lock);
> -
> -static struct clk *clk_lookup(struct device *dev, const char *id)
> +static int clk_gpio11_enable(struct clk *clk)
> {
> - struct clk *p;
> -
> - list_for_each_entry(p, &clocks, node)
> - if (strcmp(id, p->name) == 0 && p->dev == dev)
> - return p;
> -
> - return NULL;
> + pxa_gpio_mode(GPIO11_3_6MHz_MD);
I think pxa2xx_mfp_config should be used here for consistency.
> + return 0;
> }
>
> -struct clk *clk_get(struct device *dev, const char *id)
> +static void clk_gpio11_disable(struct clk *clk)
> {
> - struct clk *p, *clk = ERR_PTR(-ENOENT);
> -
> - mutex_lock(&clocks_mutex);
> - p = clk_lookup(dev, id);
> - if (!p)
> - p = clk_lookup(NULL, id);
> - if (p)
> - clk = p;
> - mutex_unlock(&clocks_mutex);
> -
> - return clk;
> + /* do nothing */
> }
> -EXPORT_SYMBOL(clk_get);
>
> -void clk_put(struct clk *clk)
> +static unsigned long clk_gpio11_get_rate(struct clk *clk)
> {
> + return 3686400;
> }
> -EXPORT_SYMBOL(clk_put);
> -
> -int clk_enable(struct clk *clk)
> -{
> - unsigned long flags;
> -
> - spin_lock_irqsave(&clocks_lock, flags);
> - if (clk->enabled++ == 0)
> - clk->ops->enable(clk);
> - spin_unlock_irqrestore(&clocks_lock, flags);
>
> - if (clk->delay)
> - udelay(clk->delay);
> +static const struct clk_ops clk_gpio11_ops = {
> + .enable = clk_gpio11_enable,
> + .disable = clk_gpio11_disable,
> + .get_rate = clk_gpio11_get_rate,
> + .round_rate = clk_no_round_rate,
> +};
>
> - return 0;
> -}
> -EXPORT_SYMBOL(clk_enable);
> +static struct clk clk_gpio11 = {
> + .name = "GPIO27_CLK",
> + .ops = &clk_gpio11_ops,
> + .release = clk_static_release,
> +};
>
> -void clk_disable(struct clk *clk)
> +int clk_cken_enable(struct clk *clk)
> {
> - unsigned long flags;
> + struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
>
> - WARN_ON(clk->enabled == 0);
> + CKEN |= 1 << priv->cken;
>
> - spin_lock_irqsave(&clocks_lock, flags);
> - if (--clk->enabled == 0)
> - clk->ops->disable(clk);
> - spin_unlock_irqrestore(&clocks_lock, flags);
> -}
> -EXPORT_SYMBOL(clk_disable);
> + if (priv->delay)
> + udelay(priv->delay);
>
> -unsigned long clk_get_rate(struct clk *clk)
> -{
> - unsigned long rate;
> -
> - rate = clk->rate;
> - if (clk->ops->getrate)
> - rate = clk->ops->getrate(clk);
> -
> - return rate;
> + return 0;
> }
> -EXPORT_SYMBOL(clk_get_rate);
>
> -
> -static void clk_gpio27_enable(struct clk *clk)
> +void clk_cken_disable(struct clk *clk)
> {
> - pxa_gpio_mode(GPIO11_3_6MHz_MD);
> -}
> + struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
>
> -static void clk_gpio27_disable(struct clk *clk)
> -{
> + CKEN &= ~(1 << priv->cken);
> }
>
> -static const struct clkops clk_gpio27_ops = {
> - .enable = clk_gpio27_enable,
> - .disable = clk_gpio27_disable,
> -};
> -
> -
> -void clk_cken_enable(struct clk *clk)
> +unsigned long clk_cken_get_rate(struct clk *clk)
> {
> - CKEN |= 1 << clk->cken;
> -}
> + struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
> +
> + return priv->rate;
>
> -void clk_cken_disable(struct clk *clk)
> -{
> - CKEN &= ~(1 << clk->cken);
> }
>
> -const struct clkops clk_cken_ops = {
> +const struct clk_ops clk_cken_ops = {
> .enable = clk_cken_enable,
> .disable = clk_cken_disable,
> + .get_rate = clk_cken_get_rate,
> + .round_rate = clk_no_round_rate,
> };
>
> -static struct clk common_clks[] = {
> - {
> - .name = "GPIO27_CLK",
> - .ops = &clk_gpio27_ops,
> - .rate = 3686400,
> - },
> -};
> -
> -void clks_register(struct clk *clks, size_t num)
> -{
> - int i;
> -
> - mutex_lock(&clocks_mutex);
> - for (i = 0; i < num; i++)
> - list_add(&clks[i].node, &clocks);
> - mutex_unlock(&clocks_mutex);
> -}
> -
> static int __init clk_init(void)
> {
> - clks_register(common_clks, ARRAY_SIZE(common_clks));
> - return 0;
> + return clk_add(NULL, &clk_gpio11);
> }
> arch_initcall(clk_init);
> diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
> index bc6b77e..599b553 100644
> --- a/arch/arm/mach-pxa/clock.h
> +++ b/arch/arm/mach-pxa/clock.h
> @@ -1,43 +1,73 @@
> -struct clk;
> +#include <linux/clk.h>
> +#include <linux/clocklib.h>
>
> -struct clkops {
> - void (*enable)(struct clk *);
> - void (*disable)(struct clk *);
> - unsigned long (*getrate)(struct clk *);
> -};
> -
> -struct clk {
> - struct list_head node;
> - const char *name;
> - struct device *dev;
> - const struct clkops *ops;
> +struct clk_cken {
> + struct clk clk;
> unsigned long rate;
> unsigned int cken;
> unsigned int delay;
> - unsigned int enabled;
> };
>
> -#define INIT_CKEN(_name, _cken, _rate, _delay, _dev) \
> - { \
> - .name = _name, \
> - .dev = _dev, \
> - .ops = &clk_cken_ops, \
> - .rate = _rate, \
> - .cken = CKEN_##_cken, \
> - .delay = _delay, \
> - }
> +int clk_cken_enable(struct clk *clk);
> +void clk_cken_disable(struct clk *clk);
> +unsigned long clk_cken_get_rate(struct clk *clk);
> +
> +extern const struct clk_ops clk_cken_ops;
>
> -#define INIT_CK(_name, _cken, _ops, _dev) \
> +static inline void clk_static_release(struct clk *clk)
> +{
> + printk(KERN_ERR "Can't release static clock: %s!!!\n", clk->name);
> + BUG();
> +}
> +
> +static inline long clk_no_round_rate(struct clk *clk,
> + unsigned long hz, bool apply)
> +{
> + return clk->ops->get_rate(clk);
> +}
> +
> +#define INIT_CKEN(_name, _cken, _rate, _delay) \
> + &(struct clk_cken) { \
> + .clk.name = _name, \
> + .clk.ops = &clk_cken_ops, \
> + .clk.release = clk_static_release, \
> + .cken = CKEN_##_cken, \
> + .rate = _rate, \
> + .delay = _delay, \
> + } .clk
> +
> +#define INIT_CK(_name, _cken, _ops) \
> + &(struct clk_cken) { \
> + .clk.name = _name, \
> + .clk.ops = _ops, \
> + .clk.release = clk_static_release, \
> + .cken = CKEN_##_cken, \
> + } .clk
> +
> +#define INIT_DEVCK(_parent_name, _name, _dev) \
> { \
> - .name = _name, \
> - .dev = _dev, \
> - .ops = _ops, \
> - .cken = CKEN_##_cken, \
> + .clk.name = _name, \
> + .clk.ops = &clk_devck_ops, \
> + .clk.release = clk_static_release, \
> + .parent = _parent_name, \
> + .dev = _dev, \
> }
>
> -extern const struct clkops clk_cken_ops;
>
> -void clk_cken_enable(struct clk *clk);
> -void clk_cken_disable(struct clk *clk);
> +static inline void clks_register(struct clk *parent,
> + struct clk **clks, int size)
> +{
> + int i;
> + for (i = 0; i < size; i++)
> + clk_add(parent, clks[i]);
> +}
>
> -void clks_register(struct clk *clks, size_t num);
> +static inline void clks_devck_register(struct clk_devck *clks, int size)
> +{
> + int i;
> + for (i = 0; i < size; i++) {
> + struct clk *parent = clk_get(NULL, clks[i].parent);
> + if (parent)
> + clk_add(parent, &clks[i].clk);
> + }
> +}
> diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
> index e5b417d..b00a8b9 100644
> --- a/arch/arm/mach-pxa/pxa25x.c
> +++ b/arch/arm/mach-pxa/pxa25x.c
> @@ -102,10 +102,10 @@ static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
> return pxa25x_get_memclk_frequency_10khz() * 10000;
> }
>
> -static const struct clkops clk_pxa25x_lcd_ops = {
> +static const struct clk_ops clk_pxa25x_lcd_ops = {
> .enable = clk_cken_enable,
> .disable = clk_cken_disable,
> - .getrate = clk_pxa25x_lcd_getrate,
> + .get_rate = clk_pxa25x_lcd_getrate,
> };
>
> /*
> @@ -113,31 +113,42 @@ static const struct clkops clk_pxa25x_lcd_ops = {
> * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
> * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
> */
> -static struct clk pxa25x_hwuart_clk =
> - INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
> -;
> -
> -static struct clk pxa25x_clks[] = {
> - INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev),
> - INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev),
> - INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
> - INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
> - INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev),
> - INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
> - INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
> -
> - INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev),
> - INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev),
> - INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev),
> -
> - INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL),
> +static struct clk *pxa25x_hwuart_clk =
> + INIT_CKEN("HWUARTCLK", HWUART, 14745600, 1);
> +static struct clk_devck pxa25x_hwuart_devclk =
> + INIT_DEVCK("HWUARTCLK", "UARTCLK", &pxa_device_hwuart.dev);
> +
> +static struct clk *pxa25x_clks[] = {
> + INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops), /* &pxa_device_fb.dev */
> + INIT_CKEN("FFUARTCLK", FFUART, 14745600, 1),
> + INIT_CKEN("BTUARTCLK", BTUART, 14745600, 1),
> + INIT_CKEN("STUARTCLK", STUART, 14745600, 1),
> + INIT_CKEN("UDCCLK", USB, 47923000, 5), /* &pxa_device_udc.dev */
> + INIT_CKEN("MMCCLK", MMC, 19169000, 0), /* &pxa_device_mci.dev */
> + INIT_CKEN("I2CCLK", I2C, 31949000, 0), /* &pxa_device_i2c.dev */
> +
> + INIT_CKEN("SSP_CLK", SSP, 3686400, 0),
> + INIT_CKEN("NSSPCLK", NSSP, 3686400, 0),
> + INIT_CKEN("ASSPCLK", ASSP, 3686400, 0),
> +
> + INIT_CKEN("AC97CLK", AC97, 24576000, 0),
>
> /*
> - INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL),
> - INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL),
> - INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL),
> + INIT_CKEN("PWMCLK", PWM0, 3686400, 0),
> + INIT_CKEN("PWMCLK", PWM0, 3686400, 0),
> + INIT_CKEN("I2SCLK", I2S, 14745600, 0),
> */
> - INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
> + INIT_CKEN("FICPCLK", FICP, 47923000, 0),
> +};
> +
> +static struct clk_devck clk_children[] = {
> + INIT_DEVCK("FFUARTCLK", "UARTCLK", &pxa_device_ffuart.dev),
> + INIT_DEVCK("BTUARTCLK", "UARTCLK", &pxa_device_btuart.dev),
> + INIT_DEVCK("STUARTCLK", "UARTCLK", &pxa_device_stuart.dev),
> +
> + INIT_DEVCK("SSP_CLK", "SSPCLK", &pxa25x_device_ssp.dev),
> + INIT_DEVCK("NSSPCLK", "SSPCLK", &pxa25x_device_nssp.dev),
> + INIT_DEVCK("ASSPCLK", "SSPCLK", &pxa25x_device_assp.dev),
> };
>
> #ifdef CONFIG_PM
> @@ -284,11 +295,14 @@ static int __init pxa25x_init(void)
> int i, ret = 0;
>
> /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
> - if (cpu_is_pxa25x())
> - clks_register(&pxa25x_hwuart_clk, 1);
> + if (cpu_is_pxa25x()) {
> + clk_add(NULL, pxa25x_hwuart_clk);
> + clk_add(pxa25x_hwuart_clk, &pxa25x_hwuart_devclk.clk);
> + }
>
> if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
> - clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
> + clks_register(NULL, pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
> + clks_devck_register(ARRAY_AND_SIZE(clk_children));
>
> if ((ret = pxa_init_dma(16)))
> return ret;
> diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
> index 7e94583..6e13e78 100644
> --- a/arch/arm/mach-pxa/pxa27x.c
> +++ b/arch/arm/mach-pxa/pxa27x.c
> @@ -45,7 +45,7 @@ unsigned int pxa27x_get_clk_frequency_khz(int info)
> {
> unsigned long ccsr, clkcfg;
> unsigned int l, L, m, M, n2, N, S;
> - int cccr_a, t, ht, b;
> + int cccr_a, t, ht, b;
>
> ccsr = CCSR;
> cccr_a = CCCR & (1 << 25);
> @@ -88,7 +88,7 @@ unsigned int pxa27x_get_memclk_frequency_10khz(void)
> {
> unsigned long ccsr, clkcfg;
> unsigned int l, L, m, M;
> - int cccr_a, b;
> + int cccr_a, b;
>
> ccsr = CCSR;
> cccr_a = CCCR & (1 << 25);
> @@ -130,47 +130,61 @@ static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
> return pxa27x_get_lcdclk_frequency_10khz() * 10000;
> }
>
> -static const struct clkops clk_pxa27x_lcd_ops = {
> +static const struct clk_ops clk_pxa27x_lcd_ops = {
> .enable = clk_cken_enable,
> .disable = clk_cken_disable,
> - .getrate = clk_pxa27x_lcd_getrate,
> + .get_rate = clk_pxa27x_lcd_getrate,
> + .round_rate = clk_no_round_rate,
> };
>
> -static struct clk pxa27x_clks[] = {
> - INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops, &pxa_device_fb.dev),
> - INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL),
> +static struct clk *pxa27x_clks[] = {
> + INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops), /* &pxa_device_fb.dev */
> + INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops),
>
> - INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
> - INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
> - INIT_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
> + INIT_CKEN("FFUARTCLK", FFUART, 14857000, 1),
> + INIT_CKEN("BTUARTCLK", BTUART, 14857000, 1),
> + INIT_CKEN("STUARTCLK", STUART, 14857000, 1),
>
> - INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev),
> - INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
> - INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa_device_udc.dev),
> - INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev),
> - INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
> + INIT_CKEN("I2SCLK", I2S, 14682000, 0), /* &pxa_device_i2s.dev */
> + INIT_CKEN("I2C_CLK", I2C, 32842000, 0),
> + INIT_CKEN("UDCCLK", USB, 48000000, 5), /* &pxa_device_udc.dev */
> + INIT_CKEN("MMCCLK", MMC, 19500000, 0), /* &pxa_device_mci.dev */
> + INIT_CKEN("FICPCLK", FICP, 48000000, 0), /* &pxa_device_ficp.dev */
>
> - INIT_CKEN("USBCLK", USBHOST, 48000000, 0, &pxa27x_device_ohci.dev),
> - INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev),
> - INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
> + INIT_CKEN("USBCLK", USBHOST, 48000000, 0), /* &pxa27x_device_ohci.dev */
> + INIT_CKEN("PWRI2CCLK", PWRI2C, 13000000, 0),
> + INIT_CKEN("KBDCLK", KEYPAD, 32768, 0), /* &pxa27x_device_keypad.dev */
>
> - INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
> - INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
> - INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
> + INIT_CKEN("SSP1CLK", SSP1, 13000000, 0),
> + INIT_CKEN("SSP2CLK", SSP2, 13000000, 0),
> + INIT_CKEN("SSP3CLK", SSP3, 13000000, 0),
>
> - INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL),
> - INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0, NULL),
> + INIT_CKEN("AC97CLK", AC97, 24576000, 0),
> + INIT_CKEN("AC97CONFCLK", AC97CONF, 24576000, 0),
>
> /*
> - INIT_CKEN("PWMCLK", PWM0, 13000000, 0, NULL),
> - INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL),
> - INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL),
> - INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL),
> - INIT_CKEN("IMCLK", IM, 0, 0, NULL),
> - INIT_CKEN("MEMCLK", MEMC, 0, 0, NULL),
> + INIT_CKEN("PWMCLK", PWM0, 13000000, 0),
> + INIT_CKEN("MSLCLK", MSL, 48000000, 0),
> + INIT_CKEN("USIMCLK", USIM, 48000000, 0),
> + INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0),
> + INIT_CKEN("IMCLK", IM, 0, 0),
> + INIT_CKEN("MEMCLK", MEMC, 0, 0),
> */
> };
>
> +static struct clk_devck clk_children[] = {
> + INIT_DEVCK("FFUARTCLK", "UARTCLK", &pxa_device_ffuart.dev),
> + INIT_DEVCK("BTUARTCLK", "UARTCLK", &pxa_device_btuart.dev),
> + INIT_DEVCK("STUARTCLK", "UARTCLK", &pxa_device_stuart.dev),
> +
> + INIT_DEVCK("I2C_CLK", "I2CCLK", &pxa_device_i2c.dev),
> + INIT_DEVCK("PWRI2CCLK", "I2CCLK", &pxa27x_device_i2c_power.dev),
> +
> + INIT_DEVCK("SSP1CLK", "SSPCLK", &pxa27x_device_ssp1.dev),
> + INIT_DEVCK("SSP2CLK", "SSPCLK", &pxa27x_device_ssp2.dev),
> + INIT_DEVCK("SSP3CLK", "SSPCLK", &pxa27x_device_ssp3.dev),
> +};
> +
> #ifdef CONFIG_PM
>
> #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
> @@ -378,7 +392,8 @@ static int __init pxa27x_init(void)
> int i, ret = 0;
>
> if (cpu_is_pxa27x()) {
> - clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
> + clks_register(NULL, ARRAY_AND_SIZE(pxa27x_clks));
> + clks_devck_register(ARRAY_AND_SIZE(clk_children));
>
> if ((ret = pxa_init_dma(32)))
> return ret;
> diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
> index 644550b..efea4cd 100644
> --- a/arch/arm/mach-pxa/pxa3xx.c
> +++ b/arch/arm/mach-pxa/pxa3xx.c
> @@ -21,6 +21,7 @@
> #include <linux/irq.h>
> #include <linux/io.h>
> #include <linux/sysdev.h>
> +#include <linux/delay.h>
>
> #include <asm/hardware.h>
> #include <asm/arch/pxa3xx-regs.h>
> @@ -144,46 +145,61 @@ static unsigned long clk_pxa3xx_hsio_getrate(struct clk *clk)
> return hsio_clk;
> }
>
> -static void clk_pxa3xx_cken_enable(struct clk *clk)
> +static int clk_pxa3xx_cken_enable(struct clk *clk)
> {
> - unsigned long mask = 1ul << (clk->cken & 0x1f);
> + struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
> + unsigned long mask = 1ul << (priv->cken & 0x1f);
>
> - if (clk->cken < 32)
> + if (priv->cken < 32)
> CKENA |= mask;
> else
> CKENB |= mask;
> +
> + if (priv->delay)
> + udelay(priv->delay);
> +
> + return 0;
> }
>
> static void clk_pxa3xx_cken_disable(struct clk *clk)
> {
> - unsigned long mask = 1ul << (clk->cken & 0x1f);
> + struct clk_cken *priv = container_of(clk, struct clk_cken, clk);
> + unsigned long mask = 1ul << (priv->cken & 0x1f);
>
> - if (clk->cken < 32)
> + if (priv->cken < 32)
> CKENA &= ~mask;
> else
> CKENB &= ~mask;
> }
>
> -static const struct clkops clk_pxa3xx_cken_ops = {
> +static const struct clk_ops clk_pxa3xx_cken_ops = {
> .enable = clk_pxa3xx_cken_enable,
> .disable = clk_pxa3xx_cken_disable,
> + .round_rate = clk_no_round_rate,
> + .get_rate = clk_cken_get_rate,
> };
>
> -static const struct clkops clk_pxa3xx_hsio_ops = {
> +static const struct clk_ops clk_pxa3xx_hsio_ops = {
> .enable = clk_pxa3xx_cken_enable,
> .disable = clk_pxa3xx_cken_disable,
> - .getrate = clk_pxa3xx_hsio_getrate,
> + .round_rate = clk_no_round_rate,
> + .get_rate = clk_pxa3xx_hsio_getrate,
> };
>
> -static const struct clkops clk_pxa3xx_ac97_ops = {
> +static const struct clk_ops clk_pxa3xx_ac97_ops = {
> .enable = clk_pxa3xx_cken_enable,
> .disable = clk_pxa3xx_cken_disable,
> - .getrate = clk_pxa3xx_ac97_getrate,
> + .round_rate = clk_no_round_rate,
> + .get_rate = clk_pxa3xx_ac97_getrate,
> };
>
> -static void clk_pout_enable(struct clk *clk)
> +static int clk_pout_enable(struct clk *clk)
> {
> - OSCC |= OSCC_PEN;
> + OSCC &= ~OSCC_PEN;
> +
> + udelay(70);
> +
> + return 0;
> }
>
> static void clk_pout_disable(struct clk *clk)
> @@ -191,58 +207,79 @@ static void clk_pout_disable(struct clk *clk)
> OSCC &= ~OSCC_PEN;
> }
>
> -static const struct clkops clk_pout_ops = {
> +static unsigned long clk_pout_get_rate(struct clk *clk)
> +{
> + return 13000000;
> +}
> +
> +static const struct clk_ops clk_pout_ops = {
> .enable = clk_pout_enable,
> .disable = clk_pout_disable,
> + .round_rate = clk_no_round_rate,
> + .get_rate = clk_pout_get_rate,
> };
>
> -#define PXA3xx_CKEN(_name, _cken, _rate, _delay, _dev) \
> - { \
> - .name = _name, \
> - .dev = _dev, \
> - .ops = &clk_pxa3xx_cken_ops, \
> - .rate = _rate, \
> - .cken = CKEN_##_cken, \
> - .delay = _delay, \
> - }
> -
> -#define PXA3xx_CK(_name, _cken, _ops, _dev) \
> - { \
> - .name = _name, \
> - .dev = _dev, \
> - .ops = _ops, \
> - .cken = CKEN_##_cken, \
> - }
> -
> -static struct clk pxa3xx_clks[] = {
> - {
> +#define PXA3xx_CKEN(_name, _cken, _rate, _delay) \
> + &(struct clk_cken) { \
> + .clk.name = _name, \
> + .clk.ops = &clk_pxa3xx_cken_ops, \
> + .clk.release = clk_static_release, \
> + .cken = CKEN_##_cken, \
> + .rate = _rate, \
> + .delay = _delay, \
> + }.clk
> +
> +#define PXA3xx_CK(_name, _cken, _ops) \
> + &(struct clk_cken) { \
> + .clk.name = _name, \
> + .clk.ops = _ops, \
> + .clk.release = clk_static_release, \
> + .cken = CKEN_##_cken, \
> + }.clk
> +
> +static struct clk *pxa3xx_clks[] = {
> + &(struct clk) {
> .name = "CLK_POUT",
> .ops = &clk_pout_ops,
> - .rate = 13000000,
> - .delay = 70,
> + .release = clk_static_release,
> },
>
> - PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops, &pxa_device_fb.dev),
> - PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops, NULL),
> - PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops, NULL),
> + PXA3xx_CK("LCDCLK", LCD, &clk_pxa3xx_hsio_ops), /* &pxa_device_fb.dev */
> + PXA3xx_CK("CAMCLK", CAMERA, &clk_pxa3xx_hsio_ops),
> + PXA3xx_CK("AC97CLK", AC97, &clk_pxa3xx_ac97_ops),
>
> - PXA3xx_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
> - PXA3xx_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
> - PXA3xx_CKEN("UARTCLK", STUART, 14857000, 1, NULL),
> + PXA3xx_CKEN("FFUARTCLK", FFUART, 14857000, 1),
> + PXA3xx_CKEN("BTUARTCLK", BTUART, 14857000, 1),
> + PXA3xx_CKEN("STUARTCLK", STUART, 14857000, 1),
> +
> + PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0), /* &pxa_device_i2c.dev */
> + PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5), /* &pxa_device_udc.dev */
> + PXA3xx_CKEN("USBCLK", USBH, 48000000, 0), /* &pxa27x_device_ohci.dev */
> + PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0), /* &pxa27x_device_keypad.dev */
> +
> + PXA3xx_CKEN("SSP1CLK", SSP1, 13000000, 0),
> + PXA3xx_CKEN("SSP2CLK", SSP2, 13000000, 0), /* &pxa27x_device_ssp2.dev */
> + PXA3xx_CKEN("SSP3CLK", SSP3, 13000000, 0), /* &pxa27x_device_ssp3.dev */
> + PXA3xx_CKEN("SSP4CLK", SSP4, 13000000, 0), /* &pxa3xx_device_ssp4.dev */
> +
> + PXA3xx_CKEN("MMC1CLK", MMC1, 19500000, 0),
> + PXA3xx_CKEN("MMC2CLK", MMC2, 19500000, 0),
> + PXA3xx_CKEN("MMC3CLK", MMC3, 19500000, 0),
> +};
>
> - PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
> - PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev),
> - PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev),
> - PXA3xx_CKEN("KBDCLK", KEYPAD, 32768, 0, &pxa27x_device_keypad.dev),
> +static struct clk_devck clk_children[] = {
> + INIT_DEVCK("FFUARTCLK", "UARTCLK", &pxa_device_ffuart.dev),
> + INIT_DEVCK("BTUARTCLK", "UARTCLK", &pxa_device_btuart.dev),
> + INIT_DEVCK("STUARTCLK", "UARTCLK", &pxa_device_stuart.dev),
>
> - PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev),
> - PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev),
> - PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev),
> - PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev),
> + INIT_DEVCK("SSP1CLK", "SSPCLK", &pxa27x_device_ssp1.dev),
> + INIT_DEVCK("SSP2CLK", "SSPCLK", &pxa27x_device_ssp2.dev),
> + INIT_DEVCK("SSP3CLK", "SSPCLK", &pxa27x_device_ssp3.dev),
> + INIT_DEVCK("SSP4CLK", "SSPCLK", &pxa3xx_device_ssp4.dev),
>
> - PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev),
> - PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev),
> - PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev),
> + INIT_DEVCK("MMC1CLK", "MMCCLK", &pxa_device_mci.dev),
> + INIT_DEVCK("MMC2CLK", "MMCCLK", &pxa3xx_device_mci2.dev),
> + INIT_DEVCK("MMC3CLK", "MMCCLK", &pxa3xx_device_mci3.dev),
> };
>
> #ifdef CONFIG_PM
> @@ -555,7 +592,8 @@ static int __init pxa3xx_init(void)
> */
> ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
>
> - clks_register(pxa3xx_clks, ARRAY_SIZE(pxa3xx_clks));
> + clks_register(NULL, ARRAY_AND_SIZE(pxa3xx_clks));
> + clks_devck_register(ARRAY_AND_SIZE(clk_children));
>
> if ((ret = pxa_init_dma(32)))
> return ret;
> --
> 1.5.5.1
>
>
> --
> With best wishes
> Dmitry
>
>
regards
Philipp