detect_pll_input_clock() is never called in atomic context.
detect_pll_input_clock() is only called by init_chipset_pdcnew(), which
is set as ".init_chipset" in struct ide_port_info.
This function is not called in atomic context.
Despite never getting called from atomic context, detect_pll_input_clock()
calls mdelay() to busily wait.
This is not necessary and can be replaced with usleep_range() to
avoid busy waiting.
This is found by a static analysis tool named DCNS written by myself.
And I also manually check it.
Signed-off-by: Jia-Ju Bai <[email protected]>
---
drivers/ide/pdc202xx_new.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ide/pdc202xx_new.c b/drivers/ide/pdc202xx_new.c
index b33646b..6afa66d 100644
--- a/drivers/ide/pdc202xx_new.c
+++ b/drivers/ide/pdc202xx_new.c
@@ -258,7 +258,7 @@ static long detect_pll_input_clock(unsigned long dma_base)
outb(scr1 | 0x40, dma_base + 0x03);
/* Let the counter run for 10 ms. */
- mdelay(10);
+ usleep_range(10);
end_count = read_counter(dma_base);
end_time = ktime_get();
--
1.9.1
Hello!
On 4/11/2018 10:52 AM, Jia-Ju Bai wrote:
> detect_pll_input_clock() is never called in atomic context.
>
> detect_pll_input_clock() is only called by init_chipset_pdcnew(), which
> is set as ".init_chipset" in struct ide_port_info.
> This function is not called in atomic context.
>
> Despite never getting called from atomic context, detect_pll_input_clock()
> calls mdelay() to busily wait.
> This is not necessary and can be replaced with usleep_range() to
> avoid busy waiting.
>
> This is found by a static analysis tool named DCNS written by myself.
> And I also manually check it.
>
> Signed-off-by: Jia-Ju Bai <[email protected]>
> ---
> drivers/ide/pdc202xx_new.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/ide/pdc202xx_new.c b/drivers/ide/pdc202xx_new.c
> index b33646b..6afa66d 100644
> --- a/drivers/ide/pdc202xx_new.c
> +++ b/drivers/ide/pdc202xx_new.c
> @@ -258,7 +258,7 @@ static long detect_pll_input_clock(unsigned long dma_base)
> outb(scr1 | 0x40, dma_base + 0x03);
>
> /* Let the counter run for 10 ms. */
> - mdelay(10);
> + usleep_range(10);
This function takes 2 arguments.
[...]
MBR, Sergei
On 2018/4/11 16:33, Sergei Shtylyov wrote:
> Hello!
>
> On 4/11/2018 10:52 AM, Jia-Ju Bai wrote:
>
>> detect_pll_input_clock() is never called in atomic context.
>>
>> detect_pll_input_clock() is only called by init_chipset_pdcnew(), which
>> is set as ".init_chipset" in struct ide_port_info.
>> This function is not called in atomic context.
>>
>> Despite never getting called from atomic context,
>> detect_pll_input_clock()
>> calls mdelay() to busily wait.
>> This is not necessary and can be replaced with usleep_range() to
>> avoid busy waiting.
>>
>> This is found by a static analysis tool named DCNS written by myself.
>> And I also manually check it.
>>
>> Signed-off-by: Jia-Ju Bai <[email protected]>
>> ---
>> drivers/ide/pdc202xx_new.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/ide/pdc202xx_new.c b/drivers/ide/pdc202xx_new.c
>> index b33646b..6afa66d 100644
>> --- a/drivers/ide/pdc202xx_new.c
>> +++ b/drivers/ide/pdc202xx_new.c
>> @@ -258,7 +258,7 @@ static long detect_pll_input_clock(unsigned long
>> dma_base)
>> outb(scr1 | 0x40, dma_base + 0x03);
>> /* Let the counter run for 10 ms. */
>> - mdelay(10);
>> + usleep_range(10);
>
> This function takes 2 arguments.
>
> [...]
>
> MBR, Sergei
Oops, sorry for my fault.
Thanks for telling me this :)
I will modify it and send V2.
Best wishes,
Jia-Ju Bai
Hi Jia-Ju,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on ide/master]
[also build test ERROR on v4.16 next-20180411]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jia-Ju-Bai/ide-pdc202xx_new-Replace-mdelay-with-usleep_range-in-detect_pll_input_clock/20180412-105416
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/ide.git master
config: i386-randconfig-x015-201814 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers//ide/pdc202xx_new.c: In function 'detect_pll_input_clock':
>> drivers//ide/pdc202xx_new.c:261:2: error: too few arguments to function 'usleep_range'
usleep_range(10);
^~~~~~~~~~~~
In file included from drivers//ide/pdc202xx_new.c:21:0:
include/linux/delay.h:60:6: note: declared here
void usleep_range(unsigned long min, unsigned long max);
^~~~~~~~~~~~
vim +/usleep_range +261 drivers//ide/pdc202xx_new.c
238
239 /**
240 * detect_pll_input_clock - Detect the PLL input clock in Hz.
241 * @dma_base: for the port address
242 * E.g. 16949000 on 33 MHz PCI bus, i.e. half of the PCI clock.
243 */
244 static long detect_pll_input_clock(unsigned long dma_base)
245 {
246 ktime_t start_time, end_time;
247 long start_count, end_count;
248 long pll_input, usec_elapsed;
249 u8 scr1;
250
251 start_count = read_counter(dma_base);
252 start_time = ktime_get();
253
254 /* Start the test mode */
255 outb(0x01, dma_base + 0x01);
256 scr1 = inb(dma_base + 0x03);
257 DBG("scr1[%02X]\n", scr1);
258 outb(scr1 | 0x40, dma_base + 0x03);
259
260 /* Let the counter run for 10 ms. */
> 261 usleep_range(10);
262
263 end_count = read_counter(dma_base);
264 end_time = ktime_get();
265
266 /* Stop the test mode */
267 outb(0x01, dma_base + 0x01);
268 scr1 = inb(dma_base + 0x03);
269 DBG("scr1[%02X]\n", scr1);
270 outb(scr1 & ~0x40, dma_base + 0x03);
271
272 /*
273 * Calculate the input clock in Hz
274 * (the clock counter is 30 bit wide and counts down)
275 */
276 usec_elapsed = ktime_us_delta(end_time, start_time);
277 pll_input = ((start_count - end_count) & 0x3fffffff) / 10 *
278 (10000000 / usec_elapsed);
279
280 DBG("start[%ld] end[%ld]\n", start_count, end_count);
281
282 return pll_input;
283 }
284
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation