2022-09-14 02:28:25

by Kunkun Jiang

[permalink] [raw]
Subject: [PATCH v2] clocksource/drivers/arm_arch_timer: Fix handling of ARM erratum 85821

The commit a38b71b0833e ("clocksource/drivers/arm_arch_timer:
Move system register timer programming over to CVAL") moves the
programming of the timers from the countdown timer (TVAL) over
to the comparator (CVAL). This makes it necessary to read the
counter when programming next event. However, the workaround of
Cortex-A73 erratum 858921 does not set the corresponding
set_next_event_phys and set_next_event_virt.

Add the appropriate hooks to apply the erratum mitigation when
programming the next timer event.

Fixes: a38b71b0833e ("clocksource/drivers/arm_arch_timer: Move system register timer programming over to CVAL")
Signed-off-by: Kunkun Jiang <[email protected]>
Acked-by: Marc Zyngier <[email protected]>
---
drivers/clocksource/arm_arch_timer.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 9ab8221ee3c6..ff935efb6a88 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -473,6 +473,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
.desc = "ARM erratum 858921",
.read_cntpct_el0 = arm64_858921_read_cntpct_el0,
.read_cntvct_el0 = arm64_858921_read_cntvct_el0,
+ .set_next_event_phys = erratum_set_next_event_phys,
+ .set_next_event_virt = erratum_set_next_event_virt,
},
#endif
#ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1
--
2.27.0


2022-09-14 07:01:32

by Kunkun Jiang

[permalink] [raw]
Subject: Re: [PATCH v2] clocksource/drivers/arm_arch_timer: Fix handling of ARM erratum 85821

The subject is wrong. s/85821/858921
Please review v3.

Thanks,
Kunkun Jiang

On 2022/9/14 10:21, Kunkun Jiang wrote:
> The commit a38b71b0833e ("clocksource/drivers/arm_arch_timer:
> Move system register timer programming over to CVAL") moves the
> programming of the timers from the countdown timer (TVAL) over
> to the comparator (CVAL). This makes it necessary to read the
> counter when programming next event. However, the workaround of
> Cortex-A73 erratum 858921 does not set the corresponding
> set_next_event_phys and set_next_event_virt.
>
> Add the appropriate hooks to apply the erratum mitigation when
> programming the next timer event.
>
> Fixes: a38b71b0833e ("clocksource/drivers/arm_arch_timer: Move system register timer programming over to CVAL")
> Signed-off-by: Kunkun Jiang <[email protected]>
> Acked-by: Marc Zyngier <[email protected]>
> ---
> drivers/clocksource/arm_arch_timer.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
> index 9ab8221ee3c6..ff935efb6a88 100644
> --- a/drivers/clocksource/arm_arch_timer.c
> +++ b/drivers/clocksource/arm_arch_timer.c
> @@ -473,6 +473,8 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
> .desc = "ARM erratum 858921",
> .read_cntpct_el0 = arm64_858921_read_cntpct_el0,
> .read_cntvct_el0 = arm64_858921_read_cntvct_el0,
> + .set_next_event_phys = erratum_set_next_event_phys,
> + .set_next_event_virt = erratum_set_next_event_virt,
> },
> #endif
> #ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1