Enable DVFS for the Odroid-N2 by setting the clock, OPP and supply
for each cores of each CPU clusters.
The first cluster uses the "VDDCPU_B" power supply, and the second
cluster uses the "VDDCPU_A" power supply.
Each power supply can achieve 0.73V to 1.01V using 2 distinct PWM
outputs clocked at 800KHz with an inverse duty-cycle.
DVFS has been tested by running the arm64 cpuburn at [1] and cycling
between all the possible cpufreq translations of each cluster and
checking the final frequency using the clock-measurer, script at [2].
[1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
[2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
Signed-off-by: Neil Armstrong <[email protected]>
---
.../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 96 +++++++++++++++++++
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
index c3e0735e6d9f..0db1547bfb5a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
@@ -114,6 +114,44 @@
/* FIXME: actually controlled by VDDCPU_B_EN */
};
+ vddcpu_a: regulator-vddcpu-a {
+ /*
+ * MP8756GD Regulator.
+ */
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU_A";
+ regulator-min-microvolt = <721000>;
+ regulator-max-microvolt = <1022000>;
+
+ vin-supply = <&main_12v>;
+
+ pwms = <&pwm_ab 0 1250 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddcpu_b: regulator-vddcpu-b {
+ /*
+ * Silergy SY8120B1ABC Regulator.
+ */
+ compatible = "pwm-regulator";
+
+ regulator-name = "VDDCPU_B";
+ regulator-min-microvolt = <721000>;
+ regulator-max-microvolt = <1022000>;
+
+ vin-supply = <&main_12v>;
+
+ pwms = <&pwm_AO_cd 1 1250 0>;
+ pwm-dutycycle-range = <100 0>;
+
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
hub_5v: regulator-hub_5v {
compatible = "regulator-fixed";
regulator-name = "HUB_5V";
@@ -245,6 +283,48 @@
status = "okay";
};
+&cpu0 {
+ cpu-supply = <&vddcpu_b>;
+ operating-points-v2 = <&cpu_opp_table_0>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu1 {
+ cpu-supply = <&vddcpu_b>;
+ operating-points-v2 = <&cpu_opp_table_0>;
+ clocks = <&clkc CLKID_CPU_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu100 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu101 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu102 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
+&cpu103 {
+ cpu-supply = <&vddcpu_a>;
+ operating-points-v2 = <&cpub_opp_table_1>;
+ clocks = <&clkc CLKID_CPUB_CLK>;
+ clock-latency = <50000>;
+};
+
&ext_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
@@ -308,6 +388,22 @@
pinctrl-names = "default";
};
+&pwm_ab {
+ pinctrl-0 = <&pwm_a_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin0";
+ status = "okay";
+};
+
+&pwm_AO_cd {
+ pinctrl-0 = <&pwm_ao_d_e_pins>;
+ pinctrl-names = "default";
+ clocks = <&xtal>;
+ clock-names = "clkin1";
+ status = "okay";
+};
+
/* SD card */
&sd_emmc_b {
status = "okay";
--
2.21.0
On 20/06/2019 17:00, Neil Armstrong wrote:
> Enable DVFS for the Odroid-N2 by setting the clock, OPP and supply
> for each cores of each CPU clusters.
>
> The first cluster uses the "VDDCPU_B" power supply, and the second
> cluster uses the "VDDCPU_A" power supply.
>
> Each power supply can achieve 0.73V to 1.01V using 2 distinct PWM
> outputs clocked at 800KHz with an inverse duty-cycle.
>
> DVFS has been tested by running the arm64 cpuburn at [1] and cycling
> between all the possible cpufreq translations of each cluster and
> checking the final frequency using the clock-measurer, script at [2].
>
> [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
> [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
>
> Signed-off-by: Neil Armstrong <[email protected]>
> ---
> .../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 96 +++++++++++++++++++
> 1 file changed, 96 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
> index c3e0735e6d9f..0db1547bfb5a 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
> @@ -114,6 +114,44 @@
[...]
I just ran a 4days long test, leading to ~4 729 015 transitions.
Here are the cpufreq trans_table content :
Cortex-A53:
From : To
: 100000 250000 500000 666666 1000000 1200000 1398000 1512000 1608000 1704000 1896000
100000: 0 30975 20650 20649 20649 20649 20649 20649 20649 20649 20649
250000: 20650 0 30975 20649 20649 20649 20649 20649 20649 20649 20649
500000: 20650 20650 0 30973 20649 20648 20648 20648 20648 20648 20648
666666: 20649 20649 20649 0 30972 20648 20648 20648 20648 20648 20648
1000000: 20649 20649 20649 20648 0 30972 20648 20648 20648 20648 20648
1200000: 20649 20649 20648 20648 20648 0 30972 20648 20648 20648 20648
1398000: 20649 20649 20648 20648 20648 20648 0 30972 20648 20648 20648
1512000: 20649 20649 20648 20648 20648 20648 20648 0 30972 20648 20648
1608000: 20649 20649 20648 20648 20648 20648 20648 20648 0 30972 20648
1704000: 20649 20649 20648 20648 20648 20648 20648 20648 20648 0 30972
1896000: 30973 20649 20648 20648 20648 20648 20648 20648 20648 20648 0
Cortex-A73:
From : To
: 100000 250000 500000 666666 1000000 1200000 1398000 1512000 1704000
100000: 0 45964 30643 30643 30643 30642 30642 30642 30642
250000: 30643 0 45963 30642 30642 30642 30642 30642 30642
500000: 30643 30642 0 45963 30642 30642 30642 30642 30642
666666: 30643 30642 30642 0 45963 30642 30642 30642 30642
1000000: 30643 30642 30642 30642 0 45963 30642 30642 30642
1200000: 30642 30642 30642 30642 30642 0 45963 30642 30642
1398000: 30642 30642 30642 30642 30642 30642 0 45963 30642
1512000: 30642 30642 30642 30642 30642 30642 30642 0 45963
1704000: 45963 30642 30642 30642 30642 30642 30642 30642 0
Neil