From: Matthias Brugger <[email protected]>
In an effort to fix the vdosys implementation, the compatible has
changes. Fix the device tree to adhere the binding definition.
Signed-off-by: Matthias Brugger <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 00891bfa564e9..8f1264d5290bf 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -2369,7 +2369,7 @@ vencsys_core1: clock-controller@1b000000 {
};
vdosys0: syscon@1c01a000 {
- compatible = "mediatek,mt8195-mmsys", "syscon";
+ compatible = "mediatek,mt8195-vdosys0", "mediatek,mt8195-mmsys", "syscon";
reg = <0 0x1c01a000 0 0x1000>;
mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
#clock-cells = <1>;
@@ -2555,7 +2555,7 @@ larb1: larb@1c019000 {
};
vdosys1: syscon@1c100000 {
- compatible = "mediatek,mt8195-mmsys", "syscon";
+ compatible = "mediatek,mt8195-vdosys1", "syscon";
reg = <0 0x1c100000 0 0x1000>;
#clock-cells = <1>;
};
--
2.39.0
From: Matthias Brugger <[email protected]>
The node name should be generic and mmsys expcets 'syscon'
Signed-off-by: Matthias Brugger <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8167.dtsi b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
index 6a54315cf6502..2374c09530575 100644
--- a/arch/arm64/boot/dts/mediatek/mt8167.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
@@ -124,7 +124,7 @@ pio: pinctrl@1000b000 {
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
};
- mmsys: mmsys@14000000 {
+ mmsys: syscon@14000000 {
compatible = "mediatek,mt8167-mmsys", "syscon";
reg = <0 0x14000000 0 0x1000>;
#clock-cells = <1>;
--
2.39.0
From: Matthias Brugger <[email protected]>
This reverts commit fc6634ac0e5380aeb1063275a2e9a583d41b2306.
The mmsys is a clock provider but does not have any clocks connected to
it. Therefore assigned-clock properties should be applied to the users of mmsys.
This fixes the DT schema check:
mediatek/mt8173-elm.dtb: syscon@14000000: 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Matthias Brugger <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index c47d7d900f283..b753547e250fe 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -988,8 +988,6 @@ mmsys: syscon@14000000 {
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0 0x14000000 0 0x1000>;
power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
- assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
- assigned-clock-rates = <400000000>;
#clock-cells = <1>;
#reset-cells = <1>;
mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
--
2.39.0
From: Matthias Brugger <[email protected]>
As the node is a syscon, this has to be reflected in the compatible and
the node name.
Signed-off-by: Matthias Brugger <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 8f1264d5290bf..5261367031426 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1795,8 +1795,8 @@ mfgcfg: clock-controller@13fbf000 {
#clock-cells = <1>;
};
- vppsys0: clock-controller@14000000 {
- compatible = "mediatek,mt8195-vppsys0";
+ vppsys0: syscon@14000000 {
+ compatible = "mediatek,mt8195-vppsys0", "syscon";
reg = <0 0x14000000 0 0x1000>;
#clock-cells = <1>;
};
@@ -1900,8 +1900,8 @@ larb8: larb@14e05000 {
power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>;
};
- vppsys1: clock-controller@14f00000 {
- compatible = "mediatek,mt8195-vppsys1";
+ vppsys1: syscon@14f00000 {
+ compatible = "mediatek,mt8195-vppsys1", "syscon";
reg = <0 0x14f00000 0 0x1000>;
#clock-cells = <1>;
};
--
2.39.0
On Fri, Feb 10, 2023 at 12:04 AM <[email protected]> wrote:
>
> From: Matthias Brugger <[email protected]>
>
> In an effort to fix the vdosys implementation, the compatible has
> changes. Fix the device tree to adhere the binding definition.
>
> Signed-off-by: Matthias Brugger <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
On Fri, Feb 10, 2023 at 12:04 AM <[email protected]> wrote:
>
> From: Matthias Brugger <[email protected]>
>
> The node name should be generic and mmsys expcets 'syscon'
>
> Signed-off-by: Matthias Brugger <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
On Fri, Feb 10, 2023 at 12:04 AM <[email protected]> wrote:
>
> From: Matthias Brugger <[email protected]>
>
> As the node is a syscon, this has to be reflected in the compatible and
> the node name.
>
> Signed-off-by: Matthias Brugger <[email protected]>
Reviewed-by: Chen-Yu Tsai <[email protected]>
On Fri, Feb 10, 2023 at 12:05 AM <[email protected]> wrote:
>
> From: Matthias Brugger <[email protected]>
>
> This reverts commit fc6634ac0e5380aeb1063275a2e9a583d41b2306.
>
> The mmsys is a clock provider but does not have any clocks connected to
> it. Therefore assigned-clock properties should be applied to the users of mmsys.
If there are multiple users that need this, then it should be moved to
the clock provider node topckgen.
> This fixes the DT schema check:
> mediatek/mt8173-elm.dtb: syscon@14000000: 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Matthias Brugger <[email protected]>
> ---
>
> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index c47d7d900f283..b753547e250fe 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -988,8 +988,6 @@ mmsys: syscon@14000000 {
> compatible = "mediatek,mt8173-mmsys", "syscon";
> reg = <0 0x14000000 0 0x1000>;
> power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
> - assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
> - assigned-clock-rates = <400000000>;
> #clock-cells = <1>;
> #reset-cells = <1>;
> mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
> --
> 2.39.0
>
>
Il 09/02/23 17:03, [email protected] ha scritto:
> From: Matthias Brugger <[email protected]>
>
> This reverts commit fc6634ac0e5380aeb1063275a2e9a583d41b2306.
>
> The mmsys is a clock provider but does not have any clocks connected to
> it. Therefore assigned-clock properties should be applied to the users of mmsys.
>
> This fixes the DT schema check:
> mediatek/mt8173-elm.dtb: syscon@14000000: 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Matthias Brugger <[email protected]>
About solving schema checks: agreed.
Since this is impacting on multiple subsystems (display, vdec, venc), can we
instead move this to the topckgen node?
I didn't check if that would trigger another schema check, but I remember
doing that on Qualcomm DTs a bit of time ago.
The alternative would be to copy that over more than 10 nodes, which would
be a bit ... ugly.
Cheers,
Angelo
> ---
>
> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index c47d7d900f283..b753547e250fe 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -988,8 +988,6 @@ mmsys: syscon@14000000 {
> compatible = "mediatek,mt8173-mmsys", "syscon";
> reg = <0 0x14000000 0 0x1000>;
> power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
> - assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
> - assigned-clock-rates = <400000000>;
> #clock-cells = <1>;
> #reset-cells = <1>;
> mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
Il 09/02/23 17:03, [email protected] ha scritto:
> From: Matthias Brugger <[email protected]>
>
> In an effort to fix the vdosys implementation, the compatible has
> changes. Fix the device tree to adhere the binding definition.
>
> Signed-off-by: Matthias Brugger <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 09/02/23 17:03, [email protected] ha scritto:
> From: Matthias Brugger <[email protected]>
>
> The node name should be generic and mmsys expcets 'syscon'
>
> Signed-off-by: Matthias Brugger <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 09/02/23 17:03, [email protected] ha scritto:
> From: Matthias Brugger <[email protected]>
>
> As the node is a syscon, this has to be reflected in the compatible and
> the node name.
>
> Signed-off-by: Matthias Brugger <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
On 10/02/2023 12:59, AngeloGioacchino Del Regno wrote:
> Il 09/02/23 17:03, [email protected] ha scritto:
>> From: Matthias Brugger <[email protected]>
>>
>> This reverts commit fc6634ac0e5380aeb1063275a2e9a583d41b2306.
>>
>> The mmsys is a clock provider but does not have any clocks connected to
>> it. Therefore assigned-clock properties should be applied to the users of mmsys.
>>
>> This fixes the DT schema check:
>> mediatek/mt8173-elm.dtb: syscon@14000000: 'assigned-clock-rates',
>> 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
>>
>> Signed-off-by: Matthias Brugger <[email protected]>
>
> About solving schema checks: agreed.
>
> Since this is impacting on multiple subsystems (display, vdec, venc), can we
> instead move this to the topckgen node?
> I didn't check if that would trigger another schema check, but I remember
> doing that on Qualcomm DTs a bit of time ago.
>
> The alternative would be to copy that over more than 10 nodes, which would
> be a bit ... ugly.
>
Thanks Angelo and Chen-Yu for your feedback. I'm not able to reproduce that
problem right now, so I'll drop this patch from the series.
Regards,
Matthias
On 09/02/2023 17:03, [email protected] wrote:
> From: Matthias Brugger <[email protected]>
>
> As the node is a syscon, this has to be reflected in the compatible and
> the node name.
>
> Signed-off-by: Matthias Brugger <[email protected]>
A similar patch is already in v6.3-tmp/dts64:
168136cbef9c ("arm64: dts: mediatek: mt8195: add MMSYS configuration for VPPSYS")
I'll drop this one as well.
My bad, I should have noticed that earlier.
Regards,
Matthias
> ---
>
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index 8f1264d5290bf..5261367031426 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -1795,8 +1795,8 @@ mfgcfg: clock-controller@13fbf000 {
> #clock-cells = <1>;
> };
>
> - vppsys0: clock-controller@14000000 {
> - compatible = "mediatek,mt8195-vppsys0";
> + vppsys0: syscon@14000000 {
> + compatible = "mediatek,mt8195-vppsys0", "syscon";
> reg = <0 0x14000000 0 0x1000>;
> #clock-cells = <1>;
> };
> @@ -1900,8 +1900,8 @@ larb8: larb@14e05000 {
> power-domains = <&spm MT8195_POWER_DOMAIN_WPESYS>;
> };
>
> - vppsys1: clock-controller@14f00000 {
> - compatible = "mediatek,mt8195-vppsys1";
> + vppsys1: syscon@14f00000 {
> + compatible = "mediatek,mt8195-vppsys1", "syscon";
> reg = <0 0x14f00000 0 0x1000>;
> #clock-cells = <1>;
> };
Patch 1 and 2 applied.
Matthias
On 09/02/2023 17:03, [email protected] wrote:
> From: Matthias Brugger <[email protected]>
>
> In an effort to fix the vdosys implementation, the compatible has
> changes. Fix the device tree to adhere the binding definition.
>
> Signed-off-by: Matthias Brugger <[email protected]>
> ---
>
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> index 00891bfa564e9..8f1264d5290bf 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> @@ -2369,7 +2369,7 @@ vencsys_core1: clock-controller@1b000000 {
> };
>
> vdosys0: syscon@1c01a000 {
> - compatible = "mediatek,mt8195-mmsys", "syscon";
> + compatible = "mediatek,mt8195-vdosys0", "mediatek,mt8195-mmsys", "syscon";
> reg = <0 0x1c01a000 0 0x1000>;
> mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
> #clock-cells = <1>;
> @@ -2555,7 +2555,7 @@ larb1: larb@1c019000 {
> };
>
> vdosys1: syscon@1c100000 {
> - compatible = "mediatek,mt8195-mmsys", "syscon";
> + compatible = "mediatek,mt8195-vdosys1", "syscon";
> reg = <0 0x1c100000 0 0x1000>;
> #clock-cells = <1>;
> };